From 85bf366b255873018f70e0654945182f4ddf86d6 Mon Sep 17 00:00:00 2001 From: David Wu Date: Sat, 12 Mar 2022 20:59:23 +0800 Subject: [PATCH] mfd: rk630: Set phy clock from ref clock The phy clock is the same as the input clock of rk630, so use this clock for configuration. Signed-off-by: David Wu Change-Id: Ie5c0e58958a1fdd9e264d861295d64e4ccb483cb --- drivers/mfd/rk630.c | 25 +++++++++++++++++++++---- 1 file changed, 21 insertions(+), 4 deletions(-) diff --git a/drivers/mfd/rk630.c b/drivers/mfd/rk630.c index 24e87659449c..4c1f40e5bf39 100644 --- a/drivers/mfd/rk630.c +++ b/drivers/mfd/rk630.c @@ -13,7 +13,7 @@ #include #include -static int rk630_macphy_enable(struct rk630 *rk630) +static int rk630_macphy_enable(struct rk630 *rk630, unsigned long rate) { u32 val; int ret; @@ -68,8 +68,23 @@ static int rk630_macphy_enable(struct rk630 *rk630) return ret; } - /* mode sel: RMII && clock sel: 24M && BGS value: OTP && id */ - val = (2 << 14) | (0 << 12) | (0x1 << 8) | (6 << 5) | 1; + /* mode sel: RMII && BGS value: OTP && id */ + val = (2 << 14) | (0 << 12) | (0x1 << 8) | 1; + switch (rate) { + case 24000000: + val |= 0x6 << 5; + break; + case 25000000: + val |= 0x4 << 5; + break; + case 27000000: + val |= 0x5 << 5; + break; + default: + dev_err(rk630->dev, "Unsupported clock rate: %ld\n", rate); + return -EINVAL; + } + ret = regmap_write(rk630->grf, GRF_REG(0x404), val | 0xffff0000); if (ret != 0) { dev_err(rk630->dev, "Could not write to GRF: %d\n", ret); @@ -221,6 +236,7 @@ int rk630_core_probe(struct rk630 *rk630) { bool macphy_enabled = false; struct device_node *np; + unsigned long rate; int ret; rk630->ref_clk = devm_clk_get(rk630->dev, "ref"); @@ -234,6 +250,7 @@ int rk630_core_probe(struct rk630 *rk630) dev_err(rk630->dev, "failed to enable ref clk - %d\n", ret); return ret; } + rate = clk_get_rate(rk630->ref_clk); ret = devm_add_action_or_reset(rk630->dev, (void (*) (void *))clk_disable_unprepare, rk630->ref_clk); @@ -292,7 +309,7 @@ int rk630_core_probe(struct rk630 *rk630) } if (macphy_enabled) - rk630_macphy_enable(rk630); + rk630_macphy_enable(rk630, rate); else rk630_macphy_disable(rk630);