From 927c95d8ef82fe134c1cc8c15b7a875cd0265f8e Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Mon, 26 Jun 2023 09:24:11 +0800 Subject: [PATCH] clk: rockchip: rk3399: fix mac ref clk register description Signed-off-by: Elaine Zhang Change-Id: Ib8f21796a3527d74055ff847a2d36e99208d4772 --- drivers/clk/rockchip/clk-rk3399.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c index a14ece702f31..a8f46c70cd10 100644 --- a/drivers/clk/rockchip/clk-rk3399.c +++ b/drivers/clk/rockchip/clk-rk3399.c @@ -671,9 +671,9 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = { MUX(SCLK_RMII_SRC, "clk_rmii_src", mux_rmii_p, CLK_SET_RATE_PARENT, RK3399_CLKSEL_CON(19), 4, 1, MFLAGS), GATE(SCLK_MACREF_OUT, "clk_mac_refout", "clk_rmii_src", 0, - RK3399_CLKGATE_CON(5), 6, GFLAGS), - GATE(SCLK_MACREF, "clk_mac_ref", "clk_rmii_src", 0, RK3399_CLKGATE_CON(5), 7, GFLAGS), + GATE(SCLK_MACREF, "clk_mac_ref", "clk_rmii_src", 0, + RK3399_CLKGATE_CON(5), 6, GFLAGS), GATE(SCLK_MAC_RX, "clk_rmii_rx", "clk_rmii_src", 0, RK3399_CLKGATE_CON(5), 8, GFLAGS), GATE(SCLK_MAC_TX, "clk_rmii_tx", "clk_rmii_src", 0,