From e489a9600a2602d4ea5a530088524fd1a192e171 Mon Sep 17 00:00:00 2001 From: hejiawencc Date: Tue, 18 Apr 2023 16:40:54 +0800 Subject: [PATCH] =?UTF-8?q?dts=20=E6=B7=BB=E5=8A=A0rk356x=20pwm7=20?= =?UTF-8?q?=E8=AE=BE=E5=A4=87=E6=A0=91=E6=8F=92=E4=BB=B6?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- arch/arm64/boot/dts/rockchip/overlay/Makefile | 1 + .../overlay/rk356x-lubancat-pwm7-ir-overlay.dts | 15 +++++++++++++++ 2 files changed, 16 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rk356x-lubancat-pwm7-ir-overlay.dts diff --git a/arch/arm64/boot/dts/rockchip/overlay/Makefile b/arch/arm64/boot/dts/rockchip/overlay/Makefile index 928397a8776e..35097a4dada8 100644 --- a/arch/arm64/boot/dts/rockchip/overlay/Makefile +++ b/arch/arm64/boot/dts/rockchip/overlay/Makefile @@ -8,6 +8,7 @@ dtbo-$(CONFIG_CPU_RK3568) += \ rk356x-lubancat-i2c5-m0-overlay.dtbo \ rk356x-lubancat-pcie2x1-disabled-overlay.dtbo \ rk356x-lubancat-pwm3-ir-overlay.dtbo \ + rk356x-lubancat-pwm7-ir-overlay.dtbo \ rk356x-lubancat-pwm8-m0-overlay.dtbo \ rk356x-lubancat-pwm9-m0-overlay.dtbo \ rk356x-lubancat-pwm10-m0-overlay.dtbo \ diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk356x-lubancat-pwm7-ir-overlay.dts b/arch/arm64/boot/dts/rockchip/overlay/rk356x-lubancat-pwm7-ir-overlay.dts new file mode 100644 index 000000000000..9bff37fe8e53 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/overlay/rk356x-lubancat-pwm7-ir-overlay.dts @@ -0,0 +1,15 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "rockchip,rk3568"; + + fragment@0 { + target = <&pwm7>; + + __overlay__ { + status = "okay"; + }; + }; +}; +