From e73932057ed297a73bcfacb2fbfad898ed40a306 Mon Sep 17 00:00:00 2001 From: Louis <1270384833@qq.com> Date: Tue, 18 Jul 2023 16:34:37 +0800 Subject: [PATCH] add lvds lcd --- .../rk3566-lubancat-lvds-10.1-800x1280.dtsi | 185 ++++++++++++++++++ 1 file changed, 185 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-lubancat-lvds-10.1-800x1280.dtsi diff --git a/arch/arm64/boot/dts/rockchip/rk3566-lubancat-lvds-10.1-800x1280.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-lubancat-lvds-10.1-800x1280.dtsi new file mode 100644 index 000000000000..30187325e90d --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-lubancat-lvds-10.1-800x1280.dtsi @@ -0,0 +1,185 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 Rockchip Electronics Co., Ltd. + * + */ + +/ { + backlight_lvds_edp: backlight-lvds-edp { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm10 0 50000 0>; + brightness-levels = < + 95 95 95 95 95 95 95 95 + 95 95 95 95 95 95 95 95 + 95 95 95 95 95 95 95 95 + 95 95 95 95 95 95 95 95 + 95 95 95 95 95 95 95 95 + 95 95 95 95 95 95 95 95 + 95 95 95 95 95 95 95 95 + 95 95 95 95 95 95 95 95 + 95 95 95 95 95 95 95 95 + 95 95 95 95 95 95 95 95 + 95 95 95 95 95 95 95 95 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + }; +}; + +&pwm10 { + status = "okay"; +}; + +&video_phy0 { + status = "okay"; +}; + +&dsi0_in_vp1 { + status = "disabled"; +}; + +&dsi0_in_vp0 { + status = "okay"; +}; + +&dsi0 { + status = "okay"; + power-supply = <&mipi_dsi0_power>; + + dsi0_panel: panel@0 { + compatible = "simple-panel-dsi"; + reg = <0>; + backlight = <&backlight_lvds_edp>; + reset-gpios = <&gpio4 RK_PC3 GPIO_ACTIVE_LOW>; + enable-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>; + + enable-delay-ms = <35>; + prepare-delay-ms = <6>; + reset-delay-ms = <0>; + init-delay-ms = <20>; + unprepare-delay-ms = <0>; + disable-delay-ms = <20>; + + size,width = <74>; + size,height = <133>; + + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <4>; + + panel-init-sequence = [ + 15 00 02 27 AA + 15 00 02 48 02 + 15 00 02 B6 20 + 15 00 02 01 20 + 15 00 02 02 00 + 15 00 02 03 53 + 15 00 02 04 48 + 15 00 02 05 18 + 15 00 02 06 18 + 15 00 02 07 00 + 15 00 02 08 0C + 15 00 02 09 02 + 15 00 02 0A 0A + 15 00 02 0B 82 + 15 00 02 0C 13 + 15 00 02 0D 01 + 15 00 02 0E 80 + 15 00 02 0F 20 + 15 00 02 10 20 + 15 00 02 11 03 + 15 00 02 12 1B + 15 00 02 13 53 + 15 00 02 14 01 + 15 00 02 15 23 + 15 00 02 16 40 + 15 00 02 17 00 + 15 00 02 18 01 + 15 00 02 19 23 + 15 00 02 1A 40 + 15 00 02 1B 00 + 15 00 02 1E 46 + 15 00 02 51 30 + 15 00 02 1F 10 + 15 00 02 2A 4D + ]; + + disp_timings0: display-timings { + native-mode = <&dsi0_timing0>; + dsi0_timing0: timing0 { + clock-frequency = <71980800>; + hactive = <800>; + vactive = <1280>; + hsync-len = <24>; + hback-porch = <24>; + hfront-porch = <72>; + vsync-len = <2>; + vback-porch = <10>; + vfront-porch = <12>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + panel_in_dsi: endpoint { + remote-endpoint = <&dsi_out_panel>; + }; + }; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + dsi_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi>; + }; + }; + }; +}; + +&i2c5 { + status = "okay"; + clock-frequency = <100000>; + + gt911: gt911@5d { + status = "okay"; + compatible = "goodix,gt911"; + reg = <0x5d>; + interrupt-parent = <&gpio3>; + interrupts = ; + reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; + irq-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>; + }; +};