From eaddf891b0b883e204ff8b9cd9278d0b0e107b67 Mon Sep 17 00:00:00 2001 From: hejiawencc Date: Mon, 10 Jul 2023 15:08:21 +0800 Subject: [PATCH] =?UTF-8?q?dts=20=E6=8B=86=E5=88=86lbc-1io=E6=A0=B8?= =?UTF-8?q?=E5=BF=83=E6=9D=BF=E5=92=8C=E5=BA=95=E6=9D=BF=E8=AE=BE=E5=A4=87?= =?UTF-8?q?=E6=A0=91=E6=96=87=E4=BB=B6?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../rockchip/rk3566-lubancat-1core-port.dtsi | 200 ++++++ .../dts/rockchip/rk3566-lubancat-1core.dtsi | 566 +++++++++++++++++ .../boot/dts/rockchip/rk3566-lubancat-1io.dts | 590 +----------------- 3 files changed, 776 insertions(+), 580 deletions(-) create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-lubancat-1core-port.dtsi create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-lubancat-1core.dtsi diff --git a/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1core-port.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1core-port.dtsi new file mode 100644 index 000000000000..7cb2b4ceb906 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1core-port.dtsi @@ -0,0 +1,200 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 Rockchip Electronics Co., Ltd. + * Copyright (c) 2023 EmbedFire Electronic Technology Co., Ltd. + * + * LubanCat-1 core connector port devicestree + */ + +/dts-v1/; + +#include +#include +#include "rk3566-lubancat-1core.dtsi" + + +/ { + compatible = "embedfire,lubancat-1core-port", "rockchip,rk3566"; +}; + +&sfc{ + pinctrl-names = "default"; + pinctrl-0 = <&fspi_pins>; + assigned-clock-rates = <50000000>; + status = "disabled"; +}; + +&sdmmc0 { + bus-width = <4>; + vqmmc-supply = <&vccio_sd>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + status = "disabled"; +}; + +/* USB OTG/USB Host_1 USB 2.0 Comb */ +&usb2phy0 { + status = "disabled"; +}; + +&u2phy0_host { + status = "disabled"; +}; + +&u2phy0_otg { + status = "disabled"; +}; + +&usb_host0_ehci { + status = "disabled"; +}; + +&usb_host0_ohci { + status = "disabled"; +}; + +/* USB Host_2/USB Host_3 USB 2.0 Comb */ +&usb2phy1 { + status = "disabled"; +}; + +&u2phy1_otg { + status = "disabled"; +}; + +&u2phy1_host { + status = "disabled"; +}; + +&usb_host1_ehci { + status = "disabled"; +}; + +&usb_host1_ohci { + status = "disabled"; +}; + +/* MULTI_PHY1 For SATA1, USB3.0 HOST1 */ +&combphy1_usq { + status = "disabled"; +}; + +#if 1 //MULTI_PHY1 +/* MULTI_PHY1 For USB3.0 HOST1 */ +&usbhost30 { + status = "disabled"; +}; + +&usbhost_dwc3 { + status = "disabled"; +}; +#else +/* MULTI_PHY1 For SATA1 */ +&sata1 { + status = "disabled"; +}; +#endif //MULTI_PHY1 + +/* MULTI_PHY1 For SATA2, PCIe2.0 */ +&combphy2_psq { + status = "disabled"; +}; + +#if 1 //MULTI_PHY2 +// Default Set PCIe2.0, Use DTBO Switch +/* MULTI_PHY2 For PCIe2.0 */ +&pcie2x1 { + status = "disabled"; +}; +#else +/* MULTI_PHY2 For SATA2 */ +&sata2 { + status = "disabled"; +}; +#endif //MULTI_PHY2 + +&uart6 { + status = "disabled"; +}; + +&uart7 { + status = "disabled"; +}; + +&uart1 { + status = "disabled"; +}; + +&saradc { + status = "okay"; + vref-supply = <&vcca_1v8>; +}; + +&sdmmc2 { + status = "disabled"; +}; + +&gmac1 { + phy-mode = "rgmii"; + clock_in_out = "input"; + + snps,reset-gpio = <&gpio4 RK_PC0 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 100ms, 100ms */ + snps,reset-delays-us = <0 100000 100000>; + + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>; + assigned-clock-rates = <0>, <125000000>; + + pinctrl-names = "default"; + pinctrl-0 = <&gmac1m1_miim + &gmac1m1_tx_bus2 + &gmac1m1_rx_bus2 + &gmac1m1_rgmii_clk + &gmac1m1_rgmii_bus + &gmac1m1_clkinout>; + + tx_delay = <0x16>; + rx_delay = <0x06>; + + phy-handle = <&rgmii_phy1>; + status = "disabled"; +}; + +&mdio1 { + rgmii_phy1: phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + }; +}; + +&i2c4 { + status = "disabled"; +}; + +&i2c2 { + status = "disabled"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2m1_xfer>; +}; + +&uart4 { + status = "disabled"; + pinctrl-names = "default"; + pinctrl-0 = <&uart4m1_xfer>; +}; + +&i2c5 { + status = "disabled"; +}; + +&uart3 { + status = "disabled"; + pinctrl-names = "default"; + pinctrl-0 = <&uart3m1_xfer>; +}; + +&i2c3 { + status = "disabled"; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1core.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1core.dtsi new file mode 100644 index 000000000000..7b314179ac2a --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1core.dtsi @@ -0,0 +1,566 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 Rockchip Electronics Co., Ltd. + * Copyright (c) 2023 EmbedFire Electronic Technology Co., Ltd. + * + * LubanCat-1 core board devicestree + */ + + /dts-v1/; + +#include +#include +#include +#include +#include +#include +#include +#include "rk3566.dtsi" + + +/ { + compatible = "embedfire,lubancat-1core", "rockchip,rk3566"; + + chosen: chosen { + bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0 console=tty1 root=PARTUUID=614e0000-0000 rw rootwait"; + }; + + fiq-debugger { + compatible = "rockchip,fiq-debugger"; + rockchip,serial-id = <2>; + rockchip,wake-irq = <0>; + /* If enable uart uses irq instead of fiq */ + rockchip,irq-mode-enable = <1>; + rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */ + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&uart2m0_xfer>; + status = "okay"; + }; + + debug: debug@fd904000 { + compatible = "rockchip,debug"; + reg = <0x0 0xfd904000 0x0 0x1000>, + <0x0 0xfd905000 0x0 0x1000>, + <0x0 0xfd906000 0x0 0x1000>, + <0x0 0xfd907000 0x0 0x1000>; + }; + + cspmu: cspmu@fd90c000 { + compatible = "rockchip,cspmu"; + reg = <0x0 0xfd90c000 0x0 0x1000>, + <0x0 0xfd90d000 0x0 0x1000>, + <0x0 0xfd90e000 0x0 0x1000>, + <0x0 0xfd90f000 0x0 0x1000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + ramoops: ramoops@110000 { + compatible = "ramoops"; + reg = <0x0 0x110000 0x0 0xf0000>; + record-size = <0x20000>; + console-size = <0x80000>; + ftrace-size = <0x00000>; + pmsg-size = <0x50000>; + }; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v0_sys>; + }; + + rk809_sound: rk809-sound { + status = "okay"; + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,name = "rockchip,rk809-codec"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,widgets = + "Microphone", "Mic Jack", + "Headphone", "Headphone Jack"; + simple-audio-card,routing = + "Mic Jack", "MICBIAS1", + "IN1P", "Mic Jack", + "Headphone Jack", "HPOL", + "Headphone Jack", "HPOR"; + simple-audio-card,cpu { + sound-dai = <&i2s1_8ch>; + }; + simple-audio-card,codec { + sound-dai = <&rk809_codec>; + }; + }; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&dfi { + status = "okay"; +}; + +&dmc { + system-status-freq = < + /*system status freq(KHz)*/ + SYS_STATUS_NORMAL 780000 + SYS_STATUS_REBOOT 1056000 + SYS_STATUS_SUSPEND 324000 + SYS_STATUS_VIDEO_1080P 528000 + SYS_STATUS_BOOST 1056000 + SYS_STATUS_ISP 1056000 + SYS_STATUS_PERFORMANCE 1056000 + >; + center-supply = <&vdd_logic>; + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + vdd_cpu: tcs4525@1c { + compatible = "tcs,tcs452x"; + reg = <0x1c>; + vin-supply = <&vcc5v0_sys>; + regulator-compatible = "fan53555-reg"; + regulator-name = "vdd_cpu"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1390000>; + regulator-ramp-delay = <2300>; + fcs,suspend-voltage-selector = <1>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; + + pinctrl-names = "default", "pmic-sleep", + "pmic-power-off", "pmic-reset"; + pinctrl-0 = <&pmic_int>; + pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; + pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; + pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>; + + rockchip,system-power-controller; + wakeup-source; + #clock-cells = <1>; + clock-output-names = "rk808-clkout1", "rk808-clkout2"; + //fb-inner-reg-idxs = <2>; + /* 1: rst regs (default in codes), 0: rst the pmic */ + pmic-reset-func = <0>; + /* not save the PMIC_POWER_EN register in uboot */ + not-save-power-en = <1>; + + vcc1-supply = <&vcc3v3_sys>; + vcc2-supply = <&vcc3v3_sys>; + vcc3-supply = <&vcc3v3_sys>; + vcc4-supply = <&vcc3v3_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc3v3_sys>; + + pwrkey { + status = "okay"; + }; + + pinctrl_rk8xx: pinctrl_rk8xx { + gpio-controller; + #gpio-cells = <2>; + + rk817_slppin_null: rk817_slppin_null { + pins = "gpio_slp"; + function = "pin_fun0"; + }; + + rk817_slppin_slp: rk817_slppin_slp { + pins = "gpio_slp"; + function = "pin_fun1"; + }; + + rk817_slppin_pwrdn: rk817_slppin_pwrdn { + pins = "gpio_slp"; + function = "pin_fun2"; + }; + + rk817_slppin_rst: rk817_slppin_rst { + pins = "gpio_slp"; + function = "pin_fun3"; + }; + }; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-init-microvolt = <900000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_logic"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-init-microvolt = <900000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_gpu"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + regulator-name = "vcc_ddr"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_npu: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-init-microvolt = <900000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_npu"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_image: LDO_REG1 { + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda0v9_image"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda_0v9"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda0v9_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_acodec"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca_1v8"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca1v8_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca1v8_image: LDO_REG9 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca1v8_image"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_3v3"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc3v3_sd"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + + rk809_codec: codec { + #sound-dai-cells = <0>; + compatible = "rockchip,rk809-codec", "rockchip,rk817-codec"; + clocks = <&cru I2S1_MCLKOUT_TX>; + clock-names = "mclk"; + assigned-clocks = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLK_TX_IOE>; + assigned-clock-rates = <12288000>; + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>, <&cru I2S1_MCLKOUT_TX>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1m0_mclk>; + hp-volume = <20>; + spk-volume = <3>; + //mic-in-differential; + status = "okay"; + }; + }; +}; + +&i2s1_8ch { + status = "okay"; + rockchip,clk-trcm = <1>; + /delete-property/ rockchip,playback-only; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1m0_sclktx + &i2s1m0_lrcktx + &i2s1m0_sdi0 + &i2s1m0_sdo0>; +}; + +&its { + status = "okay"; +}; + +&iep { + status = "okay"; +}; + +&iep_mmu { + status = "okay"; +}; + +&jpegd { + status = "okay"; +}; + +&jpegd_mmu { + status = "okay"; +}; + +&mpp_srv { + status = "okay"; +}; + +&pmu_io_domains { + status = "okay"; + pmuio2-supply = <&vcc3v3_pmu>; + vccio1-supply = <&vccio_acodec>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_3v3>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc_3v3>; + vccio7-supply = <&vcc_3v3>; +}; + +&rk_rga { + status = "okay"; +}; + +&rkvdec { + status = "okay"; +}; + +&rkvdec_mmu { + status = "okay"; +}; + +&rkvenc { + venc-supply = <&vdd_logic>; + status = "okay"; +}; + +&rkvenc_mmu { + status = "okay"; +}; + +&rknpu { + rknpu-supply = <&vdd_npu>; + status = "okay"; +}; + +&rknpu_mmu { + status = "okay"; +}; + +&bus_npu { + bus-supply = <&vdd_logic>; + pvtm-supply = <&vdd_cpu>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + supports-emmc; + non-removable; + max-frequency = <200000000>; + status = "okay"; +}; + +&tsadc { + status = "okay"; +}; + +&vdpu { + status = "okay"; +}; + +&vdpu_mmu { + status = "okay"; +}; + +&vepu { + status = "okay"; +}; + +&vepu_mmu { + status = "okay"; +}; + +&vop { + status = "okay"; + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; +}; + +&vop_mmu { + status = "okay"; +}; + +&vp0 { + rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 | 1 << ROCKCHIP_VOP2_SMART0 | + 1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1 | 1 << ROCKCHIP_VOP2_SMART1)>; + rockchip,primary-plane = ; + cursor-win-id = ; +}; + +&rng { + status = "okay"; +}; + +&pinctrl { + pmic { + pmic_int: pmic_int { + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + soc_slppin_gpio: soc_slppin_gpio { + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>; + }; + + soc_slppin_slp: soc_slppin_slp { + rockchip,pins = <0 RK_PA2 RK_FUNC_1 &pcfg_pull_up>; + }; + + soc_slppin_rst: soc_slppin_rst { + rockchip,pins = <0 RK_PA2 RK_FUNC_2 &pcfg_pull_none>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1io.dts b/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1io.dts index dd23afbfb72c..389cfc954351 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1io.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1io.dts @@ -5,15 +5,8 @@ */ /dts-v1/; - -#include -#include -#include -#include -#include -#include -#include -#include "rk3566.dtsi" +//HDMI输出 +#include "rk3566-lubancat-1core-port.dtsi" //HDMI输出 #include "rk3566-lubancat-hdmi.dtsi" @@ -26,11 +19,7 @@ / { model = "EmbedFire LubanCat-1IO"; - compatible = "embedfire,lubancat", "rockchip,rk3566"; - - chosen: chosen { - bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0 console=tty1 root=PARTUUID=614e0000-0000 rw rootwait"; - }; + compatible = "embedfire,lubancat-1io", "rockchip,rk3566"; leds: leds { status = "okay"; @@ -67,49 +56,6 @@ }; }; - fiq-debugger { - compatible = "rockchip,fiq-debugger"; - rockchip,serial-id = <2>; - rockchip,wake-irq = <0>; - /* If enable uart uses irq instead of fiq */ - rockchip,irq-mode-enable = <1>; - rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */ - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&uart2m0_xfer>; - status = "okay"; - }; - - debug: debug@fd904000 { - compatible = "rockchip,debug"; - reg = <0x0 0xfd904000 0x0 0x1000>, - <0x0 0xfd905000 0x0 0x1000>, - <0x0 0xfd906000 0x0 0x1000>, - <0x0 0xfd907000 0x0 0x1000>; - }; - - cspmu: cspmu@fd90c000 { - compatible = "rockchip,cspmu"; - reg = <0x0 0xfd90c000 0x0 0x1000>, - <0x0 0xfd90d000 0x0 0x1000>, - <0x0 0xfd90e000 0x0 0x1000>, - <0x0 0xfd90f000 0x0 0x1000>; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - ramoops: ramoops@110000 { - compatible = "ramoops"; - reg = <0x0 0x110000 0x0 0xf0000>; - record-size = <0x20000>; - console-size = <0x80000>; - ftrace-size = <0x00000>; - pmsg-size = <0x50000>; - }; - }; - ext_cam_clk: external-camera0-clock { compatible = "fixed-clock"; #clock-cells = <0>; @@ -215,13 +161,13 @@ vin-supply = <&vdd_cam1_5v>; }; - dc_5v: dc-5v { + dc_12v: dc-12v { compatible = "regulator-fixed"; - regulator-name = "dc_5v"; + regulator-name = "dc_12v"; regulator-always-on; regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; }; vcc5v0_sys: vcc5v0-sys { @@ -231,17 +177,7 @@ regulator-boot-on; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; - vin-supply = <&dc_5v>; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc5v0_sys>; + vin-supply = <&dc_12v>; }; // LubanCat1io @@ -353,28 +289,6 @@ regulator-always-on; }; - rk809_sound: rk809-sound { - status = "okay"; - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "rockchip,rk809-codec"; - simple-audio-card,mclk-fs = <256>; - simple-audio-card,widgets = - "Microphone", "Mic Jack", - "Headphone", "Headphone Jack"; - simple-audio-card,routing = - "Mic Jack", "MICBIAS1", - "IN1P", "Mic Jack", - "Headphone Jack", "HPOL", - "Headphone Jack", "HPOR"; - simple-audio-card,cpu { - sound-dai = <&i2s1_8ch>; - }; - simple-audio-card,codec { - sound-dai = <&rk809_codec>; - }; - }; - rk_headset: rk-headset { status = "okay"; compatible = "rockchip_headset"; @@ -654,26 +568,6 @@ }; }; -&i2s1_8ch { - status = "okay"; - rockchip,clk-trcm = <1>; - /delete-property/ rockchip,playback-only; - pinctrl-names = "default"; - pinctrl-0 = <&i2s1m0_sclktx - &i2s1m0_lrcktx - &i2s1m0_sdi0 - &i2s1m0_sdo0>; -}; - -&saradc { - vref-supply = <&vcca_1v8>; - status = "okay"; -}; - -&tsadc { - status = "okay"; -}; - &pwm0 { status = "okay"; }; @@ -686,29 +580,6 @@ status = "okay"; }; -&cpu0 { - cpu-supply = <&vdd_cpu>; -}; - -&dfi { - status = "okay"; -}; - -&dmc { - system-status-freq = < - /*system status freq(KHz)*/ - SYS_STATUS_NORMAL 780000 - SYS_STATUS_REBOOT 1056000 - SYS_STATUS_SUSPEND 324000 - SYS_STATUS_VIDEO_1080P 528000 - SYS_STATUS_BOOST 1056000 - SYS_STATUS_ISP 1056000 - SYS_STATUS_PERFORMANCE 1056000 - >; - center-supply = <&vdd_logic>; - status = "okay"; -}; - &dmc_opp_table { opp-324000000 { opp-hz = /bits/ 64 <324000000>; @@ -739,355 +610,6 @@ }; }; -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - vdd_cpu: tcs4525@1c { - compatible = "tcs,tcs452x"; - reg = <0x1c>; - vin-supply = <&vcc5v0_sys>; - regulator-compatible = "fan53555-reg"; - regulator-name = "vdd_cpu"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1390000>; - regulator-ramp-delay = <2300>; - fcs,suspend-voltage-selector = <1>; - regulator-boot-on; - regulator-always-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk809: pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = <3 IRQ_TYPE_LEVEL_LOW>; - - pinctrl-names = "default", "pmic-sleep", - "pmic-power-off", "pmic-reset"; - pinctrl-0 = <&pmic_int>; - pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; - pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; - pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>; - - rockchip,system-power-controller; - wakeup-source; - #clock-cells = <1>; - clock-output-names = "rk808-clkout1", "rk808-clkout2"; - //fb-inner-reg-idxs = <2>; - /* 1: rst regs (default in codes), 0: rst the pmic */ - pmic-reset-func = <0>; - /* not save the PMIC_POWER_EN register in uboot */ - not-save-power-en = <1>; - - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc5-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - - pwrkey { - status = "okay"; - }; - - pinctrl_rk8xx: pinctrl_rk8xx { - gpio-controller; - #gpio-cells = <2>; - - rk817_slppin_null: rk817_slppin_null { - pins = "gpio_slp"; - function = "pin_fun0"; - }; - - rk817_slppin_slp: rk817_slppin_slp { - pins = "gpio_slp"; - function = "pin_fun1"; - }; - - rk817_slppin_pwrdn: rk817_slppin_pwrdn { - pins = "gpio_slp"; - function = "pin_fun2"; - }; - - rk817_slppin_rst: rk817_slppin_rst { - pins = "gpio_slp"; - function = "pin_fun3"; - }; - }; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-init-microvolt = <900000>; - regulator-ramp-delay = <6001>; - regulator-initial-mode = <0x2>; - regulator-name = "vdd_logic"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-init-microvolt = <900000>; - regulator-ramp-delay = <6001>; - regulator-initial-mode = <0x2>; - regulator-name = "vdd_gpu"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-name = "vcc_ddr"; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vdd_npu: DCDC_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-init-microvolt = <900000>; - regulator-ramp-delay = <6001>; - regulator-initial-mode = <0x2>; - regulator-name = "vdd_npu"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_image: LDO_REG1 { - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-name = "vdda0v9_image"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-name = "vdda_0v9"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-name = "vdda0v9_pmu"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vccio_acodec"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vccio_sd"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc3v3_pmu"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcca_1v8: LDO_REG7 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcca_1v8"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_pmu: LDO_REG8 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcca1v8_pmu"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca1v8_image: LDO_REG9 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcca1v8_image"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc_1v8"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3: SWITCH_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc_3v3"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_sd: SWITCH_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc3v3_sd"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - - rk809_codec: codec { - #sound-dai-cells = <0>; - compatible = "rockchip,rk809-codec", "rockchip,rk817-codec"; - clocks = <&cru I2S1_MCLKOUT_TX>; - clock-names = "mclk"; - assigned-clocks = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLK_TX_IOE>; - assigned-clock-rates = <12288000>; - assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>, <&cru I2S1_MCLKOUT_TX>; - pinctrl-names = "default"; - pinctrl-0 = <&i2s1m0_mclk>; - hp-volume = <20>; - spk-volume = <3>; - //mic-in-differential; - status = "okay"; - }; - }; -}; - -&iep { - status = "okay"; -}; - -&iep_mmu { - status = "okay"; -}; - -&jpegd { - status = "okay"; -}; - -&jpegd_mmu { - status = "okay"; -}; - -&mpp_srv { - status = "okay"; -}; - -&pmu_io_domains { - status = "okay"; - pmuio2-supply = <&vcc3v3_pmu>; - vccio1-supply = <&vccio_acodec>; - vccio3-supply = <&vccio_sd>; - vccio4-supply = <&vcc_3v3>; - vccio5-supply = <&vcc_3v3>; - vccio6-supply = <&vcc_3v3>; - vccio7-supply = <&vcc_3v3>; -}; - -&rk_rga { - status = "okay"; -}; - -&rkvdec { - status = "okay"; -}; - -&rkvdec_mmu { - status = "okay"; -}; - -&rkvenc { - venc-supply = <&vdd_logic>; - status = "okay"; -}; - -&rkvenc_mmu { - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - supports-emmc; - non-removable; - max-frequency = <200000000>; - status = "okay"; -}; &sdmmc0 { max-frequency = <150000000>; @@ -1098,16 +620,11 @@ disable-wp; sd-uhs-sdr104; vmmc-supply = <&vcc3v3_sd>; - vqmmc-supply = <&vccio_sd>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; status = "okay"; }; &uart1 { status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&uart1m0_xfer>; }; &uart3 { @@ -1126,42 +643,6 @@ status = "okay"; }; -&vdpu { - status = "okay"; -}; - -&vdpu_mmu { - status = "okay"; -}; - -&vepu { - status = "okay"; -}; - -&vepu_mmu { - status = "okay"; -}; - -&vop { - status = "okay"; - assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; - assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; -}; - -&vop_mmu { - status = "okay"; -}; - -&vp0 { - rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 | 1 << ROCKCHIP_VOP2_SMART0 | - 1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1 | 1 << ROCKCHIP_VOP2_SMART1)>; - rockchip,primary-plane = ; - cursor-win-id = ; -}; - -&rng { - status = "okay"; -}; /* USB OTG/USB Host_1 USB 2.0 Comb */ &usb2phy0 { @@ -1214,8 +695,6 @@ }; &usbdrd_dwc3 { - dr_mode = "otg"; - extcon = <&usb2phy0>; status = "okay"; }; @@ -1233,39 +712,12 @@ }; &gmac1 { - phy-mode = "rgmii"; - clock_in_out = "input"; - - snps,reset-gpio = <&gpio4 RK_PC0 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 100ms, 100ms */ - snps,reset-delays-us = <0 100000 100000>; - - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>; - assigned-clock-rates = <0>, <125000000>; - - pinctrl-names = "default"; - pinctrl-0 = <&gmac1m1_miim - &gmac1m1_tx_bus2 - &gmac1m1_rx_bus2 - &gmac1m1_rgmii_clk - &gmac1m1_rgmii_bus - &gmac1m1_clkinout>; - + snps,reset-gpio = <&gpio4 RK_PC0 GPIO_ACTIVE_LOW>; tx_delay = <0x16>; rx_delay = <0x06>; - - phy-handle = <&rgmii_phy1>; - status = "okay"; + status = "okay"; }; -&mdio1 { - rgmii_phy1: phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; - }; -}; &pinctrl { cam { @@ -1278,28 +730,6 @@ }; }; - pmic { - pmic_int: pmic_int { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - soc_slppin_gpio: soc_slppin_gpio { - rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>; - }; - - soc_slppin_slp: soc_slppin_slp { - rockchip,pins = <0 RK_PA2 RK_FUNC_1 &pcfg_pull_up>; - }; - - soc_slppin_rst: soc_slppin_rst { - rockchip,pins = <0 RK_PA2 RK_FUNC_2 &pcfg_pull_none>; - }; - - spk_ctl_gpio: spk_ctl_gpio { - rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - lcd { edp_pwr_en: edp-pwr-en { rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;