From ee81350d02dff253ba51f32750aa4191f15532ea Mon Sep 17 00:00:00 2001 From: William Wu Date: Mon, 5 Jun 2023 10:10:01 +0800 Subject: [PATCH] phy: rockchip: naneng-combphy: Fix Rx squelch for RK3528 U3 This patch adjust the RK3528 U3 Rx squelch input filler bandwidth to 3'b110 which is used for rx_lfps, reduce the bandwidth to avoid filtering valid superspeed data. With this patch, it can fix the issue that Kingston U3 Disk (idVendor=0951, idProduct=1666, bcdDevice= 1.10) read error on RK3528 platforms. Change-Id: Ifa4eac24bbdebe020db356ba45dae146f4df22f1 Signed-off-by: William Wu --- drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c index 39354ca45e22..d18a88649db4 100644 --- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c +++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c @@ -468,6 +468,12 @@ static int rk3528_combphy_cfg(struct rockchip_combphy_priv *priv) val |= 0x01 << 17; writel(val, priv->mmio + 0x200); + /* Set Rx squelch input filler bandwidth */ + val = readl(priv->mmio + 0x20c); + val &= ~GENMASK(2, 0); + val |= 0x06; + writel(val, priv->mmio + 0x20c); + param_write(priv->phy_grf, &cfg->pipe_txcomp_sel, false); param_write(priv->phy_grf, &cfg->pipe_txelec_sel, false); param_write(priv->phy_grf, &cfg->usb_mode_set, true);