From f92acd0070a16fccb3806301e8015bd87a2bb901 Mon Sep 17 00:00:00 2001 From: hejiawencc Date: Wed, 26 Jul 2023 15:06:18 +0800 Subject: [PATCH] =?UTF-8?q?dts=20=E6=B7=BB=E5=8A=A0LubanCat-1H=2010.1?= =?UTF-8?q?=E5=AF=B8LVDS=E5=B1=8F=E5=B9=95=E8=AE=BE=E5=A4=87=E6=A0=91?= =?UTF-8?q?=E6=8F=92=E4=BB=B6?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- arch/arm64/boot/dts/rockchip/overlay/Makefile | 1 + ...6-lubancat-1h-lvds-10.1-in-vp0-overlay.dts | 194 ++++++++++++++++++ ...566-lubancat-1h-lvds-edp-touch-overlay.dts | 4 +- .../boot/dts/rockchip/rk3566-lubancat-1h.dts | 2 + .../boot/dts/rockchip/uEnv/uEnvLubanCat1H.txt | 3 +- 5 files changed, 201 insertions(+), 3 deletions(-) create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rk3566-lubancat-1h-lvds-10.1-in-vp0-overlay.dts diff --git a/arch/arm64/boot/dts/rockchip/overlay/Makefile b/arch/arm64/boot/dts/rockchip/overlay/Makefile index 413220f537a1..e57834abb6ed 100644 --- a/arch/arm64/boot/dts/rockchip/overlay/Makefile +++ b/arch/arm64/boot/dts/rockchip/overlay/Makefile @@ -39,6 +39,7 @@ dtbo-$(CONFIG_CPU_RK3568) += \ rk356x-lubancat-uart9-m1-overlay.dtbo \ rk3566-lubancat-0-spi3-m1-gpio-cs-overlay.dtbo \ rk3566-lubancat-1h-edp-in-vp0-overlay.dtbo \ + rk3566-lubancat-1h-lvds-10.1-in-vp0-overlay.dtbo \ rk3566-lubancat-1h-lvds-edp-touch-overlay.dtbo \ rk3566-lubancat-1io-dsi0-in-vp0-7.0-1024x600-overlay.dtbo \ rk3566-lubancat-1io-dsi0-in-vp0-10.1-800x1280-overlay.dtbo \ diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3566-lubancat-1h-lvds-10.1-in-vp0-overlay.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3566-lubancat-1h-lvds-10.1-in-vp0-overlay.dts new file mode 100644 index 000000000000..7cd5fd4777b4 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/overlay/rk3566-lubancat-1h-lvds-10.1-in-vp0-overlay.dts @@ -0,0 +1,194 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +/ { + + fragment@0 { + target = <&route_dsi0>; + + __overlay__ { + status = "okay"; + connect = <&vp0_out_dsi0>; + }; + }; + + fragment@1 { + target = <&video_phy0>; + + __overlay__ { + status = "okay"; + }; + }; + + fragment@2 { + target = <&dsi0_in_vp0>; + + __overlay__ { + status = "okay"; + }; + }; + + fragment@3 { + target = <&dsi0_in_vp1>; + + __overlay__ { + status = "disabled"; + }; + }; + + fragment@4 { + target = <&dsi0>; + + __overlay__ { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + dsi0_panel: panel@0 { + compatible = "simple-panel-dsi"; + reg = <0>; + backlight = <&backlight_lvds_edp>; + reset-gpios = <&gpio4 RK_PC3 GPIO_ACTIVE_LOW>; + enable-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>; + + enable-delay-ms = <35>; + prepare-delay-ms = <6>; + reset-delay-ms = <0>; + init-delay-ms = <20>; + unprepare-delay-ms = <0>; + disable-delay-ms = <20>; + + size,width = <74>; + size,height = <133>; + + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <4>; + + panel-init-sequence = [ + 23 00 02 27 AA + 23 00 02 48 02 + 23 00 02 B6 20 + 23 00 02 01 20 + 23 00 02 02 00 + 23 00 02 03 53 + 23 00 02 04 48 + 23 00 02 05 18 + 23 00 02 06 18 + 23 00 02 07 00 + 23 00 02 08 0C + 23 00 02 09 02 + 23 00 02 0A 0A + 23 00 02 0B 82 + 23 00 02 0C 22 + 23 00 02 0D 01 + 23 00 02 0E 80 + 23 00 02 0F 20 + 23 00 02 10 20 + 23 00 02 11 03 + 23 00 02 12 1B + 23 00 02 13 03 + 23 00 02 14 01 + 23 00 02 15 23 + 23 00 02 16 40 + 23 00 02 17 00 + 23 00 02 18 01 + 23 00 02 19 23 + 23 00 02 1A 40 + 23 00 02 1B 00 + 23 00 02 1E 46 + 23 00 02 51 30 + 23 00 02 1F 10 + 23 00 02 2A 01 + //如下为SSR展频，不加可能点不亮 + 23 00 02 6A 08 + 23 00 02 6C 9E + 23 00 02 6D 07 + 23 00 02 6E 00 + 23 00 02 6F 8A + 23 00 02 70 19 + 23 64 02 71 00 + ]; + + disp_timings0: display-timings { + native-mode = <&dsi0_timing0>; + dsi0_timing0: timing0 { + clock-frequency = <60000000>; + hactive = <800>; + vactive = <1280>; + hsync-len = <24>; + hback-porch = <24>; + hfront-porch = <72>; + vsync-len = <2>; + vback-porch = <10>; + vfront-porch = <12>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + panel_in_dsi: endpoint { + remote-endpoint = <&dsi_out_panel>; + }; + }; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + dsi_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi>; + }; + }; + }; + }; + }; + + fragment@5 { + target = <&route_hdmi>; + + __overlay__ { + status = "disabled"; + }; + }; + + fragment@6 { + target = <&hdmi_in_vp0>; + + __overlay__ { + status = "disabled"; + }; + }; + + fragment@7 { + target = <&hdmi_in_vp1>; + + __overlay__ { + status = "disabled"; + }; + }; + + fragment@8 { + target = <&hdmi>; + + __overlay__ { + status = "disabled"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3566-lubancat-1h-lvds-edp-touch-overlay.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3566-lubancat-1h-lvds-edp-touch-overlay.dts index fdec8775be49..e0d07831f61f 100644 --- a/arch/arm64/boot/dts/rockchip/overlay/rk3566-lubancat-1h-lvds-edp-touch-overlay.dts +++ b/arch/arm64/boot/dts/rockchip/overlay/rk3566-lubancat-1h-lvds-edp-touch-overlay.dts @@ -24,8 +24,8 @@ interrupts = ; reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; irq-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>; - touchscreen-inverted-x = <1>; - touchscreen-inverted-y = <1>; + // touchscreen-inverted-x = <1>; + // touchscreen-inverted-y = <1>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1h.dts b/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1h.dts index 3c76708ea4c5..5a4983edeb0a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1h.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1h.dts @@ -21,6 +21,8 @@ //MIPI摄像头配置 #include "rk3568-lubancat-csi2-double.dtsi" +//LVDS屏幕配置 +// #include "rk3566-lubancat-lvds-10.1-800x1280.dtsi" / { model = "EmbedFire LubanCat-1H"; diff --git a/arch/arm64/boot/dts/rockchip/uEnv/uEnvLubanCat1H.txt b/arch/arm64/boot/dts/rockchip/uEnv/uEnvLubanCat1H.txt index 9fd84dc44153..1a12981b838d 100644 --- a/arch/arm64/boot/dts/rockchip/uEnv/uEnvLubanCat1H.txt +++ b/arch/arm64/boot/dts/rockchip/uEnv/uEnvLubanCat1H.txt @@ -12,8 +12,9 @@ enable_uboot_overlays=1 #dtoverlay=/dtb/overlay/rk3566-lubancat-1io-dsi1-in-vp0-10.1-800x1280-overlay.dtbo #dtoverlay=/dtb/overlay/rk3566-lubancat-1io-dsi1-in-vp0-1080p-overlay.dtbo #dtoverlay=/dtb/overlay/rk3566-lubancat-1io-dsi1-in-vp0-rpi-overlay.dtbo -#edp-in-vp0 +#edp-or-lvds-in-vp0 #dtoverlay=/dtb/overlay/rk3566-lubancat-1h-edp-in-vp0-overlay.dtbo +#dtoverlay=/dtb/overlay/rk3566-lubancat-1h-lvds-10.1-in-vp0-overlay.dtbo #dtoverlay=/dtb/overlay/rk3566-lubancat-1h-lvds-edp-touch-overlay.dtbo #cam0(mipi-csi0) #dtoverlay=/dtb/overlay/rk356x-lubancat-csi0-sc132gs-overlay.dtbo