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gaoyang3513
69
NSPE/Example/DMA/multi_data_ram_to_ram/gd32w51x_libopt.h
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69
NSPE/Example/DMA/multi_data_ram_to_ram/gd32w51x_libopt.h
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/*!
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\file gd32w51x_libopt.h
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\brief library optional for gd32w51x
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\version 2021-10-30, V1.0.0, firmware for GD32W51x
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*/
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/*
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Copyright (c) 2021, GigaDevice Semiconductor Inc.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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#ifndef GD32W51X_LIBOPT_H
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#define GD32W51X_LIBOPT_H
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#include "gd32w51x_adc.h"
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#include "gd32w51x_cau.h"
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#include "gd32w51x_crc.h"
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#include "gd32w51x_dbg.h"
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#include "gd32w51x_dci.h"
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#include "gd32w51x_dma.h"
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#include "gd32w51x_exti.h"
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#include "gd32w51x_fmc.h"
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#include "gd32w51x_fwdgt.h"
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#include "gd32w51x_gpio.h"
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#include "gd32w51x_hau.h"
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#include "gd32w51x_hpdf.h"
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#include "gd32w51x_i2c.h"
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#include "gd32w51x_icache.h"
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#include "gd32w51x_misc.h"
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#include "gd32w51x_pkcau.h"
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#include "gd32w51x_pmu.h"
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#include "gd32w51x_qspi.h"
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#include "gd32w51x_rcu.h"
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#include "gd32w51x_rtc.h"
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#include "gd32w51x_sdio.h"
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#include "gd32w51x_spi.h"
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#include "gd32w51x_sqpi.h"
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#include "gd32w51x_syscfg.h"
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#include "gd32w51x_timer.h"
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#include "gd32w51x_trng.h"
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#include "gd32w51x_tsi.h"
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#include "gd32w51x_tzpcu.h"
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#include "gd32w51x_usart.h"
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#include "gd32w51x_wwdgt.h"
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#endif /* GD32W51X_LIBOPT_H */
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160
NSPE/Example/DMA/multi_data_ram_to_ram/main.c
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160
NSPE/Example/DMA/multi_data_ram_to_ram/main.c
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/*!
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\file main.c
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\brief DMA transfer data from RAM to RAM
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\version 2021-10-30, V1.0.0, firmware for GD32W51x
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*/
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/*
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Copyright (c) 2021, GigaDevice Semiconductor Inc.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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#include "gd32w51x.h"
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#include <stdio.h>
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#include "gd32w515p_eval.h"
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#define BUFFER_SIZE (256U)
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static void led_config(void);
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static void fill_buffer_size(void);
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static void dma_config(void);
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static ErrStatus memory_compare(uint16_t* src, uint16_t* dst, uint16_t length);
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uint16_t source[BUFFER_SIZE];
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uint16_t destination[BUFFER_SIZE];
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ErrStatus status;
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/*!
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\brief main function
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\param[in] none
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\param[out] none
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\retval none
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*/
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int main(void)
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{
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/* LED initialize */
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led_config();
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/* fill the buffer with specified value */
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fill_buffer_size();
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/* configure the DMA channel */
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dma_config();
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/* wait for DMA transfer to complete */
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while(!dma_flag_get(DMA1,DMA_CH0, DMA_FLAG_FTF));
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/* compare data */
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status = memory_compare((uint16_t *)source, (uint16_t *)destination, BUFFER_SIZE);
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if(SUCCESS == status){
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gd_eval_led_on(LED1);
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}else{
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gd_eval_led_on(LED3);
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}
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while(1);
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}
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/*!
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\brief configure LED
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\param[in] none
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\param[out] none
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\retval none
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*/
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static void led_config(void)
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{
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/* LED initialize */
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gd_eval_led_init(LED1);
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gd_eval_led_init(LED3);
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}
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/*!
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\brief fill the buffer with specified value
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\param[in] none
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\param[out] none
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\retval none
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*/
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static void fill_buffer_size(void)
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{
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uint32_t i;
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for(i=0;i < BUFFER_SIZE;i++){
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source[i] = i;
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}
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}
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/*!
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\brief configure the DMA channel
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\param[in] none
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\param[out] none
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\retval none
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*/
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static void dma_config(void)
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{
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dma_multi_data_parameter_struct dma_init_parameter;
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dma_multi_data_para_struct_init(&dma_init_parameter);
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/* peripheral clock enable */
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rcu_periph_clock_enable(RCU_DMA1);
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/* DMA peripheral configure */
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dma_deinit(DMA1, DMA_CH0);
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dma_init_parameter.periph_addr = (uint32_t)source;
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dma_init_parameter.periph_width = DMA_PERIPH_WIDTH_16BIT;
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dma_init_parameter.periph_inc = DMA_PERIPH_INCREASE_ENABLE;
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dma_init_parameter.memory0_addr = (uint32_t)destination;
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dma_init_parameter.memory_width = DMA_MEMORY_WIDTH_16BIT;
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dma_init_parameter.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
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dma_init_parameter.memory_burst_width = DMA_MEMORY_BURST_4_BEAT;
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dma_init_parameter.periph_burst_width = DMA_PERIPH_BURST_4_BEAT;
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dma_init_parameter.critical_value = DMA_FIFO_2_WORD;
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dma_init_parameter.circular_mode = DMA_CIRCULAR_MODE_DISABLE;
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dma_init_parameter.direction = DMA_MEMORY_TO_MEMORY;
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dma_init_parameter.number = BUFFER_SIZE;
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dma_init_parameter.priority = DMA_PRIORITY_ULTRA_HIGH;
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dma_multi_data_mode_init(DMA1,DMA_CH0, &dma_init_parameter);
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/* enable DMA channel */
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dma_channel_enable(DMA1, DMA_CH0);
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}
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/*!
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\brief memory compare function
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\param[in] src : source data
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\param[in] dst : destination data
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\param[in] length : the compare data length
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\param[out] none
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\retval ErrStatus : ERROR or SUCCESS
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*/
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ErrStatus memory_compare(uint16_t* src, uint16_t* dst, uint16_t length)
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{
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while (length--){
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if (*src++ != *dst++){
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return ERROR;
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}
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}
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return SUCCESS;
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}
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39
NSPE/Example/DMA/multi_data_ram_to_ram/readme.txt
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39
NSPE/Example/DMA/multi_data_ram_to_ram/readme.txt
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@ -0,0 +1,39 @@
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/*!
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\file readme.txt
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\brief Description of the DMA mutiple data transfer demo
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\version 2021-10-30, V1.0.0, firmware for GD32W51x
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*/
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/*
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Copyright (c) 2021, GigaDevice Semiconductor Inc.
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Redistribution and use in source and binary forms, with or without modification,
|
||||
are permitted provided that the following conditions are met:
|
||||
|
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1. Redistributions of source code must retain the above copyright notice, this
|
||||
list of conditions and the following disclaimer.
|
||||
2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
this list of conditions and the following disclaimer in the documentation
|
||||
and/or other materials provided with the distribution.
|
||||
3. Neither the name of the copyright holder nor the names of its contributors
|
||||
may be used to endorse or promote products derived from this software without
|
||||
specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
|
||||
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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This demo is based on the GD32W515P-EVAL-V1.0 board, it shows how to use DMA mutiple data
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transfer mode.
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This demo shows how to configure DMA, transfer data from memory to memory(only for DMA1).
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If the operation successfully, LED1 will be turned on. Otherwise, LED3 will be turned on.
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