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gaoyang3513
2023-05-18 18:53:00 +08:00
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NSPE/Example/RCU/System_clock_switch/main.c Normal file
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/*!
\file main.c
\brief system clock switch example
\version 2021-10-30, V1.0.0, firmware for GD32W51x
*/
/*
Copyright (c) 2021, GigaDevice Semiconductor Inc.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the copyright holder nor the names of its contributors
may be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
OF SUCH DAMAGE.
*/
#include "gd32w51x.h"
#include <stdio.h>
#include "gd32w515p_eval.h"
static void _delay(uint32_t timeout);
static void switch_system_clock_to_120m_hxtal(void);
static void switch_system_clock_to_180m_irc16m(void);
/*!
\brief main function
\param[in] none
\param[out] none
\retval none
*/
int main(void)
{
/* initialize the USART */
gd_eval_com_init(EVAL_COM0);
printf("\r\nCK_SYS switch test demo\r\n");
/* disable the USART */
usart_disable(EVAL_COM0);
/* switch system clock to 120MHz by HXTAL */
switch_system_clock_to_120m_hxtal();
gd_eval_com_init(EVAL_COM0);
/* print out the clock frequency of system */
printf("\r\nCK_SYS is %d", rcu_clock_freq_get(CK_SYS));
_delay(1000);
/* switch system clock to 180MHz by IRC8M */
switch_system_clock_to_180m_irc16m();
gd_eval_com_init(EVAL_COM0);
/* print out the clock frequency of system */
printf("\r\nCK_SYS is %d", rcu_clock_freq_get(CK_SYS));
while(1){
}
}
/*!
\brief delay function
\param[in] timeout: time out
\param[out] none
\retval none
*/
static void _delay(uint32_t timeout)
{
__IO uint32_t i,j;
for(i=0; i<timeout; i++){
for(j=0; j<500; j++){
}
}
}
/*!
\brief switch system clock to 120M by HXTAL
\param[in] none
\param[out] none
\retval none
*/
static void switch_system_clock_to_120m_hxtal(void)
{
uint32_t timeout = 0U;
uint32_t stab_flag = 0U;
rcu_system_clock_source_config(RCU_CKSYSSRC_IRC16M);
rcu_deinit();
/* power up HXTAL */
RCU_CTL |= RCU_CTL_HXTALPU;
/* enable HXTAL */
RCU_CTL |= RCU_CTL_HXTALEN;
RCU_CTL |= RCU_CTL_HXTALENPLL;
{
int i;
for( i = 0 ; i < 0x20 ; i++ );
}
RCU_CTL |= RCU_CTL_HXTALREADY;
/* wait until HXTAL is stable or the startup time is longer than HXTAL_STARTUP_TIMEOUT */
do{
timeout++;
stab_flag = (RCU_CTL & RCU_CTL_HXTALSTB);
}while((0U == stab_flag) && (HXTAL_STARTUP_TIMEOUT != timeout));
/* if fail */
if(0U == (RCU_CTL & RCU_CTL_HXTALSTB)){
while(1){
}
}
RCU_APB1EN |= RCU_APB1EN_PMUEN;
PMU_CTL0 |= PMU_CTL0_LDOVS;
/* HXTAL is stable */
/* AHB = SYSCLK */
RCU_CFG0 |= RCU_AHB_CKSYS_DIV1;
/* APB2 = AHB/2 */
RCU_CFG0 |= RCU_APB2_CKAHB_DIV2;
/* APB1 = AHB/4 */
RCU_CFG0 |= RCU_APB1_CKAHB_DIV4;
/* configure the main PLL, PSC = 40, PLL_N = 240, PLL_P = 2 */
RCU_PLL = (40U | (240U << 6U) | (((2U >> 1U) - 1U) << 16U) |
(RCU_PLLSRC_HXTAL) );
/* enable PLL */
RCU_CTL |= RCU_CTL_PLLEN;
/* wait until PLL is stable */
while(0U == (RCU_CTL & RCU_CTL_PLLSTB)){
}
/* select PLL as system clock */
RCU_CFG0 &= ~RCU_CFG0_SCS;
RCU_CFG0 |= RCU_CKSYSSRC_PLLP;
/* wait until PLL is selected as system clock */
while(0U == (RCU_CFG0 & RCU_SCSS_PLLP)){
}
}
/*!
\brief switch system clock to 180M by IRC16M
\param[in] none
\param[out] none
\retval none
*/
static void switch_system_clock_to_180m_irc16m(void)
{
uint32_t timeout = 0U;
uint32_t stab_flag = 0U;
rcu_system_clock_source_config(RCU_CKSYSSRC_IRC16M);
rcu_deinit();
/* enable IRC16M */
RCU_CTL |= RCU_CTL_IRC16MEN;
/* wait until IRC16M is stable or the startup time is longer than IRC16M_STARTUP_TIMEOUT */
do{
timeout++;
stab_flag = (RCU_CTL & RCU_CTL_IRC16MSTB);
}while((0U == stab_flag) && (IRC16M_STARTUP_TIMEOUT != timeout));
/* if fail */
if(0U == (RCU_CTL & RCU_CTL_IRC16MSTB)){
while(1){
}
}
RCU_APB1EN |= RCU_APB1EN_PMUEN;
PMU_CTL0 |= PMU_CTL0_LDOVS;
/* IRC16M is stable */
/* AHB = SYSCLK */
RCU_CFG0 |= RCU_AHB_CKSYS_DIV1;
/* APB2 = AHB/2 */
RCU_CFG0 |= RCU_APB2_CKAHB_DIV2;
/* APB1 = AHB/4 */
RCU_CFG0 |= RCU_APB1_CKAHB_DIV4;
/* configure the main PLL, PSC = 16, PLL_N = 360, PLL_P = 2 */
RCU_PLL = (16U | (360U << 6U) | (((2U >> 1U) - 1U) << 16U) |
(RCU_PLLSRC_IRC16M) );
/* enable PLL */
RCU_CTL |= RCU_CTL_PLLEN;
/* wait until PLL is stable */
while(0U == (RCU_CTL & RCU_CTL_PLLSTB)){
}
/* select PLL as system clock */
RCU_CFG0 &= ~RCU_CFG0_SCS;
RCU_CFG0 |= RCU_CKSYSSRC_PLLP;
/* wait until PLL is selected as system clock */
while(0U == (RCU_CFG0 & RCU_SCSS_PLLP)){
}
}
/* retarget the C library printf function to the USART */
int fputc(int ch, FILE *f)
{
usart_data_transmit(EVAL_COM0, (uint8_t)ch);
while(RESET == usart_flag_get(EVAL_COM0, USART_FLAG_TBE));
return ch;
}