[Add] First commit
This commit is contained in:
152
NSPE/Example/USART/IDLE_receiver_interrupt/gd32w51x_it.c
Normal file
152
NSPE/Example/USART/IDLE_receiver_interrupt/gd32w51x_it.c
Normal file
@ -0,0 +1,152 @@
|
||||
/*!
|
||||
\file gd32e501_it.c
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\brief interrupt service routines
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|
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\version 2021-10-30, V1.0.0, firmware for GD32W51x
|
||||
*/
|
||||
|
||||
/*
|
||||
Copyright (c) 2021, GigaDevice Semiconductor Inc.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without modification,
|
||||
are permitted provided that the following conditions are met:
|
||||
|
||||
1. Redistributions of source code must retain the above copyright notice, this
|
||||
list of conditions and the following disclaimer.
|
||||
2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
this list of conditions and the following disclaimer in the documentation
|
||||
and/or other materials provided with the distribution.
|
||||
3. Neither the name of the copyright holder nor the names of its contributors
|
||||
may be used to endorse or promote products derived from this software without
|
||||
specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
|
||||
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
|
||||
OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "gd32w51x_it.h"
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#include "gd32w515p_eval.h"
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extern uint8_t rx_count;
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extern uint8_t receive_flag;
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/*!
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\brief this function handles NMI exception
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\param[in] none
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||||
\param[out] none
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\retval none
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*/
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void NMI_Handler(void)
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{
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}
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/*!
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\brief this function handles HardFault exception
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\param[in] none
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||||
\param[out] none
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||||
\retval none
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||||
*/
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||||
void HardFault_Handler(void)
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{
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/* if Hard Fault exception occurs, go to infinite loop */
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while(1);
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}
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/*!
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\brief this function handles MemManage exception
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\param[in] none
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\param[out] none
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\retval none
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||||
*/
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void MemManage_Handler(void)
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{
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/* if Memory Manage exception occurs, go to infinite loop */
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while(1);
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}
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/*!
|
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\brief this function handles BusFault exception
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\param[in] none
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\param[out] none
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\retval none
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||||
*/
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void BusFault_Handler(void)
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{
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/* if Bus Fault exception occurs, go to infinite loop */
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while(1);
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}
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/*!
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\brief this function handles UsageFault exception
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\param[in] none
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||||
\param[out] none
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\retval none
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*/
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void UsageFault_Handler(void)
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{
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/* if Usage Fault exception occurs, go to infinite loop */
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while(1);
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}
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/*!
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\brief this function handles SVC exception
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\param[in] none
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\param[out] none
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\retval none
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*/
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void SVC_Handler(void)
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{
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}
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/*!
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\brief this function handles DebugMon exception
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\param[in] none
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\param[out] none
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\retval none
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*/
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void DebugMon_Handler(void)
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{
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}
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/*!
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\brief this function handles PendSV exception
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\param[in] none
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\param[out] none
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\retval none
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*/
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void PendSV_Handler(void)
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{
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}
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/*!
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\brief this function handles USART interrupt request
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\param[in] none
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\param[out] none
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\retval none
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*/
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void USART2_IRQHandler(void)
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{
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if(RESET != usart_interrupt_flag_get(EVAL_COM0, USART_INT_FLAG_IDLE)){
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usart_interrupt_flag_clear(EVAL_COM0, USART_INT_FLAG_IDLE);
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gd_eval_led_toggle(LED1);
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/* number of data received */
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rx_count = 256 - (dma_transfer_number_get(DMA0, DMA_CH1));
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receive_flag = 1;
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/* disable DMA and reconfigure */
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dma_channel_disable(DMA0, DMA_CH1);
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dma_flag_clear(DMA0, DMA_CH1, DMA_FLAG_FTF);
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dma_transfer_number_config(DMA0, DMA_CH1, 256);
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dma_channel_enable(DMA0, DMA_CH1);
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}
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}
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||||
62
NSPE/Example/USART/IDLE_receiver_interrupt/gd32w51x_it.h
Normal file
62
NSPE/Example/USART/IDLE_receiver_interrupt/gd32w51x_it.h
Normal file
@ -0,0 +1,62 @@
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||||
/*!
|
||||
\file gd32w51x_it.h
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\brief the header file of the ISR
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||||
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\version 2021-10-30, V1.0.0, firmware for GD32W51x
|
||||
*/
|
||||
|
||||
/*
|
||||
Copyright (c) 2021, GigaDevice Semiconductor Inc.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without modification,
|
||||
are permitted provided that the following conditions are met:
|
||||
|
||||
1. Redistributions of source code must retain the above copyright notice, this
|
||||
list of conditions and the following disclaimer.
|
||||
2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
this list of conditions and the following disclaimer in the documentation
|
||||
and/or other materials provided with the distribution.
|
||||
3. Neither the name of the copyright holder nor the names of its contributors
|
||||
may be used to endorse or promote products derived from this software without
|
||||
specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
|
||||
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
|
||||
OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef GD32W51X_IT_H
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#define GD32W51X_IT_H
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#include "gd32w51x.h"
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/* function declarations */
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/* this function handles NMI exception */
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void NMI_Handler(void);
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/* this function handles HardFault exception */
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||||
void HardFault_Handler(void);
|
||||
/* this function handles MemManage exception */
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||||
void MemManage_Handler(void);
|
||||
/* this function handles BusFault exception */
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void BusFault_Handler(void);
|
||||
/* this function handles UsageFault exception */
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void UsageFault_Handler(void);
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||||
/* this function handles SVC exception */
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void SVC_Handler(void);
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||||
/* this function handles DebugMon exception */
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void DebugMon_Handler(void);
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||||
/* this function handles PendSV exception */
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void PendSV_Handler(void);
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||||
/* this function handles SysTick exception */
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void SysTick_Handler(void);
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/* this function handles USART2 exception */
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void USART2_IRQHandler(void);
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#endif /* GD32W51X_IT_H */
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70
NSPE/Example/USART/IDLE_receiver_interrupt/gd32w51x_libopt.h
Normal file
70
NSPE/Example/USART/IDLE_receiver_interrupt/gd32w51x_libopt.h
Normal file
@ -0,0 +1,70 @@
|
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/*!
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\file gd32w51x_libopt.h
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\brief library optional for gd32w51x
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||||
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||||
\version 2021-10-30, V1.0.0, firmware for GD32W51x
|
||||
*/
|
||||
|
||||
/*
|
||||
Copyright (c) 2021, GigaDevice Semiconductor Inc.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without modification,
|
||||
are permitted provided that the following conditions are met:
|
||||
|
||||
1. Redistributions of source code must retain the above copyright notice, this
|
||||
list of conditions and the following disclaimer.
|
||||
2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
this list of conditions and the following disclaimer in the documentation
|
||||
and/or other materials provided with the distribution.
|
||||
3. Neither the name of the copyright holder nor the names of its contributors
|
||||
may be used to endorse or promote products derived from this software without
|
||||
specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
|
||||
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
|
||||
OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef GD32W51X_LIBOPT_H
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#define GD32W51X_LIBOPT_H
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#include "gd32w51x_adc.h"
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#include "gd32w51x_cau.h"
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#include "gd32w51x_crc.h"
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#include "gd32w51x_dbg.h"
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#include "gd32w51x_dci.h"
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#include "gd32w51x_dma.h"
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#include "gd32w51x_efuse.h"
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#include "gd32w51x_exti.h"
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||||
#include "gd32w51x_fmc.h"
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#include "gd32w51x_fwdgt.h"
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#include "gd32w51x_gpio.h"
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||||
#include "gd32w51x_hau.h"
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#include "gd32w51x_hpdf.h"
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||||
#include "gd32w51x_i2c.h"
|
||||
#include "gd32w51x_icache.h"
|
||||
#include "gd32w51x_misc.h"
|
||||
#include "gd32w51x_pkcau.h"
|
||||
#include "gd32w51x_pmu.h"
|
||||
#include "gd32w51x_qspi.h"
|
||||
#include "gd32w51x_rcu.h"
|
||||
#include "gd32w51x_rtc.h"
|
||||
#include "gd32w51x_sdio.h"
|
||||
#include "gd32w51x_spi.h"
|
||||
#include "gd32w51x_sqpi.h"
|
||||
#include "gd32w51x_syscfg.h"
|
||||
#include "gd32w51x_timer.h"
|
||||
#include "gd32w51x_trng.h"
|
||||
#include "gd32w51x_tsi.h"
|
||||
#include "gd32w51x_tzpcu.h"
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||||
#include "gd32w51x_usart.h"
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||||
#include "gd32w51x_wwdgt.h"
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||||
|
||||
#endif /* GD32W51X_LIBOPT_H */
|
||||
168
NSPE/Example/USART/IDLE_receiver_interrupt/main.c
Normal file
168
NSPE/Example/USART/IDLE_receiver_interrupt/main.c
Normal file
@ -0,0 +1,168 @@
|
||||
/*!
|
||||
\file main.c
|
||||
\brief USART DMA receive by IDLE interrupt
|
||||
|
||||
\version 2021-10-30, V1.0.0, firmware for GD32W51x
|
||||
*/
|
||||
|
||||
/*
|
||||
Copyright (c) 2021, GigaDevice Semiconductor Inc.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without modification,
|
||||
are permitted provided that the following conditions are met:
|
||||
|
||||
1. Redistributions of source code must retain the above copyright notice, this
|
||||
list of conditions and the following disclaimer.
|
||||
2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
this list of conditions and the following disclaimer in the documentation
|
||||
and/or other materials provided with the distribution.
|
||||
3. Neither the name of the copyright holder nor the names of its contributors
|
||||
may be used to endorse or promote products derived from this software without
|
||||
specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
|
||||
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
|
||||
OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "gd32w51x.h"
|
||||
#include <stdio.h>
|
||||
#include "gd32w515p_eval.h"
|
||||
|
||||
#define USART2_RDATA_ADDRESS ((uint32_t)&USART_RDATA(USART2))
|
||||
|
||||
uint8_t rxbuffer[256];
|
||||
uint8_t rx_count = 0;
|
||||
uint8_t tx_count = 0;
|
||||
__IO uint8_t receive_flag = 0;
|
||||
|
||||
void dma_config(void);
|
||||
void usart_config(void);
|
||||
void nvic_config(void);
|
||||
|
||||
/*!
|
||||
\brief main function
|
||||
\param[in] none
|
||||
\param[out] none
|
||||
\retval none
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
gd_eval_led_init(LED1);
|
||||
gd_eval_led_on(LED1);
|
||||
nvic_config();
|
||||
|
||||
/* initialize DMA */
|
||||
dma_config();
|
||||
|
||||
/* initialize USART */
|
||||
usart_config();
|
||||
|
||||
/*wait IDLEF set and clear it*/
|
||||
while(RESET == usart_flag_get(EVAL_COM0, USART_FLAG_IDLE));
|
||||
usart_flag_clear(EVAL_COM0, USART_FLAG_IDLE);
|
||||
usart_interrupt_enable(EVAL_COM0, USART_INT_IDLE);
|
||||
|
||||
/* wait the data is received and send to the hyperterminal */
|
||||
while(1){
|
||||
if(1 == receive_flag){
|
||||
for(tx_count = 0; tx_count < rx_count; tx_count++){
|
||||
while(RESET == usart_flag_get(EVAL_COM0, USART_FLAG_TBE));
|
||||
usart_data_transmit(EVAL_COM0, rxbuffer[tx_count]);
|
||||
}
|
||||
receive_flag = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*!
|
||||
\brief DMA configuration
|
||||
\param[in] none
|
||||
\param[out] none
|
||||
\retval none
|
||||
*/
|
||||
void dma_config(void)
|
||||
{
|
||||
dma_single_data_parameter_struct dma_init_struct;
|
||||
rcu_periph_clock_enable(RCU_DMA0);
|
||||
dma_deinit(DMA0, DMA_CH1);
|
||||
dma_single_data_para_struct_init(&dma_init_struct);
|
||||
dma_init_struct.periph_addr = USART2_RDATA_ADDRESS;
|
||||
dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
|
||||
dma_init_struct.memory0_addr = (uint32_t)rxbuffer;
|
||||
dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
|
||||
dma_init_struct.periph_memory_width = DMA_MEMORY_WIDTH_8BIT;
|
||||
dma_init_struct.circular_mode = DMA_CIRCULAR_MODE_DISABLE;
|
||||
dma_init_struct.direction = DMA_PERIPH_TO_MEMORY;
|
||||
dma_init_struct.number = 256;
|
||||
dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
|
||||
dma_single_data_mode_init(DMA0, DMA_CH1, &dma_init_struct);
|
||||
|
||||
/* select DMA0 channel1 peripheral */
|
||||
dma_channel_subperipheral_select(DMA0, DMA_CH1, DMA_SUBPERI4);
|
||||
/* enable DMA0 channel1 */
|
||||
dma_channel_enable(DMA0, DMA_CH1);
|
||||
}
|
||||
|
||||
/*!
|
||||
\brief configure USART
|
||||
\param[in] none
|
||||
\param[out] none
|
||||
\retval none
|
||||
*/
|
||||
void usart_config(void)
|
||||
{
|
||||
/* enable GPIO clock */
|
||||
rcu_periph_clock_enable(RCU_GPIOB);
|
||||
|
||||
/* enable USART clock */
|
||||
rcu_periph_clock_enable(RCU_USART2);
|
||||
|
||||
/* connect port to USART TX */
|
||||
gpio_af_set(GPIOB, GPIO_AF_7, GPIO_PIN_10);
|
||||
/* connect port to USART RX */
|
||||
gpio_af_set(GPIOB, GPIO_AF_7, GPIO_PIN_11);
|
||||
|
||||
/* configure USART TX as alternate function push-pull */
|
||||
gpio_mode_set(GPIOB, GPIO_MODE_AF, GPIO_PUPD_PULLUP, GPIO_PIN_10);
|
||||
gpio_output_options_set(GPIOB, GPIO_OTYPE_PP, GPIO_OSPEED_10MHZ, GPIO_PIN_10);
|
||||
|
||||
/* configure USART RX as alternate function push-pull */
|
||||
gpio_mode_set(GPIOB, GPIO_MODE_AF, GPIO_PUPD_PULLUP, GPIO_PIN_11);
|
||||
gpio_output_options_set(GPIOB, GPIO_OTYPE_PP, GPIO_OSPEED_10MHZ, GPIO_PIN_11);
|
||||
|
||||
/* USART configuration */
|
||||
usart_deinit(USART2);
|
||||
usart_baudrate_set(USART2, 115200U);
|
||||
usart_receive_config(USART2, USART_RECEIVE_ENABLE);
|
||||
usart_transmit_config(USART2, USART_TRANSMIT_ENABLE);
|
||||
usart_dma_enable(USART2, USART_DMA_RECEIVE);
|
||||
usart_dma_enable(USART2, USART_DMA_TRANSMIT);
|
||||
usart_enable(USART2);
|
||||
}
|
||||
|
||||
/*!
|
||||
\brief configure NVIC
|
||||
\param[in] none
|
||||
\param[out] none
|
||||
\retval none
|
||||
*/
|
||||
void nvic_config(void)
|
||||
{
|
||||
nvic_irq_enable(USART2_IRQn, 0, 0);
|
||||
}
|
||||
|
||||
/* retarget the C library printf function to the USART */
|
||||
int fputc(int ch, FILE *f)
|
||||
{
|
||||
usart_data_transmit(EVAL_COM0, (uint8_t)ch);
|
||||
while(RESET == usart_flag_get(EVAL_COM0, USART_FLAG_TBE));
|
||||
return ch;
|
||||
}
|
||||
39
NSPE/Example/USART/IDLE_receiver_interrupt/readme.txt
Normal file
39
NSPE/Example/USART/IDLE_receiver_interrupt/readme.txt
Normal file
@ -0,0 +1,39 @@
|
||||
/*!
|
||||
\file readme.txt
|
||||
\brief description of the UASRT DMA receive by IDLE interrupt
|
||||
|
||||
\version 2021-10-30, V1.0.0, firmware for GD32W51x
|
||||
*/
|
||||
|
||||
/*
|
||||
Copyright (c) 2021, GigaDevice Semiconductor Inc.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without modification,
|
||||
are permitted provided that the following conditions are met:
|
||||
|
||||
1. Redistributions of source code must retain the above copyright notice, this
|
||||
list of conditions and the following disclaimer.
|
||||
2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
this list of conditions and the following disclaimer in the documentation
|
||||
and/or other materials provided with the distribution.
|
||||
3. Neither the name of the copyright holder nor the names of its contributors
|
||||
may be used to endorse or promote products derived from this software without
|
||||
specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
|
||||
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
|
||||
OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
This demo is based on the GD32W515P-EVAL-V1.0 board, it shows how to use the USART
|
||||
DMA receive data by IDLE interrupt(the length of data is not fixed).
|
||||
Firstly, the LED1 is on and USART waiting for receiving max 256 bytes data from the
|
||||
hyperterminal. Every time if the number of data(length is not fixed) you sent from the,
|
||||
hyperterminal, LED1 will be toggled.
|
||||
Reference in New Issue
Block a user