RTOS/SDK_GD32W51x
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

[Mod] CMT2310 GPIO SPI初始化

Browse Source
This commit is contained in:
gaoyang3513
2024-07-25 18:21:42 +08:00
parent 47725a5b15
commit 48bc218fb1
5 changed files with 145 additions and 109 deletions
Download Patch File Download Diff File Expand all files Collapse all files

34
NSPE/Example/TIMER/TIMER2_timebase/main.c
View File

@ -1,34 +1,34 @@
/*!
\file main.c
\brief TIMER2 oc timebase demo for gd32w51x
\version 2021-10-30, V1.0.0, firmware for GD32W51x
*/
/*
Copyright (c) 2021, GigaDevice Semiconductor Inc.
Redistribution and use in source and binary forms, with or without modification,
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the copyright holder nor the names of its contributors
may be used to endorse or promote products derived from this software without
3. Neither the name of the copyright holder nor the names of its contributors
may be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
OF SUCH DAMAGE.
*/
@ -61,7 +61,7 @@ void nvic_config(void)
void timer_config(void)
{
/* ----------------------------------------------------------------------------
TIMER2 Configuration:
TIMER2 Configuration:
TIMER2CLK = SystemCoreClock/9000 = 20KHz.
TIMER2 configuration is timing mode, and the timing is 0.2s(4000/20000 = 0.2s).
---------------------------------------------------------------------------- */

2
NSPE/WIFI_IOT/bsp/drivers/0_Project/IAR_for_Stm8/Uart_PingPong/main.c
View File

@ -59,7 +59,7 @@ static BSP_BTN_EVENT_t BTN_Event;
int ebyte_main( void )
{
/* <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>Դ <20><>ʼ<EFBFBD><CABC> */
// Ebyte_BSP_Init();
Ebyte_BSP_Init();
/* (<28><>ѡ) <20><><EFBFBD><EFBFBD><EFBFBD>жϽ<D0B6><CFBD><EFBFBD>FIFO <20>ɸ<EFBFBD><C9B8><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD>д<EFBFBD><D0B4><EFBFBD> */
// Ebyte_FIFO_Init( &hfifo, EBYTE_FIFO_SIZE );
/* EBYTE <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC> */

126
NSPE/WIFI_IOT/bsp/drivers/2_Ebyte_Board_Support/E15-EVB02/board.c
View File

@ -22,6 +22,7 @@
#include "board.h"
#include "ebyte_port.h"
#include "ebyte_conf.h"
#include "gd32w51x_gpio.h"
#include "platform_def.h"
BSP_BTN_FIFO_t BSP_BTN_FIFO;
@ -45,11 +46,13 @@ void Ebyte_BSP_HSI_Init(void)
void Ebyte_BSP_E48xGPIO_Init(void)
{
// GPIO_Init( BSP_GPIO_PORT_E48_GP0, BSP_GPIO_PIN_E48_GP0, GPIO_Mode_In_PU_No_IT );
// GPIO_Init( BSP_GPIO_PORT_E48_NIRQ, BSP_GPIO_PIN_E48_NIRQ, GPIO_Mode_In_PU_No_IT );
// GPIO_Init( BSP_GPIO_PORT_E48_GP3, BSP_GPIO_PIN_E48_GP3, GPIO_Mode_In_PU_No_IT );
// GPIO_Init( BSP_GPIO_PORT_E48_GP4, BSP_GPIO_PIN_E48_GP4, GPIO_Mode_In_FL_No_IT );
// GPIO_Init( BSP_GPIO_PORT_E48_GP5, BSP_GPIO_PIN_E48_GP5, GPIO_Mode_In_PU_No_IT );
rcu_periph_clock_enable(BSP_GPIO_RCU_E48_GPIO);
gpio_mode_set( BSP_GPIO_PORT_E48_GP0, GPIO_MODE_INPUT, GPIO_PUPD_PULLUP, BSP_GPIO_PIN_E48_GP0);
gpio_mode_set( BSP_GPIO_PORT_E48_NIRQ, GPIO_MODE_INPUT, GPIO_PUPD_PULLUP, BSP_GPIO_PIN_E48_NIRQ);
gpio_mode_set( BSP_GPIO_PORT_E48_GP3, GPIO_MODE_INPUT, GPIO_PUPD_PULLUP, BSP_GPIO_PIN_E48_GP3);
gpio_mode_set( BSP_GPIO_PORT_E48_GP4, GPIO_MODE_INPUT, GPIO_PUPD_NONE, BSP_GPIO_PIN_E48_GP4);
gpio_mode_set( BSP_GPIO_PORT_E48_GP5, GPIO_MODE_INPUT, GPIO_PUPD_PULLUP, BSP_GPIO_PIN_E48_GP5);
}
/* !
* @brief <20><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO
@ -58,15 +61,19 @@ void Ebyte_BSP_E48xGPIO_Init(void)
*/
void Ebyte_BSP_GPIO_Init(void)
{
// /* <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>״̬<D7B4><CCAC><EFBFBD><EFBFBD> */
// Ebyte_BSP_E48xGPIO_Init();
// /* LED */
// GPIO_Init( BSP_GPIO_PORT_LED_1, BSP_GPIO_PIN_LED_1, GPIO_Mode_Out_PP_Low_Slow );
// GPIO_Init( BSP_GPIO_PORT_LED_2, BSP_GPIO_PIN_LED_2, GPIO_Mode_Out_PP_Low_Slow );
//
// /* <20><><EFBFBD><EFBFBD> */
// GPIO_Init( BSP_GPIO_PORT_BUTTON_1, BSP_GPIO_PIN_BUTTON_1, GPIO_Mode_In_PU_No_IT );
//
/* <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>״̬<D7B4><CCAC><EFBFBD><EFBFBD> */
Ebyte_BSP_E48xGPIO_Init();
/* LED */
rcu_periph_clock_enable(BSP_GPIO_RCU_E48_LED);
gpio_mode_set( BSP_GPIO_PORT_LED_1, GPIO_MODE_OUTPUT, GPIO_PUPD_PULLUP, BSP_GPIO_PIN_LED_1 );
gpio_mode_set( BSP_GPIO_PORT_LED_2, GPIO_MODE_OUTPUT, GPIO_PUPD_PULLUP, BSP_GPIO_PIN_LED_2 );
gpio_output_options_set(BSP_GPIO_PORT_LED_1, GPIO_OTYPE_PP, GPIO_OSPEED_25MHZ, BSP_GPIO_PIN_LED_1);
gpio_output_options_set(BSP_GPIO_PORT_LED_2, GPIO_OTYPE_PP, GPIO_OSPEED_25MHZ, BSP_GPIO_PIN_LED_2);
/* Button */
rcu_periph_clock_enable(BSP_GPIO_RCU_E48_BUTTON);
gpio_mode_set( BSP_GPIO_PORT_BUTTON_1, GPIO_MODE_INPUT, GPIO_PUPD_PULLUP, BSP_GPIO_PIN_BUTTON_1);
// GPIO_Init( BSP_GPIO_PORT_BUTTON_2, BSP_GPIO_PIN_BUTTON_2, GPIO_Mode_In_PU_No_IT );
}
@ -107,26 +114,30 @@ void Ebyte_BSP_ThreeLinesSPI_Init()
*/
void Ebyte_BSP_SPI_Init( void )
{
// /* ʱ<><CAB1> */
// CLK_PeripheralClockConfig( CLK_Peripheral_SPI1, ENABLE);
//
// /* GPIO */
// GPIO_Init( BSP_GPIO_PORT_SPI_NSS, BSP_GPIO_PIN_SPI_NSS, GPIO_Mode_Out_PP_High_Slow); //Ƭѡ CS
spi_parameter_struct spi_init_struct;
/* ʱ<><CAB1> */
rcu_periph_clock_enable(BSP_RF_SPI_CLOCK);
/* GPIO */
rcu_periph_clock_enable(BSP_GPIO_RCU_E48_SPI);
gpio_mode_set(BSP_GPIO_PORT_SPI_NSS, GPIO_MODE_OUTPUT, GPIO_PUPD_PULLUP, BSP_GPIO_PIN_SPI_NSS); //Ƭѡ CS
gpio_output_options_set(BSP_GPIO_PORT_SPI_NSS, GPIO_OTYPE_PP, GPIO_OSPEED_25MHZ, BSP_GPIO_PIN_SPI_NSS);
// GPIO_ExternalPullUpConfig( BSP_GPIO_PORT_SPI_SCK, BSP_GPIO_PIN_SPI_MOSI | BSP_GPIO_PIN_SPI_MISO | BSP_GPIO_PIN_SPI_SCK, ENABLE); // MOSI MISO SCK
//
// /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
// SPI_Init( BSP_RF_SPI,
// SPI_FirstBit_MSB, //<2F>Ӹ<EFBFBD>λ<EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
// SPI_BaudRatePrescaler_8, //16M/2 SCK<43><4B><EFBFBD><EFBFBD>
// SPI_Mode_Master, //<2F><><EFBFBD><EFBFBD>ģʽ
// SPI_CPOL_Low, //<2F><><EFBFBD><EFBFBD> CPOL=0
// SPI_CPHA_1Edge, //<EFBFBD><EFBFBD><EFBFBD><EFBFBD> CPHA=0 <20><>һ<EFBFBD><D2BB>ʱ<EFBFBD>ӱ<EFBFBD><D3B1>ز<EFBFBD><D8B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
// SPI_Direction_2Lines_FullDuplex, //ȫ˫<EFBFBD><EFBFBD>
// SPI_NSS_Soft, //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƴӻ<C6B4>CSƬѡ
// 0x07); //CRC<52><43><EFBFBD><EFBFBD>
//
// /* ʹ<EFBFBD><EFBFBD> */
// SPI_Cmd( BSP_RF_SPI, ENABLE );
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
spi_init_struct.trans_mode = SPI_TRANSMODE_FULLDUPLEX;
spi_init_struct.device_mode = SPI_MASTER; //<2F><><EFBFBD><EFBFBD>ģʽ
spi_init_struct.frame_size = SPI_FRAMESIZE_8BIT;
spi_init_struct.clock_polarity_phase = SPI_CK_PL_LOW_PH_1EDGE; // Mode0 {CPOL=0, CPHA=0}
spi_init_struct.nss = SPI_NSS_SOFT; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƴӻ<EFBFBD>CSƬѡ
spi_init_struct.prescale = SPI_PSC_8; //16M/2 SCK<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
spi_init_struct.endian = SPI_ENDIAN_MSB; //<EFBFBD>Ӹ<EFBFBD>λ<EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
spi_init(BSP_RF_SPI, &spi_init_struct);
/* ʹ<><CAB9> */
/* SPI enable */
spi_enable(BSP_RF_SPI);
}
/* !
@ -154,18 +165,35 @@ uint8_t Ebyte_BSP_SpiTransAndRecv( uint8_t data )
*/
void Ebyte_BSP_TIMER_Init( void )
{
// /* ʱ<><CAB1> */
// CLK_PeripheralClockConfig( CLK_Peripheral_TIM3, ENABLE);
//
// /* <20><><EFBFBD><EFBFBD> */
// TIM3_TimeBaseInit( TIM3_Prescaler_128 , TIM3_CounterMode_Up, 124);
//
// /* <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD> */
// TIM3_ClearFlag(TIM3_FLAG_Update);
// TIM3_ITConfig(TIM3_IT_Update, ENABLE);
//
// /* ʹ<><CAB9> */
// TIM3_Cmd(ENABLE);
timer_parameter_struct timer_initpara;
/**
TIMER2 Configuration:
TIMER2CLK = SystemCoreClock/180 = 1MHz.
TIMER2 configuration is timing mode, and the timing is 1ms(1000/1 = 1ms).
*/
/* enable the peripherals clock */
rcu_timer_clock_prescaler_config(RCU_TIMER_PSC_MUL4);
rcu_periph_clock_enable(BSP_RF_TIMER);
/* deinit a TIMER */
timer_deinit(BSP_RF_TIMER);
/* initialize TIMER init parameter struct */
timer_struct_para_init(&timer_initpara);
/* TIMER2 configuration */
timer_initpara.prescaler = 179;
timer_initpara.alignedmode = TIMER_COUNTER_EDGE;
timer_initpara.counterdirection = TIMER_COUNTER_UP;
timer_initpara.period = 1000;
timer_initpara.clockdivision = TIMER_CKDIV_DIV1;
timer_init(BSP_RF_TIMER, &timer_initpara);
/* clear interrupt bit */
timer_interrupt_flag_clear(BSP_RF_TIMER, TIMER_INT_FLAG_UP);
/* enable the TIMER interrupt */
timer_interrupt_enable(BSP_RF_TIMER, TIMER_INT_UP);
/* enable a TIMER */
timer_enable(BSP_RF_TIMER);
}
/* !
@ -181,13 +209,13 @@ void Ebyte_BSP_TIMER_Init( void )
void Ebyte_BSP_Init( void )
{
/* ʱ<><CAB1> <20><>ʼ<EFBFBD><CABC> */
Ebyte_BSP_HSI_Init();
// Ebyte_BSP_HSI_Init();
/* IO <20><>ʼ<EFBFBD><CABC> */
Ebyte_BSP_GPIO_Init();
/* <20><><EFBFBD><EFBFBD> <20><>ʼ<EFBFBD><CABC> */
Ebyte_BSP_UART_Init();
// Ebyte_BSP_UART_Init();
/* SPI<50>ӿ<EFBFBD> <20><>ʼ<EFBFBD><CABC> */
Ebyte_BSP_SPI_Init();
@ -276,8 +304,8 @@ uint8_t Ebyte_BSP_ReadButton( BSP_BUTTON_t btn )
switch ( btn )
{
case BSP_BUTTON_1: result = GPIO_ReadInputDataBit( BSP_GPIO_PORT_BUTTON_1 , BSP_GPIO_PIN_BUTTON_1); break;
case BSP_BUTTON_2: result = GPIO_ReadInputDataBit( BSP_GPIO_PORT_BUTTON_2 , BSP_GPIO_PIN_BUTTON_2); break;
case BSP_BUTTON_1: result = gpio_input_bit_get( BSP_GPIO_PORT_BUTTON_1 , BSP_GPIO_PIN_BUTTON_1); break;
// case BSP_BUTTON_2: result = GPIO_ReadInputDataBit( BSP_GPIO_PORT_BUTTON_2 , BSP_GPIO_PIN_BUTTON_2); break;
default : break;
}

54
NSPE/WIFI_IOT/bsp/drivers/2_Ebyte_Board_Support/E15-EVB02/board.h
View File

@ -28,31 +28,35 @@
#include "board_mini_printf.h"
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> LED */
#define BSP_GPIO_PORT_LED_1 GPIOC
#define BSP_GPIO_RCU_E48_LED RCU_GPIOB
#define BSP_GPIO_PORT_LED_1 GPIOB
#define BSP_GPIO_PIN_LED_1 GPIO_PIN_6
#define BSP_GPIO_PORT_LED_2 GPIOC
#define BSP_GPIO_PIN_LED_2 GPIO_PIN_5
#define BSP_GPIO_PORT_LED_2 GPIOA
#define BSP_GPIO_PIN_LED_2 GPIO_PIN_15
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> */
#define BSP_GPIO_RCU_E48_BUTTON RCU_GPIOA
#define BSP_GPIO_PORT_BUTTON_1 GPIOA
#define BSP_GPIO_PIN_BUTTON_1 GPIO_PIN_4
#define BSP_GPIO_PIN_BUTTON_1 GPIO_PIN_2
#define BSP_GPIO_PORT_BUTTON_2 GPIOA
#define BSP_GPIO_PIN_BUTTON_2 GPIO_PIN_5
//#define BSP_GPIO_PORT_BUTTON_2 GPIOA
//#define BSP_GPIO_PIN_BUTTON_2 GPIO_PIN_5
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> SPIͨ<49>Žӿ<C5BD> */
#define BSP_GPIO_RCU_E48_SPI RCU_GPIOB
#define BSP_GPIO_PORT_SPI_NSS GPIOB
#define BSP_GPIO_PIN_SPI_NSS GPIO_PIN_4
#define BSP_GPIO_PIN_SPI_NSS GPIO_PIN_12
#define BSP_GPIO_PORT_SPI_MOSI GPIOB
#define BSP_GPIO_PIN_SPI_MOSI GPIO_PIN_6
#define BSP_GPIO_PORT_SPI_MISO GPIOB
#define BSP_GPIO_PIN_SPI_MISO GPIO_PIN_7
#define BSP_GPIO_PORT_SPI_SCK GPIOB
#define BSP_GPIO_PIN_SPI_SCK GPIO_PIN_5
//#define BSP_GPIO_PORT_SPI_MOSI GPIOB
//#define BSP_GPIO_PIN_SPI_MOSI GPIO_PIN_6
//
//#define BSP_GPIO_PORT_SPI_MISO GPIOB
//#define BSP_GPIO_PIN_SPI_MISO GPIO_PIN_7
//
//#define BSP_GPIO_PORT_SPI_SCK GPIOB
//#define BSP_GPIO_PIN_SPI_SCK GPIO_PIN_5
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ͨ<>Ŵ<EFBFBD><C5B4><EFBFBD> */
#define BSP_GPIO_PORT_UART_TX GPIOA
@ -65,25 +69,29 @@
/* E48 */
#define BSP_GPIO_RCU_E48_GPIO RCU_GPIOC
#define BSP_GPIO_PORT_E48_GP0 GPIOC
#define BSP_GPIO_PIN_E48_GP0 GPIO_PIN_1
#define BSP_GPIO_PORT_E48_NIRQ GPIOD
#define BSP_GPIO_PIN_E48_NIRQ GPIO_PIN_4
#define BSP_GPIO_PIN_E48_GP0 GPIO_PIN_0
#define BSP_GPIO_PORT_E48_NIRQ GPIOC
#define BSP_GPIO_PIN_E48_NIRQ GPIO_PIN_1
#define BSP_GPIO_PORT_E48_GP3 GPIOC
#define BSP_GPIO_PIN_E48_GP3 GPIO_PIN_3
#define BSP_GPIO_PORT_E48_GP4 GPIOC
#define BSP_GPIO_PIN_E48_GP4 GPIO_PIN_1
#define BSP_GPIO_PIN_E48_GP4 GPIO_PIN_4
#define BSP_GPIO_PORT_E48_GP5 GPIOC
#define BSP_GPIO_PIN_E48_GP5 GPIO_PIN_2
#define BSP_GPIO_PIN_E48_GP5 GPIO_PIN_5
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> SPI */
#define BSP_RF_SPI SPI1
#define BSP_RF_SPI_CLOCK CLK_Peripheral_SPI1
#define BSP_RF_SPI_CLOCK RCU_SPI1
#define Ebyte_BSP_RfSpiSelected() gpio_bit_write( BSP_GPIO_PORT_SPI_NSS , BSP_GPIO_PIN_SPI_NSS, RESET )
#define Ebyte_BSP_RfSpiUnselected() gpio_bit_write( BSP_GPIO_PORT_SPI_NSS , BSP_GPIO_PIN_SPI_NSS, SET )
/* <20><><EFBFBD><EFBFBD> Timer */
#define BSP_RF_TIMER TIMER2
#define BSP_RF_TIMER_RCU RCU_TIMER2
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO */
///* E07 */

38
NSPE/WIFI_IOT/bsp/drivers/2_Ebyte_Board_Support/E15-EVB02/board_button.c
View File

@ -1,19 +1,19 @@
/**
**********************************************************************************
* @file board_button.c
* @brief ͨ<><CDA8> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @author JiangHeng
* @date 2021-05-06
* @version 1.0.0
* @brief ͨ<><CDA8> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @author JiangHeng
* @date 2021-05-06
* @version 1.0.0
**********************************************************************************
* @copyright BSD License
* <20>ɶ<EFBFBD><C9B6>ڰ<EFBFBD><DAB0>ص<EFBFBD><D8B5>ӿƼ<D3BF><C6BC><EFBFBD><EFBFBD>޹<EFBFBD>˾
* ______ ____ __ __ _______ ______
* @copyright BSD License
* <20>ɶ<EFBFBD><C9B6>ڰ<EFBFBD><DAB0>ص<EFBFBD><D8B5>ӿƼ<D3BF><C6BC><EFBFBD><EFBFBD>޹<EFBFBD>˾
* ______ ____ __ __ _______ ______
* | ____| | _ \ \ \ / / |__ __| | ____|
* | |__ | |_) | \ \_/ / | | | |__
* | __| | _ < \ / | | | __|
* | |____ | |_) | | | | | | |____
* |______| |____/ |_| |_| |______|
* | |__ | |_) | \ \_/ / | | | |__
* | __| | _ < \ / | | | __|
* | |____ | |_) | | | | | | |____
* |______| |____/ |_| |_| |______|
*
**********************************************************************************
*/
@ -22,7 +22,7 @@
/* !
* @brief <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>г<EFBFBD>ʼ<EFBFBD><CABC>
*
*
* @param fifo ָ<>򰴼<EFBFBD><F2B0B4BC>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>нṹ<D0BD><E1B9B9><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
*/
void Ebyte_BTN_FIFO_Init(BSP_BTN_FIFO_t *fifo)
@ -33,8 +33,8 @@ void Ebyte_BTN_FIFO_Init(BSP_BTN_FIFO_t *fifo)
}
/* !
* @brief <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* @brief <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* @param fifo ָ<>򰴼<EFBFBD><F2B0B4BC>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>нṹ<D0BD><E1B9B9><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
* @param event <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD> <20><>ҪΪ<D2AA><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ķ̰<C4B6>/<2F><><EFBFBD><EFBFBD>
* @return 0:<3A><><EFBFBD><EFBFBD> 1:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
@ -49,12 +49,12 @@ uint8_t Ebyte_BTN_FIFO_Push(BSP_BTN_FIFO_t *fifo, BSP_BTN_EVENT_t event)
if(fifo->fifoLen > BSP_BTN_FIFO_LENGTH)
{
fifo->fifoLen = BSP_BTN_FIFO_LENGTH;//<2F><><EFBFBD>ӳ<EFBFBD><D3B3>Ȳ<EFBFBD><C8B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
return 1;
return 1;
}
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
fifo->buff[fifo->fifoWrite] = event;
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD>Ѿ<EFBFBD><D1BE><EFBFBD><EFBFBD>˶<EFBFBD>β */
if(++fifo->fifoWrite >= BSP_BTN_FIFO_LENGTH)
{
@ -67,7 +67,7 @@ uint8_t Ebyte_BTN_FIFO_Push(BSP_BTN_FIFO_t *fifo, BSP_BTN_EVENT_t event)
/* !
* @brief <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>г<EFBFBD><D0B3><EFBFBD>
*
*
* @param fifo ָ<>򰴼<EFBFBD><F2B0B4BC>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>нṹ<D0BD><E1B9B9><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
* @param event <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD> <20><>ҪΪ<D2AA><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ķ̰<C4B6>/<2F><><EFBFBD><EFBFBD>
* @return 0:<3A><><EFBFBD><EFBFBD> 1:<3A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
@ -79,7 +79,7 @@ uint8_t Ebyte_BTN_FIFO_Pop(BSP_BTN_FIFO_t *fifo, BSP_BTN_EVENT_t *event)
{
return 1;
}
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD><EFBFBD>Լ<EFBFBD> */
fifo->fifoLen--;