[Mod] 解决链接异常问题
This commit is contained in:
@ -48,6 +48,7 @@ target_link_libraries(${TARGET_EXE}
|
|||||||
wifi
|
wifi
|
||||||
os
|
os
|
||||||
cmsis
|
cmsis
|
||||||
|
cmt2310
|
||||||
)
|
)
|
||||||
|
|
||||||
target_link_options(${TARGET_EXE}
|
target_link_options(${TARGET_EXE}
|
||||||
|
|||||||
@ -46,9 +46,9 @@
|
|||||||
#ifndef __STATIC_INLINE
|
#ifndef __STATIC_INLINE
|
||||||
#define __STATIC_INLINE static inline
|
#define __STATIC_INLINE static inline
|
||||||
#endif
|
#endif
|
||||||
#ifndef __STATIC_FORCEINLINE
|
#ifndef __STATIC_FORCEINLINE
|
||||||
#define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
|
#define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
|
||||||
#endif
|
#endif
|
||||||
#ifndef __NO_RETURN
|
#ifndef __NO_RETURN
|
||||||
#define __NO_RETURN __attribute__((__noreturn__))
|
#define __NO_RETURN __attribute__((__noreturn__))
|
||||||
#endif
|
#endif
|
||||||
@ -126,23 +126,23 @@
|
|||||||
\details This default implementations initialized all data and additional bss
|
\details This default implementations initialized all data and additional bss
|
||||||
sections relying on .copy.table and .zero.table specified properly
|
sections relying on .copy.table and .zero.table specified properly
|
||||||
in the used linker script.
|
in the used linker script.
|
||||||
|
|
||||||
*/
|
*/
|
||||||
__STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
|
__STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
|
||||||
{
|
{
|
||||||
extern void _start(void) __NO_RETURN;
|
extern void _start(void) __NO_RETURN;
|
||||||
|
|
||||||
typedef struct {
|
typedef struct {
|
||||||
uint32_t const* src;
|
uint32_t const* src;
|
||||||
uint32_t* dest;
|
uint32_t* dest;
|
||||||
uint32_t wlen;
|
uint32_t wlen;
|
||||||
} __copy_table_t;
|
} __copy_table_t;
|
||||||
|
|
||||||
typedef struct {
|
typedef struct {
|
||||||
uint32_t* dest;
|
uint32_t* dest;
|
||||||
uint32_t wlen;
|
uint32_t wlen;
|
||||||
} __zero_table_t;
|
} __zero_table_t;
|
||||||
|
|
||||||
extern const __copy_table_t __copy_table_start__;
|
extern const __copy_table_t __copy_table_start__;
|
||||||
extern const __copy_table_t __copy_table_end__;
|
extern const __copy_table_t __copy_table_end__;
|
||||||
extern const __zero_table_t __zero_table_start__;
|
extern const __zero_table_t __zero_table_start__;
|
||||||
@ -153,16 +153,16 @@ __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
|
|||||||
pTable->dest[i] = pTable->src[i];
|
pTable->dest[i] = pTable->src[i];
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable) {
|
for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable) {
|
||||||
for(uint32_t i=0u; i<(pTable->wlen/sizeof(pTable->dest)); ++i) {
|
for(uint32_t i=0u; i<(pTable->wlen/sizeof(pTable->dest)); ++i) {
|
||||||
pTable->dest[i] = 0u;
|
pTable->dest[i] = 0u;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
_start();
|
_start();
|
||||||
}
|
}
|
||||||
|
|
||||||
#define __PROGRAM_START __cmsis_start
|
#define __PROGRAM_START __cmsis_start
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
@ -652,7 +652,7 @@ __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
|
|||||||
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
||||||
Stack Pointer Limit register hence zero is returned always in non-secure
|
Stack Pointer Limit register hence zero is returned always in non-secure
|
||||||
mode.
|
mode.
|
||||||
|
|
||||||
\details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
|
\details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
|
||||||
\return PSPLIM Register value
|
\return PSPLIM Register value
|
||||||
*/
|
*/
|
||||||
@ -697,7 +697,7 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
|
|||||||
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
||||||
Stack Pointer Limit register hence the write is silently ignored in non-secure
|
Stack Pointer Limit register hence the write is silently ignored in non-secure
|
||||||
mode.
|
mode.
|
||||||
|
|
||||||
\details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
|
\details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
|
||||||
\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
|
\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
|
||||||
*/
|
*/
|
||||||
@ -834,7 +834,7 @@ __STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
|
|||||||
{
|
{
|
||||||
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
|
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
|
||||||
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
|
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
|
||||||
#if __has_builtin(__builtin_arm_get_fpscr)
|
#if __has_builtin(__builtin_arm_get_fpscr)
|
||||||
// Re-enable using built-in when GCC has been fixed
|
// Re-enable using built-in when GCC has been fixed
|
||||||
// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
|
// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
|
||||||
/* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
|
/* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
|
||||||
|
|||||||
@ -49,6 +49,7 @@ target_link_libraries(app
|
|||||||
wifi_api
|
wifi_api
|
||||||
os_api
|
os_api
|
||||||
cmsis_api
|
cmsis_api
|
||||||
|
cmt2310_api
|
||||||
$<$<BOOL:${CONFIG_ALICLOUD_SUPPORT}>:alicloud>
|
$<$<BOOL:${CONFIG_ALICLOUD_SUPPORT}>:alicloud>
|
||||||
$<$<BOOL:${CONFIG_IPERF_TEST}>:iperf3>
|
$<$<BOOL:${CONFIG_IPERF_TEST}>:iperf3>
|
||||||
$<$<BOOL:${CONFIG_IPERF_TEST}>:iperf3_api>
|
$<$<BOOL:${CONFIG_IPERF_TEST}>:iperf3_api>
|
||||||
|
|||||||
@ -54,6 +54,7 @@ OF SUCH DAMAGE.
|
|||||||
#if defined (CONFIG_GY3513)
|
#if defined (CONFIG_GY3513)
|
||||||
#include <gd32w515p_eval.h>
|
#include <gd32w515p_eval.h>
|
||||||
#endif // CONFIG_GY3513
|
#endif // CONFIG_GY3513
|
||||||
|
#include "ebyte_e48.h"
|
||||||
|
|
||||||
/*============================ MACROS ========================================*/
|
/*============================ MACROS ========================================*/
|
||||||
/*============================ MACRO FUNCTIONS ===============================*/
|
/*============================ MACRO FUNCTIONS ===============================*/
|
||||||
@ -116,6 +117,19 @@ __WEAK void app_init(void)
|
|||||||
/* User application entry */
|
/* User application entry */
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*!
|
||||||
|
\brief start task
|
||||||
|
\param[in] p_arg: the pointer of parameters
|
||||||
|
\param[out] none
|
||||||
|
\retval none
|
||||||
|
*/
|
||||||
|
void sub1g_task(void *p_arg)
|
||||||
|
{
|
||||||
|
ebyte_main();
|
||||||
|
|
||||||
|
sys_task_delete(NULL);
|
||||||
|
}
|
||||||
|
|
||||||
/*!
|
/*!
|
||||||
\brief start task
|
\brief start task
|
||||||
\param[in] p_arg: the pointer of parameters
|
\param[in] p_arg: the pointer of parameters
|
||||||
@ -131,10 +145,6 @@ void start_task(void *p_arg)
|
|||||||
const char *filename;
|
const char *filename;
|
||||||
#endif // CONFIG_GY3513
|
#endif // CONFIG_GY3513
|
||||||
|
|
||||||
sys_reset_flag_check();
|
|
||||||
sys_os_misc_init();
|
|
||||||
systick_delay_init();
|
|
||||||
|
|
||||||
wifi_management_init();
|
wifi_management_init();
|
||||||
#ifdef CONFIG_FATFS_SUPPORT
|
#ifdef CONFIG_FATFS_SUPPORT
|
||||||
rcu_periph_clock_enable(RCU_CRC);
|
rcu_periph_clock_enable(RCU_CRC);
|
||||||
@ -171,7 +181,11 @@ int main(void)
|
|||||||
DEBUGPRINT("SDK version: V%d.%d.%d\r\n", (RE_NSPE_VERSION >> 24), ((RE_NSPE_VERSION & 0xFF0000) >> 16), (RE_NSPE_VERSION & 0xFFFF));
|
DEBUGPRINT("SDK version: V%d.%d.%d\r\n", (RE_NSPE_VERSION >> 24), ((RE_NSPE_VERSION & 0xFF0000) >> 16), (RE_NSPE_VERSION & 0xFFFF));
|
||||||
DEBUGPRINT("SDK build date: "BUILD_DATE" \r\n");
|
DEBUGPRINT("SDK build date: "BUILD_DATE" \r\n");
|
||||||
|
|
||||||
|
sys_reset_flag_check();
|
||||||
sys_os_init();
|
sys_os_init();
|
||||||
|
sys_os_misc_init();
|
||||||
|
|
||||||
|
systick_delay_init();
|
||||||
|
|
||||||
#if defined (CONFIG_GY3513)
|
#if defined (CONFIG_GY3513)
|
||||||
#define LED_TASK_STK_SIZE 256
|
#define LED_TASK_STK_SIZE 256
|
||||||
@ -183,6 +197,10 @@ int main(void)
|
|||||||
}
|
}
|
||||||
#endif // CONFIG_GY3513
|
#endif // CONFIG_GY3513
|
||||||
|
|
||||||
|
if (NULL == sys_task_create(NULL, (const uint8_t *)"sub1g_task", NULL, START_TASK_STK_SIZE, 0, START_TASK_PRIO, sub1g_task, NULL)) {
|
||||||
|
DEBUGPRINT("ERROR: create start task failed\r\n");
|
||||||
|
}
|
||||||
|
|
||||||
if (NULL == sys_task_create(NULL, (const uint8_t *)"start_task", NULL, START_TASK_STK_SIZE, 0, START_TASK_PRIO, start_task, NULL)) {
|
if (NULL == sys_task_create(NULL, (const uint8_t *)"start_task", NULL, START_TASK_STK_SIZE, 0, START_TASK_PRIO, start_task, NULL)) {
|
||||||
DEBUGPRINT("ERROR: create start task failed\r\n");
|
DEBUGPRINT("ERROR: create start task failed\r\n");
|
||||||
}
|
}
|
||||||
|
|||||||
@ -1,20 +1,20 @@
|
|||||||
/**
|
/**
|
||||||
**********************************************************************************
|
**********************************************************************************
|
||||||
* @file ebyte_port.h
|
* @file ebyte_port.h
|
||||||
* @brief EBYTE<54><45><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD>ӿڲ<D3BF> <20>ɿͻ<C9BF><CDBB>Լ<EFBFBD><D4BC>ṩIO<49>ӿ<EFBFBD>
|
* @brief EBYTE<54><45><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD>ӿڲ<D3BF> <20>ɿͻ<C9BF><CDBB>Լ<EFBFBD><D4BC>ṩIO<49>ӿ<EFBFBD>
|
||||||
* @details <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>μ<EFBFBD> https://www.ebyte.com/
|
* @details <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>μ<EFBFBD> https://www.ebyte.com/
|
||||||
* @author JiangHeng
|
* @author JiangHeng
|
||||||
* @date 2021-05-13
|
* @date 2021-05-13
|
||||||
* @version 1.0.0
|
* @version 1.0.0
|
||||||
**********************************************************************************
|
**********************************************************************************
|
||||||
* @copyright BSD License
|
* @copyright BSD License
|
||||||
* <20>ɶ<EFBFBD><C9B6>ڰ<EFBFBD><DAB0>ص<EFBFBD><D8B5>ӿƼ<D3BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
* <20>ɶ<EFBFBD><C9B6>ڰ<EFBFBD><DAB0>ص<EFBFBD><D8B5>ӿƼ<D3BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
||||||
* ______ ____ __ __ _______ ______
|
* ______ ____ __ __ _______ ______
|
||||||
* | ____| | _ \ \ \ / / |__ __| | ____|
|
* | ____| | _ \ \ \ / / |__ __| | ____|
|
||||||
* | |__ | |_) | \ \_/ / | | | |__
|
* | |__ | |_) | \ \_/ / | | | |__
|
||||||
* | __| | _ < \ / | | | __|
|
* | __| | _ < \ / | | | __|
|
||||||
* | |____ | |_) | | | | | | |____
|
* | |____ | |_) | | | | | | |____
|
||||||
* |______| |____/ |_| |_| |______|
|
* |______| |____/ |_| |_| |______|
|
||||||
*
|
*
|
||||||
**********************************************************************************
|
**********************************************************************************
|
||||||
*/
|
*/
|
||||||
@ -26,9 +26,9 @@
|
|||||||
/*==================================================================*/
|
/*==================================================================*/
|
||||||
|
|
||||||
/* !
|
/* !
|
||||||
* @brief <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF>Ӳ<EFBFBD><D3B2>ƽ̨SPI<50>ӿ<EFBFBD><D3BF>շ<EFBFBD><D5B7><EFBFBD><EFBFBD><EFBFBD>
|
* @brief <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF>Ӳ<EFBFBD><D3B2>ƽ̨SPI<50>ӿ<EFBFBD><D3BF>շ<EFBFBD><D5B7><EFBFBD><EFBFBD><EFBFBD>
|
||||||
*
|
*
|
||||||
* @param send EBYTE<54><45><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϲ<EFBFBD><CFB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1 Byte
|
* @param send EBYTE<54><45><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϲ<EFBFBD><CFB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1 Byte
|
||||||
* @return SPI<50><49><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD> 1 Byte
|
* @return SPI<50><49><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD> 1 Byte
|
||||||
* @note <20><>Ŀ<EFBFBD><C4BF>ƽ̨<C6BD><CCA8><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2>SPI_NSSʱ<53><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ebyte_conf.h<>ļ<EFBFBD> <20>ر<EFBFBD><D8B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SPI_CS(NSS)
|
* @note <20><>Ŀ<EFBFBD><C4BF>ƽ̨<C6BD><CCA8><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2>SPI_NSSʱ<53><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ebyte_conf.h<>ļ<EFBFBD> <20>ر<EFBFBD><D8B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SPI_CS(NSS)
|
||||||
* <20><>Ŀ<EFBFBD><C4BF>ƽ̨<C6BD><CCA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SPI_NSSʱ<53><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Ebyte_Port_SpiCsIoControl() <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĺ<EFBFBD><C4BA><EFBFBD>˵<EFBFBD><CBB5>
|
* <20><>Ŀ<EFBFBD><C4BF>ƽ̨<C6BD><CCA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SPI_NSSʱ<53><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Ebyte_Port_SpiCsIoControl() <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĺ<EFBFBD><C4BA><EFBFBD>˵<EFBFBD><CBB5>
|
||||||
@ -36,16 +36,16 @@
|
|||||||
uint8e_t Ebyte_Port_SpiTransmitAndReceivce( uint8e_t send )
|
uint8e_t Ebyte_Port_SpiTransmitAndReceivce( uint8e_t send )
|
||||||
{
|
{
|
||||||
uint8e_t result = 0;
|
uint8e_t result = 0;
|
||||||
|
|
||||||
/* !<21><><EFBFBD><EFBFBD><EFBFBD>ṩ: SPI<50>ӿ<EFBFBD> */
|
/* !<21><><EFBFBD><EFBFBD><EFBFBD>ṩ: SPI<50>ӿ<EFBFBD> */
|
||||||
result = Ebyte_BSP_SpiTransAndRecv( send );
|
result = Ebyte_BSP_SpiTransAndRecv( send );
|
||||||
|
|
||||||
return result;
|
return result;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* !
|
/* !
|
||||||
* @brief (<28><>ѡ)<29><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF>Ӳ<EFBFBD><D3B2>ƽ̨SPI_CS(NSS)<29><><EFBFBD><EFBFBD>
|
* @brief (<28><>ѡ)<29><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF>Ӳ<EFBFBD><D3B2>ƽ̨SPI_CS(NSS)<29><><EFBFBD><EFBFBD>
|
||||||
*
|
*
|
||||||
* @param cmd EBYTE<54><45><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϲ<EFBFBD><CFB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD>ָ<EFBFBD><D6B8>
|
* @param cmd EBYTE<54><45><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϲ<EFBFBD><CFB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD>ָ<EFBFBD><D6B8>
|
||||||
* @arg 0: <20><><EFBFBD><EFBFBD>CS(NSS)<29><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD>ƽ<EFBFBD><EFBFBD><DFBC>ź<EFBFBD> EBYTEģ<45><C4A3>SPI<50>ӿ<EFBFBD>Ϊ<EFBFBD>͵<EFBFBD>ƽѡ<C6BD><D1A1>
|
* @arg 0: <20><><EFBFBD><EFBFBD>CS(NSS)<29><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD>ƽ<EFBFBD><EFBFBD><DFBC>ź<EFBFBD> EBYTEģ<45><C4A3>SPI<50>ӿ<EFBFBD>Ϊ<EFBFBD>͵<EFBFBD>ƽѡ<C6BD><D1A1>
|
||||||
* @arg 1: <20><><EFBFBD><EFBFBD>CS(NSS)<29><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ߵ<EFBFBD>ƽ<EFBFBD><EFBFBD><DFBC>ź<EFBFBD>
|
* @arg 1: <20><><EFBFBD><EFBFBD>CS(NSS)<29><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ߵ<EFBFBD>ƽ<EFBFBD><EFBFBD><DFBC>ź<EFBFBD>
|
||||||
@ -56,12 +56,12 @@ void Ebyte_Port_SpiCsIoControl( uint8e_t cmd )
|
|||||||
{
|
{
|
||||||
if ( cmd == 1 )
|
if ( cmd == 1 )
|
||||||
{
|
{
|
||||||
/* !<21><>ѡ: SPI CS<43><53><EFBFBD><EFBFBD> <20>ߵ<EFBFBD>ƽδѡ<CEB4><D1A1> */
|
/* !<21><>ѡ: SPI CS<43><53><EFBFBD><EFBFBD> <20>ߵ<EFBFBD>ƽδѡ<CEB4><D1A1> */
|
||||||
Ebyte_BSP_RfSpiUnselected();
|
Ebyte_BSP_RfSpiUnselected();
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
/* !<21><>ѡ: SPI CS<43><53><EFBFBD><EFBFBD> <20>͵<EFBFBD>ƽѡ<C6BD><D1A1> */
|
/* !<21><>ѡ: SPI CS<43><53><EFBFBD><EFBFBD> <20>͵<EFBFBD>ƽѡ<C6BD><D1A1> */
|
||||||
Ebyte_BSP_RfSpiSelected( );
|
Ebyte_BSP_RfSpiSelected( );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -70,29 +70,28 @@ void Ebyte_Port_SpiCsIoControl( uint8e_t cmd )
|
|||||||
|
|
||||||
/* !
|
/* !
|
||||||
* @brief <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF>Ӳ<EFBFBD><D3B2>ƽ̨<C6BD><CCA8>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
* @brief <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF>Ӳ<EFBFBD><D3B2>ƽ̨<C6BD><CCA8>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||||
*
|
*
|
||||||
* @param time <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
* @param time <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||||
* @note <20><>ע<EFBFBD><D7A2>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ô˺<C3B4><CBBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ע<EFBFBD><D7A2><EFBFBD>ж<EFBFBD><D0B6>Ƿ<EFBFBD><C7B7><EFBFBD>Ӱ<EFBFBD>쵽<EFBFBD>˺<EFBFBD><CBBA><EFBFBD>
|
* @note <20><>ע<EFBFBD><D7A2>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ô˺<C3B4><CBBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ע<EFBFBD><D7A2><EFBFBD>ж<EFBFBD><D0B6>Ƿ<EFBFBD><C7B7><EFBFBD>Ӱ<EFBFBD>쵽<EFBFBD>˺<EFBFBD><CBBA><EFBFBD>
|
||||||
*/
|
*/
|
||||||
void Ebyte_Port_DelayMs( uint16e_t time )
|
void Ebyte_Port_DelayMs( uint16e_t time )
|
||||||
{
|
{
|
||||||
/* !<21><><EFBFBD><EFBFBD><EFBFBD>ṩ: <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD> */
|
/* !<21><><EFBFBD><EFBFBD><EFBFBD>ṩ: <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD> */
|
||||||
|
|
||||||
uint16e_t i,n;
|
uint16e_t i,n;
|
||||||
|
|
||||||
while(time--)//<2F><><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD>STM8L 16Mʱ<4D><CAB1>ǰ<EFBFBD><C7B0><EFBFBD>µĴ<C2B5><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ
|
while(time--)//<2F><><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD>STM8L 16Mʱ<4D><CAB1>ǰ<EFBFBD><C7B0><EFBFBD>µĴ<C2B5><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ
|
||||||
{
|
{
|
||||||
for(i=900;i>0;i--)
|
for(i=900;i>0;i--)
|
||||||
{
|
{
|
||||||
for( n=1 ;n>0 ;n--)
|
for( n=1 ;n>0 ;n--) {
|
||||||
{
|
__NOP();
|
||||||
asm("nop");
|
__NOP();
|
||||||
asm("nop");
|
__NOP();
|
||||||
asm("nop");
|
__NOP();
|
||||||
asm("nop");
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@ -0,0 +1,6 @@
|
|||||||
|
#ifndef __EBYTE_E48_H__
|
||||||
|
#define __EBYTE_E48_H__
|
||||||
|
|
||||||
|
int ebyte_main( void );
|
||||||
|
|
||||||
|
#endif /* __EBYTE_E48_H__ */
|
||||||
@ -51,11 +51,10 @@ uint8_t PC_isConnected = 0;
|
|||||||
|
|
||||||
static BSP_BTN_EVENT_t BTN_Event;
|
static BSP_BTN_EVENT_t BTN_Event;
|
||||||
|
|
||||||
|
|
||||||
/* !
|
/* !
|
||||||
* @brief <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
* @brief <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
*/
|
*/
|
||||||
int main( void )
|
int ebyte_main( void )
|
||||||
{
|
{
|
||||||
/* <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>Դ <20><>ʼ<EFBFBD><CABC> */
|
/* <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>Դ <20><>ʼ<EFBFBD><CABC> */
|
||||||
// Ebyte_BSP_Init();
|
// Ebyte_BSP_Init();
|
||||||
@ -83,9 +82,7 @@ int main( void )
|
|||||||
|
|
||||||
/* <20><><EFBFBD><EFBFBD>:EBYTE<54><45><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
/* <20><><EFBFBD><EFBFBD>:EBYTE<54><45><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||||
Ebyte_RF.StartPollTask();
|
Ebyte_RF.StartPollTask();
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* !
|
/* !
|
||||||
|
|||||||
@ -22,6 +22,7 @@
|
|||||||
#include "board.h"
|
#include "board.h"
|
||||||
#include "ebyte_port.h"
|
#include "ebyte_port.h"
|
||||||
#include "ebyte_conf.h"
|
#include "ebyte_conf.h"
|
||||||
|
#include "platform_def.h"
|
||||||
|
|
||||||
BSP_BTN_FIFO_t BSP_BTN_FIFO;
|
BSP_BTN_FIFO_t BSP_BTN_FIFO;
|
||||||
|
|
||||||
@ -216,8 +217,8 @@ void Ebyte_BSP_LedControl( BSP_LED_t LEDx , BSP_LED_Ctl_t ctl)
|
|||||||
{
|
{
|
||||||
switch( LEDx )
|
switch( LEDx )
|
||||||
{
|
{
|
||||||
case BSP_LED_1 : GPIO_ToggleBits( BSP_GPIO_PORT_LED_1, BSP_GPIO_PIN_LED_1); break;
|
case BSP_LED_1 : gpio_bit_toggle( BSP_GPIO_PORT_LED_1, BSP_GPIO_PIN_LED_1); break;
|
||||||
case BSP_LED_2 : GPIO_ToggleBits( BSP_GPIO_PORT_LED_2, BSP_GPIO_PIN_LED_2); break;
|
case BSP_LED_2 : gpio_bit_toggle( BSP_GPIO_PORT_LED_2, BSP_GPIO_PIN_LED_2); break;
|
||||||
default: break;
|
default: break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -225,8 +226,8 @@ void Ebyte_BSP_LedControl( BSP_LED_t LEDx , BSP_LED_Ctl_t ctl)
|
|||||||
{
|
{
|
||||||
switch( LEDx )
|
switch( LEDx )
|
||||||
{
|
{
|
||||||
case BSP_LED_1 : GPIO_WriteBit( BSP_GPIO_PORT_LED_1, BSP_GPIO_PIN_LED_1, (BitAction)ctl); break;
|
case BSP_LED_1 : gpio_bit_write( BSP_GPIO_PORT_LED_1, BSP_GPIO_PIN_LED_1, (BitAction)ctl); break;
|
||||||
case BSP_LED_2 : GPIO_WriteBit( BSP_GPIO_PORT_LED_2, BSP_GPIO_PIN_LED_2, (BitAction)ctl); break;
|
case BSP_LED_2 : gpio_bit_write( BSP_GPIO_PORT_LED_2, BSP_GPIO_PIN_LED_2, (BitAction)ctl); break;
|
||||||
default: break;
|
default: break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -289,13 +290,11 @@ uint8_t Ebyte_BSP_ReadButton( BSP_BUTTON_t btn )
|
|||||||
*/
|
*/
|
||||||
void Ebyte_BSP_UartTransmit( uint8_t *buffer , uint16_t length )
|
void Ebyte_BSP_UartTransmit( uint8_t *buffer , uint16_t length )
|
||||||
{
|
{
|
||||||
|
|
||||||
uint8_t i;
|
uint8_t i;
|
||||||
|
|
||||||
for( i = 0; i < length; i++ )
|
for( i = 0; i < length; i++ ) {
|
||||||
{
|
while(RESET == usart_flag_get(LOG_UART, USART_FLAG_TBE));
|
||||||
while ( USART_GetFlagStatus( USART1, USART_FLAG_TBE ) == RESET );
|
usart_data_transmit(LOG_UART, *buffer);
|
||||||
USART_SendData8( USART1, *buffer++ );
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -18,6 +18,8 @@
|
|||||||
*
|
*
|
||||||
**********************************************************************************
|
**********************************************************************************
|
||||||
*/
|
*/
|
||||||
|
#ifndef __EBYTE_BOARD_H__
|
||||||
|
#define __EBYTE_BOARD_H__
|
||||||
|
|
||||||
#include <stdint.h>
|
#include <stdint.h>
|
||||||
//#include "stm8l15x_conf.h"
|
//#include "stm8l15x_conf.h"
|
||||||
@ -78,42 +80,42 @@
|
|||||||
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> SPI */
|
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> SPI */
|
||||||
#define BSP_RF_SPI SPI1
|
#define BSP_RF_SPI SPI1
|
||||||
#define BSP_RF_SPI_CLOCK CLK_Peripheral_SPI1
|
#define BSP_RF_SPI_CLOCK CLK_Peripheral_SPI1
|
||||||
#define Ebyte_BSP_RfSpiSelected() GPIO_WriteBit( BSP_GPIO_PORT_SPI_NSS , BSP_GPIO_PIN_SPI_NSS, RESET )
|
#define Ebyte_BSP_RfSpiSelected() gpio_bit_write( BSP_GPIO_PORT_SPI_NSS , BSP_GPIO_PIN_SPI_NSS, RESET )
|
||||||
#define Ebyte_BSP_RfSpiUnselected() GPIO_WriteBit( BSP_GPIO_PORT_SPI_NSS , BSP_GPIO_PIN_SPI_NSS, SET )
|
#define Ebyte_BSP_RfSpiUnselected() gpio_bit_write( BSP_GPIO_PORT_SPI_NSS , BSP_GPIO_PIN_SPI_NSS, SET )
|
||||||
|
|
||||||
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO */
|
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO */
|
||||||
|
|
||||||
/* E07 */
|
///* E07 */
|
||||||
#define Ebyte_BSP_RfBusyIoRead() GPIO_ReadInputDataBit( BSP_GPIO_PORT_BUSY , BSP_GPIO_PIN_BUSY)
|
//#define Ebyte_BSP_RfBusyIoRead() gpio_input_bit_get( BSP_GPIO_PORT_BUSY , BSP_GPIO_PIN_BUSY)
|
||||||
#define Ebyte_BSP_RfGdo0IoRead() GPIO_ReadInputDataBit( BSP_GPIO_PORT_E07_GDO0 , BSP_GPIO_PIN_E07_GDO0)
|
//#define Ebyte_BSP_RfGdo0IoRead() gpio_input_bit_get( BSP_GPIO_PORT_E07_GDO0 , BSP_GPIO_PIN_E07_GDO0)
|
||||||
#define Ebyte_BSP_RfGdo1IoRead() GPIO_ReadInputDataBit( BSP_GPIO_PORT_E07_GDO1 , BSP_GPIO_PIN_E07_GDO1)
|
//#define Ebyte_BSP_RfGdo1IoRead() gpio_input_bit_get( BSP_GPIO_PORT_E07_GDO1 , BSP_GPIO_PIN_E07_GDO1)
|
||||||
/* E10 */
|
///* E10 */
|
||||||
#define Ebyte_BSP_E10IrqIoRead() GPIO_ReadInputDataBit( BSP_GPIO_PORT_E10_IRQ , BSP_GPIO_PIN_E10_IRQ)
|
//#define Ebyte_BSP_E10IrqIoRead() gpio_input_bit_get( BSP_GPIO_PORT_E10_IRQ , BSP_GPIO_PIN_E10_IRQ)
|
||||||
#define Ebyte_BSP_E10Dio2Read() GPIO_ReadInputDataBit( BSP_GPIO_PORT_E10_DIO2 , BSP_GPIO_PIN_E10_DIO2)
|
//#define Ebyte_BSP_E10Dio2Read() gpio_input_bit_get( BSP_GPIO_PORT_E10_DIO2 , BSP_GPIO_PIN_E10_DIO2)
|
||||||
#define Ebyte_BSP_E10Dio3Read() GPIO_ReadInputDataBit( BSP_GPIO_PORT_E10_DIO3 , BSP_GPIO_PIN_E10_DIO3)
|
//#define Ebyte_BSP_E10Dio3Read() gpio_input_bit_get( BSP_GPIO_PORT_E10_DIO3 , BSP_GPIO_PIN_E10_DIO3)
|
||||||
#define Ebyte_BSP_E10SdnIoLow() GPIO_WriteBit( BSP_GPIO_PORT_E10_SDN , BSP_GPIO_PIN_E10_SDN, RESET )
|
//#define Ebyte_BSP_E10SdnIoLow() gpio_bit_write( BSP_GPIO_PORT_E10_SDN , BSP_GPIO_PIN_E10_SDN, RESET )
|
||||||
#define Ebyte_BSP_E10SdnIoHigh() GPIO_WriteBit( BSP_GPIO_PORT_E10_SDN , BSP_GPIO_PIN_E10_SDN, SET )
|
//#define Ebyte_BSP_E10SdnIoHigh() gpio_bit_write( BSP_GPIO_PORT_E10_SDN , BSP_GPIO_PIN_E10_SDN, SET )
|
||||||
/* E49 */
|
///* E49 */
|
||||||
#define Ebyte_BSP_E49Dio1IoRead() GPIO_ReadInputDataBit( BSP_GPIO_PORT_E49_DIO1 , BSP_GPIO_PIN_E49_DIO1)
|
//#define Ebyte_BSP_E49Dio1IoRead() gpio_input_bit_get( BSP_GPIO_PORT_E49_DIO1 , BSP_GPIO_PIN_E49_DIO1)
|
||||||
#define Ebyte_BSP_E49Dio2IoRead() GPIO_ReadInputDataBit( BSP_GPIO_PORT_E49_DIO2 , BSP_GPIO_PIN_E49_DIO2)
|
//#define Ebyte_BSP_E49Dio2IoRead() gpio_input_bit_get( BSP_GPIO_PORT_E49_DIO2 , BSP_GPIO_PIN_E49_DIO2)
|
||||||
#define Ebyte_BSP_E49FcsbIoLow() GPIO_WriteBit( BSP_GPIO_PORT_E49_FCSB , BSP_GPIO_PIN_E49_FCSB, RESET )
|
//#define Ebyte_BSP_E49FcsbIoLow() gpio_bit_write( BSP_GPIO_PORT_E49_FCSB , BSP_GPIO_PIN_E49_FCSB, RESET )
|
||||||
#define Ebyte_BSP_E49FcsbIoHigh() GPIO_WriteBit( BSP_GPIO_PORT_E49_FCSB , BSP_GPIO_PIN_E49_FCSB, SET )
|
//#define Ebyte_BSP_E49FcsbIoHigh() gpio_bit_write( BSP_GPIO_PORT_E49_FCSB , BSP_GPIO_PIN_E49_FCSB, SET )
|
||||||
#define Ebyte_BSP_E49CsbIoLow() GPIO_WriteBit( BSP_GPIO_PORT_E49_CSB , BSP_GPIO_PIN_E49_CSB, RESET )
|
//#define Ebyte_BSP_E49CsbIoLow() gpio_bit_write( BSP_GPIO_PORT_E49_CSB , BSP_GPIO_PIN_E49_CSB, RESET )
|
||||||
#define Ebyte_BSP_E49CsbIoHigh() GPIO_WriteBit( BSP_GPIO_PORT_E49_CSB , BSP_GPIO_PIN_E49_CSB, SET )
|
//#define Ebyte_BSP_E49CsbIoHigh() gpio_bit_write( BSP_GPIO_PORT_E49_CSB , BSP_GPIO_PIN_E49_CSB, SET )
|
||||||
#define Ebyte_BSP_E49SlckIoLow() GPIO_WriteBit( BSP_GPIO_PORT_E49_SLCK , BSP_GPIO_PIN_E49_SLCK, RESET )
|
//#define Ebyte_BSP_E49SlckIoLow() gpio_bit_write( BSP_GPIO_PORT_E49_SLCK , BSP_GPIO_PIN_E49_SLCK, RESET )
|
||||||
#define Ebyte_BSP_E49SlckIoHigh() GPIO_WriteBit( BSP_GPIO_PORT_E49_SLCK , BSP_GPIO_PIN_E49_SLCK, SET )
|
//#define Ebyte_BSP_E49SlckIoHigh() gpio_bit_write( BSP_GPIO_PORT_E49_SLCK , BSP_GPIO_PIN_E49_SLCK, SET )
|
||||||
#define Ebyte_BSP_E49SdioIoLow() GPIO_WriteBit( BSP_GPIO_PORT_E49_SDIO , BSP_GPIO_PIN_E49_SDIO, RESET )
|
//#define Ebyte_BSP_E49SdioIoLow() gpio_bit_write( BSP_GPIO_PORT_E49_SDIO , BSP_GPIO_PIN_E49_SDIO, RESET )
|
||||||
#define Ebyte_BSP_E49SdioIoHigh() GPIO_WriteBit( BSP_GPIO_PORT_E49_SDIO , BSP_GPIO_PIN_E49_SDIO, SET )
|
//#define Ebyte_BSP_E49SdioIoHigh() gpio_bit_write( BSP_GPIO_PORT_E49_SDIO , BSP_GPIO_PIN_E49_SDIO, SET )
|
||||||
#define Ebyte_BSP_E49SdioIoOutput() GPIO_Init( BSP_GPIO_PORT_E49_SDIO, BSP_GPIO_PIN_E49_SDIO, GPIO_Mode_Out_PP_High_Fast )
|
//#define Ebyte_BSP_E49SdioIoOutput() gpio_mode_set( BSP_GPIO_PORT_E49_SDIO, BSP_GPIO_PIN_E49_SDIO, GPIO_Mode_Out_PP_High_Fast )
|
||||||
#define Ebyte_BSP_E49SdioIoInput() GPIO_Init( BSP_GPIO_PORT_E49_SDIO, BSP_GPIO_PIN_E49_SDIO, GPIO_Mode_In_FL_No_IT )
|
//#define Ebyte_BSP_E49SdioIoInput() GPIO_Init( BSP_GPIO_PORT_E49_SDIO, BSP_GPIO_PIN_E49_SDIO, GPIO_Mode_In_FL_No_IT )
|
||||||
#define Ebyte_BSP_E49SdioIoRead() GPIO_ReadInputDataBit( BSP_GPIO_PORT_E49_SDIO , BSP_GPIO_PIN_E49_SDIO)
|
//#define Ebyte_BSP_E49SdioIoRead() GPIO_ReadInputDataBit( BSP_GPIO_PORT_E49_SDIO , BSP_GPIO_PIN_E49_SDIO)
|
||||||
|
|
||||||
/* E48 */
|
/* E48 */
|
||||||
#define Ebyte_BSP_E48GPIO4Read() GPIO_ReadInputDataBit( BSP_GPIO_PORT_E48_GP4 , BSP_GPIO_PIN_E48_GP4)
|
#define Ebyte_BSP_E48GPIO4Read() gpio_input_bit_get( BSP_GPIO_PORT_E48_GP4 , BSP_GPIO_PIN_E48_GP4)
|
||||||
|
|
||||||
/* ȫ<><C8AB><EFBFBD>ж<EFBFBD> */
|
/* ȫ<><C8AB><EFBFBD>ж<EFBFBD> */
|
||||||
#define Ebyte_BSP_GlobalIntEnable() __enable_interrupt()
|
#define Ebyte_BSP_GlobalIntEnable() __enable_irq()
|
||||||
#define Ebyte_BSP_GlobalIntDisable() __disable_interrupt()
|
#define Ebyte_BSP_GlobalIntDisable() __disable_irq()
|
||||||
|
|
||||||
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> UART */
|
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> UART */
|
||||||
#define BSP_USER_UART USART1
|
#define BSP_USER_UART USART1
|
||||||
@ -171,4 +173,6 @@ uint8_t Ebyte_BSP_SpiTransAndRecv( uint8_t data );
|
|||||||
|
|
||||||
uint8_t Ebyte_BTN_FIFO_Push(BSP_BTN_FIFO_t *fifo, BSP_BTN_EVENT_t event);
|
uint8_t Ebyte_BTN_FIFO_Push(BSP_BTN_FIFO_t *fifo, BSP_BTN_EVENT_t event);
|
||||||
uint8_t Ebyte_BTN_FIFO_Pop(BSP_BTN_FIFO_t *fifo, BSP_BTN_EVENT_t *event);
|
uint8_t Ebyte_BTN_FIFO_Pop(BSP_BTN_FIFO_t *fifo, BSP_BTN_EVENT_t *event);
|
||||||
uint32_t Ebyte_BSP_TimerGetTick(void);
|
uint32_t Ebyte_BSP_TimerGetTick(void);
|
||||||
|
|
||||||
|
#endif // !__EBYTE_BOARD_H__
|
||||||
@ -1,2 +1,6 @@
|
|||||||
|
#ifndef __BOARD_PRINTF_H__
|
||||||
|
#define __BOARD_PRINTF_H__
|
||||||
|
|
||||||
void mprintf(char * Data, ...);
|
void mprintf(char * Data, ...);
|
||||||
|
|
||||||
|
#endif // !__BOARD_PRINTF_H__
|
||||||
|
|||||||
@ -8,16 +8,16 @@
|
|||||||
/* <20><><EFBFBD><EFBFBD>ʶ<EFBFBD><CAB6>ģ<EFBFBD><C4A3>Ƶ<EFBFBD><C6B5> */
|
/* <20><><EFBFBD><EFBFBD>ʶ<EFBFBD><CAB6>ģ<EFBFBD><C4A3>Ƶ<EFBFBD><C6B5> */
|
||||||
#if defined(EBYTE_E48_433M20S)
|
#if defined(EBYTE_E48_433M20S)
|
||||||
|
|
||||||
#define EBYTE_E48_FREQUENCY_TYPE 0x00000433
|
#define EBYTE_E48_FREQUENCY_TYPE 0x00000433
|
||||||
|
|
||||||
#elif defined(EBYTE_E48_900M20S)
|
#elif defined(EBYTE_E48_900M20S)
|
||||||
|
|
||||||
#define EBYTE_E48_FREQUENCY_TYPE 0x00000900
|
#define EBYTE_E48_FREQUENCY_TYPE 0x00000900
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* <20><><EFBFBD><EFBFBD>ʶ<EFBFBD><CAB6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>汾<EFBFBD><E6B1BE> */
|
/* <20><><EFBFBD><EFBFBD>ʶ<EFBFBD><CAB6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>汾<EFBFBD><E6B1BE> */
|
||||||
#define EBYTE_E48_PROGRAM_TYPE 0x10
|
#define EBYTE_E48_PROGRAM_TYPE 0x10
|
||||||
|
|
||||||
#include "board.h"
|
#include "board.h"
|
||||||
|
|
||||||
@ -51,7 +51,7 @@ void Ebyte_E48x_SetSleep( uint8_t cmd )
|
|||||||
|
|
||||||
void Ebyte_E48x_IntOrPollTask( void )
|
void Ebyte_E48x_IntOrPollTask( void )
|
||||||
{
|
{
|
||||||
radio_rece_data_flag = GPIO_ReadInputDataBit( BSP_GPIO_PORT_E48_GP4 , BSP_GPIO_PIN_E48_GP4);
|
radio_rece_data_flag = gpio_input_bit_get( BSP_GPIO_PORT_E48_GP4 , BSP_GPIO_PIN_E48_GP4);
|
||||||
/* <20>н<EFBFBD><D0BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
/* <20>н<EFBFBD><D0BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||||
if( radio_rece_data_flag != RESET )
|
if( radio_rece_data_flag != RESET )
|
||||||
{
|
{
|
||||||
@ -69,8 +69,8 @@ void Ebyte_E48x_InterruptTrigger( void )
|
|||||||
|
|
||||||
/* !
|
/* !
|
||||||
* @brief <20><>ȡģ<C8A1><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
* @brief <20><>ȡģ<C8A1><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
*
|
*
|
||||||
* @return 32λ<32>ı<EFBFBD><C4B1><EFBFBD>
|
* @return 32λ<32>ı<EFBFBD><C4B1><EFBFBD>
|
||||||
* @note <20><>16λ<36><CEBB><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>0x0220 <20><><EFBFBD><EFBFBD>E22ģ<32><C4A3>
|
* @note <20><>16λ<36><CEBB><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>0x0220 <20><><EFBFBD><EFBFBD>E22ģ<32><C4A3>
|
||||||
* <20><>16λ<36><CEBB><EFBFBD><EFBFBD>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>0x0400 <20><><EFBFBD><EFBFBD>400Ƶ<30><C6B5>
|
* <20><>16λ<36><CEBB><EFBFBD><EFBFBD>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>0x0400 <20><><EFBFBD><EFBFBD>400Ƶ<30><C6B5>
|
||||||
*/
|
*/
|
||||||
@ -81,8 +81,8 @@ uint32_t Ebyte_E48x_GetName(void)
|
|||||||
|
|
||||||
/* !
|
/* !
|
||||||
* @brief <20><>ȡģ<C8A1><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>汾
|
* @brief <20><>ȡģ<C8A1><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>汾
|
||||||
*
|
*
|
||||||
* @return 8λ<38>ı<EFBFBD><C4B1><EFBFBD>
|
* @return 8λ<38>ı<EFBFBD><C4B1><EFBFBD>
|
||||||
* @note <20><><EFBFBD><EFBFBD>0x10 <20><><EFBFBD><EFBFBD>V1.0
|
* @note <20><><EFBFBD><EFBFBD>0x10 <20><><EFBFBD><EFBFBD>V1.0
|
||||||
*/
|
*/
|
||||||
uint8_t Ebyte_E48x_GetDriverVersion(void)
|
uint8_t Ebyte_E48x_GetDriverVersion(void)
|
||||||
|
|||||||
@ -71,23 +71,23 @@ const uint8_t cmt2310a_power[55][7] = {
|
|||||||
********************************/
|
********************************/
|
||||||
void vRadioInit( void )
|
void vRadioInit( void )
|
||||||
{
|
{
|
||||||
byte fw_rev;
|
byte fw_rev;
|
||||||
vRadioSoftReset();
|
vRadioSoftReset();
|
||||||
vRadioConfigPageReg( 0, g_cmt2310a_page0, CMT2310A_PAGE0_SIZE ); //config page 0
|
vRadioConfigPageReg( 0, g_cmt2310a_page0, CMT2310A_PAGE0_SIZE ); //config page 0
|
||||||
vRadioConfigPageReg( 1, g_cmt2310a_page1, CMT2310A_PAGE1_SIZE ); //config page 1
|
vRadioConfigPageReg( 1, g_cmt2310a_page1, CMT2310A_PAGE1_SIZE ); //config page 1
|
||||||
vRadioSetNirq( CMT2310A_nIRQ_TCXO ); //for TCXO need cofig as nIRQ pin at first
|
vRadioSetNirq( CMT2310A_nIRQ_TCXO ); //for TCXO need cofig as nIRQ pin at first
|
||||||
vRadioTcxoDrvSel( 0 ); //drive power
|
vRadioTcxoDrvSel( 0 ); //drive power
|
||||||
|
|
||||||
fw_rev = (byte)g_chip_id; //dealwith Xtal
|
fw_rev = (byte)g_chip_id; //dealwith Xtal
|
||||||
switch(fw_rev)
|
switch(fw_rev)
|
||||||
{
|
{
|
||||||
case 0xC0:
|
case 0xC0:
|
||||||
vRadioXoWaitCfg(RADIO_CGU_DIV4);
|
vRadioXoWaitCfg(RADIO_CGU_DIV4);
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
vRadioPowerUpBoot();
|
vRadioPowerUpBoot();
|
||||||
delay1ms( 10 );
|
delay1ms( 10 );
|
||||||
bRadioGoStandby();
|
bRadioGoStandby();
|
||||||
@ -187,7 +187,7 @@ void vRadioInit( void )
|
|||||||
//packet frame format
|
//packet frame format
|
||||||
g_radio.frame_cfg.DATA_MODE = 2; //0=direct mode, 2=packet mode
|
g_radio.frame_cfg.DATA_MODE = 2; //0=direct mode, 2=packet mode
|
||||||
g_radio.frame_cfg.FRAME_CFG1_u._BITS.PKT_TYPE = 1; //0=fixd-length packet mode 1=<3D>ɱ䳤
|
g_radio.frame_cfg.FRAME_CFG1_u._BITS.PKT_TYPE = 1; //0=fixd-length packet mode 1=<3D>ɱ䳤
|
||||||
g_radio.frame_cfg.FRAME_CFG1_u._BITS.PAYLOAD_BIT_ORDER = 0; //msb first
|
g_radio.frame_cfg.FRAME_CFG1_u._BITS.PAYLOAD_BIT_ORDER = 0; //msb first
|
||||||
g_radio.frame_cfg.FRAME_CFG1_u._BITS.ADDR_LEN_CONF = 0;
|
g_radio.frame_cfg.FRAME_CFG1_u._BITS.ADDR_LEN_CONF = 0;
|
||||||
g_radio.frame_cfg.FRAME_CFG1_u._BITS.PAGGYBACKING_EN = 0;
|
g_radio.frame_cfg.FRAME_CFG1_u._BITS.PAGGYBACKING_EN = 0;
|
||||||
g_radio.frame_cfg.FRAME_CFG1_u._BITS.LENGTH_SIZE = 0;
|
g_radio.frame_cfg.FRAME_CFG1_u._BITS.LENGTH_SIZE = 0;
|
||||||
@ -226,9 +226,9 @@ void vRadioInit( void )
|
|||||||
g_radio.word_mode_cfg.WORK_MODE_CFG5_u._BITS.CSMA_CCA_WIN_SEL = 0;
|
g_radio.word_mode_cfg.WORK_MODE_CFG5_u._BITS.CSMA_CCA_WIN_SEL = 0;
|
||||||
g_radio.word_mode_cfg.WORK_MODE_CFG5_u._BITS.CSMA_CCA_INT_SEL = 0;
|
g_radio.word_mode_cfg.WORK_MODE_CFG5_u._BITS.CSMA_CCA_INT_SEL = 0;
|
||||||
g_radio.word_mode_cfg.WORK_MODE_CFG5_u._BITS.CSMA_PERSIST_EN = 0;
|
g_radio.word_mode_cfg.WORK_MODE_CFG5_u._BITS.CSMA_PERSIST_EN = 0;
|
||||||
|
|
||||||
g_radio.word_mode_cfg.WORK_MODE_CFG6_u._BITS.FREQ_HOP_MANU_EN = 1;//ʹ<><CAB9><EFBFBD>ֶ<EFBFBD><D6B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9><EFBFBD>ֶ<EFBFBD><D6B6><EFBFBD>Ƶ<EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
|
g_radio.word_mode_cfg.WORK_MODE_CFG6_u._BITS.FREQ_HOP_MANU_EN = 1;//ʹ<><CAB9><EFBFBD>ֶ<EFBFBD><D6B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9><EFBFBD>ֶ<EFBFBD><D6B6><EFBFBD>Ƶ<EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
|
||||||
|
|
||||||
g_radio.word_mode_cfg.FREQ_CHANL_NANU = 92;//<2F>ֶ<EFBFBD><D6B6><EFBFBD>Ƶ<EFBFBD>ŵ<EFBFBD>0~255
|
g_radio.word_mode_cfg.FREQ_CHANL_NANU = 92;//<2F>ֶ<EFBFBD><D6B6><EFBFBD>Ƶ<EFBFBD>ŵ<EFBFBD>0~255
|
||||||
g_radio.word_mode_cfg.FREQ_DONE_TIMES = 0;
|
g_radio.word_mode_cfg.FREQ_DONE_TIMES = 0;
|
||||||
g_radio.word_mode_cfg.FREQ_SPACE = 250;//<2F><>Ƶ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD><EFBFBD><EFBFBD>0~255 KHz
|
g_radio.word_mode_cfg.FREQ_SPACE = 250;//<2F><>Ƶ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD><EFBFBD><EFBFBD>0~255 KHz
|
||||||
@ -327,7 +327,7 @@ void vRadioReceive(void)
|
|||||||
vRadioSetPayloadLength(&g_radio.frame_cfg);
|
vRadioSetPayloadLength(&g_radio.frame_cfg);
|
||||||
vRadioSetInt1Sel(CMT2310A_INT_PKT_DONE);
|
vRadioSetInt1Sel(CMT2310A_INT_PKT_DONE);
|
||||||
vRadioSetInt2Sel(CMT2310A_INT_RX_FIFO_WBYTE);
|
vRadioSetInt2Sel(CMT2310A_INT_RX_FIFO_WBYTE);
|
||||||
bRadioGoRx();
|
bRadioGoRx();
|
||||||
}
|
}
|
||||||
|
|
||||||
void vRadioTransmit(uint8_t* buffer, uint8_t length )
|
void vRadioTransmit(uint8_t* buffer, uint8_t length )
|
||||||
@ -340,19 +340,19 @@ void vRadioTransmit(uint8_t* buffer, uint8_t length )
|
|||||||
// vRadioReadTxFifo(radio_rx_buf, 20);
|
// vRadioReadTxFifo(radio_rx_buf, 20);
|
||||||
// vRadioManualResetTxFifoPointer();
|
// vRadioManualResetTxFifoPointer();
|
||||||
bRadioGoTx();
|
bRadioGoTx();
|
||||||
|
|
||||||
while ( GPIO_ReadInputDataBit( BSP_GPIO_PORT_E48_GP4 , BSP_GPIO_PIN_E48_GP4) == RESET);
|
while ( gpio_input_bit_get( BSP_GPIO_PORT_E48_GP4 , BSP_GPIO_PIN_E48_GP4) == RESET);
|
||||||
bRadioGoStandby();
|
bRadioGoStandby();
|
||||||
vRadioClearTxFifo();
|
vRadioClearTxFifo();
|
||||||
vRadioClearInterrupt();
|
vRadioClearInterrupt();
|
||||||
|
|
||||||
vRadioReceive();
|
vRadioReceive();
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t vRadioGetPacket(uint8_t *buffer,uint8_t *length)
|
uint8_t vRadioGetPacket(uint8_t *buffer,uint8_t *length)
|
||||||
{
|
{
|
||||||
uint8_t rx_length;
|
uint8_t rx_length;
|
||||||
|
|
||||||
if( g_radio.crc_cfg.CRC_CFG_u._BITS.CRC_EN == 1 )
|
if( g_radio.crc_cfg.CRC_CFG_u._BITS.CRC_EN == 1 )
|
||||||
{
|
{
|
||||||
vRadioInterruptSoucreFlag( &g_radio.int_src_flag );
|
vRadioInterruptSoucreFlag( &g_radio.int_src_flag );
|
||||||
@ -365,15 +365,15 @@ uint8_t vRadioGetPacket(uint8_t *buffer,uint8_t *length)
|
|||||||
{
|
{
|
||||||
// g_rx_count++;
|
// g_rx_count++;
|
||||||
}
|
}
|
||||||
|
|
||||||
vRadioReadFifo(&rx_length, 1);
|
vRadioReadFifo(&rx_length, 1);
|
||||||
|
|
||||||
vRadioReadFifo(buffer, rx_length);
|
vRadioReadFifo(buffer, rx_length);
|
||||||
*length = rx_length;
|
*length = rx_length;
|
||||||
vRadioClearRxFifo();
|
vRadioClearRxFifo();
|
||||||
vRadioClearInterrupt();
|
vRadioClearInterrupt();
|
||||||
bRadioGoRx();
|
bRadioGoRx();
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -384,15 +384,15 @@ void vRadioCheckLink(void)
|
|||||||
while(1)
|
while(1)
|
||||||
{
|
{
|
||||||
vRadioSoftReset();
|
vRadioSoftReset();
|
||||||
vRadioPowerUpBoot();
|
vRadioPowerUpBoot();
|
||||||
delay1ms(10);
|
delay1ms(10);
|
||||||
g_chip_id = lRadioChipVersion();
|
g_chip_id = lRadioChipVersion();
|
||||||
if(0x00231000==(g_chip_id&0x00FFFF00)) break;
|
if(0x00231000==(g_chip_id&0x00FFFF00)) break;
|
||||||
|
|
||||||
DEBUG( "Link Error.....\r\n" );
|
DEBUG( "Link Error.....\r\n" );
|
||||||
delay1ms(500);
|
delay1ms(500);
|
||||||
i++;
|
i++;
|
||||||
if(i >= 20) while(1);
|
if(i >= 20) while(1);
|
||||||
}
|
}
|
||||||
DEBUG( "Link Device:E48-XXXM20S....\r\n" );
|
DEBUG( "Link Device:E48-XXXM20S....\r\n" );
|
||||||
}
|
}
|
||||||
|
|||||||
@ -8,15 +8,12 @@ void delay1ms(uint16_t cnt)
|
|||||||
void delay10us(uint32_t cnt)
|
void delay10us(uint32_t cnt)
|
||||||
{
|
{
|
||||||
uint8_t i;
|
uint8_t i;
|
||||||
|
|
||||||
while( cnt-- )
|
while( cnt-- ) {
|
||||||
{
|
|
||||||
i = 20;
|
i = 20;
|
||||||
while(i--)
|
while(i--)
|
||||||
{
|
__NOP();
|
||||||
asm("nop");
|
}
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/******************************
|
/******************************
|
||||||
|
|||||||
@ -64,13 +64,18 @@ target_include_directories(cmt2310
|
|||||||
${CMAKE_CURRENT_SOURCE_DIR}/1_Middleware/Produce/
|
${CMAKE_CURRENT_SOURCE_DIR}/1_Middleware/Produce/
|
||||||
${CMAKE_CURRENT_SOURCE_DIR}/2_Ebyte_Board_Support/E15-EVB02/
|
${CMAKE_CURRENT_SOURCE_DIR}/2_Ebyte_Board_Support/E15-EVB02/
|
||||||
${CMAKE_CURRENT_SOURCE_DIR}/3_Ebyte_WirelessModule_Drivers/E48xMx/
|
${CMAKE_CURRENT_SOURCE_DIR}/3_Ebyte_WirelessModule_Drivers/E48xMx/
|
||||||
${CMAKE_CURRENT_SOURCE_DIR}/4_STM8_L15x_StdPeriph_Drivers/
|
# ${CMAKE_CURRENT_SOURCE_DIR}/4_STM8_L15x_StdPeriph_Drivers/
|
||||||
${CMAKE_CURRENT_SOURCE_DIR}/4_STM8_L15x_StdPeriph_Drivers/inc/
|
# ${CMAKE_CURRENT_SOURCE_DIR}/4_STM8_L15x_StdPeriph_Drivers/inc/
|
||||||
)
|
)
|
||||||
|
|
||||||
target_include_directories(cmt2310_api
|
target_include_directories(cmt2310_api
|
||||||
INTERFACE
|
INTERFACE
|
||||||
${CMAKE_CURRENT_SOURCE_DIR}/0_Project/IAR_for_Stm8/Uart_PingPong/ebyte/ebyte_core.h
|
${CMAKE_CURRENT_SOURCE_DIR}/0_Project/IAR_for_Stm8/Uart_PingPong/
|
||||||
|
${CMAKE_CURRENT_SOURCE_DIR}/0_Project/IAR_for_Stm8/Uart_PingPong/ebyte/
|
||||||
|
${CMAKE_CURRENT_SOURCE_DIR}/1_Middleware/Kfifo/
|
||||||
|
${CMAKE_CURRENT_SOURCE_DIR}/1_Middleware/Produce/
|
||||||
|
${CMAKE_CURRENT_SOURCE_DIR}/2_Ebyte_Board_Support/E15-EVB02/
|
||||||
|
${CMAKE_CURRENT_SOURCE_DIR}/3_Ebyte_WirelessModule_Drivers/E48xMx/
|
||||||
)
|
)
|
||||||
|
|
||||||
target_link_libraries(cmt2310
|
target_link_libraries(cmt2310
|
||||||
|
|||||||
Reference in New Issue
Block a user