RTOS/SDK_GD32W51x
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[Mod] 解决编译错误

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This commit is contained in:
gaoyang3513
2024-07-23 22:03:19 +08:00
parent e1549ed7f3
commit d39d11abad
7 changed files with 142 additions and 139 deletions
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2
NSPE/Firmware/CMSIS/GD/GD32W51x/Include/gd32w51x.h
View File

@ -194,7 +194,7 @@ typedef enum IRQn
/* enum definitions */
typedef enum {DISABLE = 0, ENABLE = !DISABLE} EventStatus, ControlStatus;
typedef enum {RESET = 0, SET = !RESET} FlagStatus;
typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus, BitStatus, BitAction;
typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrStatus;
/* bit operations */

8
NSPE/WIFI_IOT/bsp/drivers/0_Project/IAR_for_Stm8/Uart_PingPong/ebyte/ebyte_port.h
View File

@ -1,4 +1,9 @@
#ifndef __EBYTE_PORT_H
#define __EBYTE_PORT_H
#include <stdio.h>
#include "ebyte_conf.h"
//#include "stm8l15x.h"
//typedef unsigned char uint8e_t;
//typedef unsigned short uint16e_t;
@ -24,5 +29,4 @@ void Ebyte_Port_SpiCsIoControl( uint8e_t cmd );
uint8e_t Ebyte_Port_BusyIoRead( void );
uint8e_t Ebyte_Port_SpiTransmitAndReceivce( uint8e_t send );
#endif /* __EBYTE_PORT_H */

2
NSPE/WIFI_IOT/bsp/drivers/0_Project/IAR_for_Stm8/Uart_PingPong/main.c
View File

@ -58,7 +58,7 @@ static BSP_BTN_EVENT_t BTN_Event;
int main( void )
{
/* <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>Դ <20><>ʼ<EFBFBD><CABC> */
Ebyte_BSP_Init();
// Ebyte_BSP_Init();
/* (<28><>ѡ) <20><><EFBFBD><EFBFBD><EFBFBD>жϽ<D0B6><CFBD><EFBFBD>FIFO <20>ɸ<EFBFBD><C9B8><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD>д<EFBFBD><D0B4><EFBFBD> */
Ebyte_FIFO_Init( &hfifo, EBYTE_FIFO_SIZE );

154
NSPE/WIFI_IOT/bsp/drivers/2_Ebyte_Board_Support/E15-EVB02/board.c
View File

@ -20,6 +20,7 @@
*/
#include "board.h"
#include "ebyte_port.h"
#include "ebyte_conf.h"
BSP_BTN_FIFO_t BSP_BTN_FIFO;
@ -33,21 +34,21 @@ volatile uint32_t Ebyte_TimerDelayCounter = 0;
*/
void Ebyte_BSP_HSI_Init(void)
{
/* <20>ڲ<EFBFBD> 16M HSI ʱ<><CAB1> */
CLK_SYSCLKSourceConfig( CLK_SYSCLKSource_HSI );
/* 1<><31>Ƶ 16M/1 */
CLK_SYSCLKDivConfig( CLK_SYSCLKDiv_1 );
// /* <20>ڲ<EFBFBD> 16M HSI ʱ<><CAB1> */
// CLK_SYSCLKSourceConfig( CLK_SYSCLKSource_HSI );
//
// /* 1<><31>Ƶ 16M/1 */
// CLK_SYSCLKDivConfig( CLK_SYSCLKDiv_1 );
}
void Ebyte_BSP_E48xGPIO_Init(void)
{
// GPIO_Init( BSP_GPIO_PORT_E48_GP0, BSP_GPIO_PIN_E48_GP0, GPIO_Mode_In_PU_No_IT );
GPIO_Init( BSP_GPIO_PORT_E48_NIRQ, BSP_GPIO_PIN_E48_NIRQ, GPIO_Mode_In_PU_No_IT );
GPIO_Init( BSP_GPIO_PORT_E48_GP3, BSP_GPIO_PIN_E48_GP3, GPIO_Mode_In_PU_No_IT );
GPIO_Init( BSP_GPIO_PORT_E48_GP4, BSP_GPIO_PIN_E48_GP4, GPIO_Mode_In_FL_No_IT );
GPIO_Init( BSP_GPIO_PORT_E48_GP5, BSP_GPIO_PIN_E48_GP5, GPIO_Mode_In_PU_No_IT );
// GPIO_Init( BSP_GPIO_PORT_E48_NIRQ, BSP_GPIO_PIN_E48_NIRQ, GPIO_Mode_In_PU_No_IT );
// GPIO_Init( BSP_GPIO_PORT_E48_GP3, BSP_GPIO_PIN_E48_GP3, GPIO_Mode_In_PU_No_IT );
// GPIO_Init( BSP_GPIO_PORT_E48_GP4, BSP_GPIO_PIN_E48_GP4, GPIO_Mode_In_FL_No_IT );
// GPIO_Init( BSP_GPIO_PORT_E48_GP5, BSP_GPIO_PIN_E48_GP5, GPIO_Mode_In_PU_No_IT );
}
/* !
* @brief <20><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO
@ -56,16 +57,16 @@ void Ebyte_BSP_E48xGPIO_Init(void)
*/
void Ebyte_BSP_GPIO_Init(void)
{
/* <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>״̬<D7B4><CCAC><EFBFBD><EFBFBD> */
Ebyte_BSP_E48xGPIO_Init();
/* LED */
GPIO_Init( BSP_GPIO_PORT_LED_1, BSP_GPIO_PIN_LED_1, GPIO_Mode_Out_PP_Low_Slow );
GPIO_Init( BSP_GPIO_PORT_LED_2, BSP_GPIO_PIN_LED_2, GPIO_Mode_Out_PP_Low_Slow );
/* <20><><EFBFBD><EFBFBD> */
GPIO_Init( BSP_GPIO_PORT_BUTTON_1, BSP_GPIO_PIN_BUTTON_1, GPIO_Mode_In_PU_No_IT );
GPIO_Init( BSP_GPIO_PORT_BUTTON_2, BSP_GPIO_PIN_BUTTON_2, GPIO_Mode_In_PU_No_IT );
// /* <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>״̬<D7B4><CCAC><EFBFBD><EFBFBD> */
// Ebyte_BSP_E48xGPIO_Init();
// /* LED */
// GPIO_Init( BSP_GPIO_PORT_LED_1, BSP_GPIO_PIN_LED_1, GPIO_Mode_Out_PP_Low_Slow );
// GPIO_Init( BSP_GPIO_PORT_LED_2, BSP_GPIO_PIN_LED_2, GPIO_Mode_Out_PP_Low_Slow );
//
// /* <20><><EFBFBD><EFBFBD> */
// GPIO_Init( BSP_GPIO_PORT_BUTTON_1, BSP_GPIO_PIN_BUTTON_1, GPIO_Mode_In_PU_No_IT );
//
// GPIO_Init( BSP_GPIO_PORT_BUTTON_2, BSP_GPIO_PIN_BUTTON_2, GPIO_Mode_In_PU_No_IT );
}
/* !
@ -75,24 +76,24 @@ void Ebyte_BSP_GPIO_Init(void)
*/
void Ebyte_BSP_UART_Init( void )
{
/* ʱ<><CAB1> */
CLK_PeripheralClockConfig( BSP_USER_UART_CLOCK, ENABLE);
/* GPIO */
GPIO_ExternalPullUpConfig( BSP_GPIO_PORT_UART_TX, BSP_GPIO_PIN_UART_TX, ENABLE );
GPIO_ExternalPullUpConfig( BSP_GPIO_PORT_UART_RX, BSP_GPIO_PIN_UART_RX, ENABLE );
/* <20>˿<EFBFBD><CBBF><EFBFBD>ӳ<EFBFBD><D3B3> */
SYSCFG_REMAPPinConfig( REMAP_Pin_USART1TxRxPortA, ENABLE );
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> E15-EVB02Ĭ<32>ϲ<EFBFBD><CFB2><EFBFBD><EFBFBD><EFBFBD>9600 8N1 */
USART_Init( BSP_USER_UART, BSP_USER_UART_BAUDRATE, USART_WordLength_8b, USART_StopBits_1, BSP_USER_UART_PARITY, (USART_Mode_TypeDef)(USART_Mode_Rx | USART_Mode_Tx ));//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>պͷ<D5BA><CDB7><EFBFBD>
/* <20>򿪽<EFBFBD><F2BFAABD><EFBFBD><EFBFBD>ж<EFBFBD> */;
USART_ITConfig( BSP_USER_UART, USART_IT_RXNE, ENABLE );
/* <20><><EFBFBD><EFBFBD> ʹ<><CAB9> */
USART_Cmd( BSP_USER_UART, ENABLE);
// /* ʱ<><CAB1> */
// CLK_PeripheralClockConfig( BSP_USER_UART_CLOCK, ENABLE);
//
// /* GPIO */
// GPIO_ExternalPullUpConfig( BSP_GPIO_PORT_UART_TX, BSP_GPIO_PIN_UART_TX, ENABLE );
// GPIO_ExternalPullUpConfig( BSP_GPIO_PORT_UART_RX, BSP_GPIO_PIN_UART_RX, ENABLE );
//
// /* <20>˿<EFBFBD><CBBF><EFBFBD>ӳ<EFBFBD><D3B3> */
// SYSCFG_REMAPPinConfig( REMAP_Pin_USART1TxRxPortA, ENABLE );
//
// /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> E15-EVB02Ĭ<32>ϲ<EFBFBD><CFB2><EFBFBD><EFBFBD><EFBFBD>9600 8N1 */
// USART_Init( BSP_USER_UART, BSP_USER_UART_BAUDRATE, USART_WordLength_8b, USART_StopBits_1, BSP_USER_UART_PARITY, (USART_Mode_TypeDef)(USART_Mode_Rx | USART_Mode_Tx ));//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>պͷ<D5BA><CDB7><EFBFBD>
//
// /* <20>򿪽<EFBFBD><F2BFAABD><EFBFBD><EFBFBD>ж<EFBFBD> */;
// USART_ITConfig( BSP_USER_UART, USART_IT_RXNE, ENABLE );
//
// /* <20><><EFBFBD><EFBFBD> ʹ<><CAB9> */
// USART_Cmd( BSP_USER_UART, ENABLE);
}
void Ebyte_BSP_ThreeLinesSPI_Init()
@ -105,26 +106,26 @@ void Ebyte_BSP_ThreeLinesSPI_Init()
*/
void Ebyte_BSP_SPI_Init( void )
{
/* ʱ<><CAB1> */
CLK_PeripheralClockConfig( CLK_Peripheral_SPI1, ENABLE);
/* GPIO */
GPIO_Init( BSP_GPIO_PORT_SPI_NSS, BSP_GPIO_PIN_SPI_NSS, GPIO_Mode_Out_PP_High_Slow); //Ƭѡ CS
GPIO_ExternalPullUpConfig( BSP_GPIO_PORT_SPI_SCK, BSP_GPIO_PIN_SPI_MOSI | BSP_GPIO_PIN_SPI_MISO | BSP_GPIO_PIN_SPI_SCK, ENABLE); // MOSI MISO SCK
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
SPI_Init( BSP_RF_SPI,
SPI_FirstBit_MSB, //<2F>Ӹ<EFBFBD>λ<EFBFBD><CEBB>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>
SPI_BaudRatePrescaler_8, //16M/2 SCK<43><4B><EFBFBD><EFBFBD>
SPI_Mode_Master, //<2F><><EFBFBD><EFBFBD>ģʽ
SPI_CPOL_Low, //<2F><><EFBFBD><EFBFBD> CPOL=0
SPI_CPHA_1Edge, //<2F><><EFBFBD><EFBFBD> CPHA=0 <20><>һ<EFBFBD><D2BB>ʱ<EFBFBD>ӱ<EFBFBD><D3B1>ز<EFBFBD><D8B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
SPI_Direction_2Lines_FullDuplex, //ȫ˫<C8AB><CBAB>
SPI_NSS_Soft, //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƴӻ<C6B4>CSƬѡ
0x07); //CRC<52><43><EFBFBD><EFBFBD>
/* ʹ<><CAB9> */
SPI_Cmd( BSP_RF_SPI, ENABLE );
// /* ʱ<><CAB1> */
// CLK_PeripheralClockConfig( CLK_Peripheral_SPI1, ENABLE);
//
// /* GPIO */
// GPIO_Init( BSP_GPIO_PORT_SPI_NSS, BSP_GPIO_PIN_SPI_NSS, GPIO_Mode_Out_PP_High_Slow); //Ƭѡ CS
// GPIO_ExternalPullUpConfig( BSP_GPIO_PORT_SPI_SCK, BSP_GPIO_PIN_SPI_MOSI | BSP_GPIO_PIN_SPI_MISO | BSP_GPIO_PIN_SPI_SCK, ENABLE); // MOSI MISO SCK
//
// /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
// SPI_Init( BSP_RF_SPI,
// SPI_FirstBit_MSB, //<2F>Ӹ<EFBFBD>λ<EFBFBD><CEBB>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>
// SPI_BaudRatePrescaler_8, //16M/2 SCK<43><4B><EFBFBD><EFBFBD>
// SPI_Mode_Master, //<2F><><EFBFBD><EFBFBD>ģʽ
// SPI_CPOL_Low, //<2F><><EFBFBD><EFBFBD> CPOL=0
// SPI_CPHA_1Edge, //<2F><><EFBFBD><EFBFBD> CPHA=0 <20><>һ<EFBFBD><D2BB>ʱ<EFBFBD>ӱ<EFBFBD><D3B1>ز<EFBFBD><D8B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
// SPI_Direction_2Lines_FullDuplex, //ȫ˫<C8AB><CBAB>
// SPI_NSS_Soft, //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƴӻ<C6B4>CSƬѡ
// 0x07); //CRC<52><43><EFBFBD><EFBFBD>
//
// /* ʹ<><CAB9> */
// SPI_Cmd( BSP_RF_SPI, ENABLE );
}
/* !
@ -136,11 +137,11 @@ void Ebyte_BSP_SPI_Init( void )
*/
uint8_t Ebyte_BSP_SpiTransAndRecv( uint8_t data )
{
BSP_RF_SPI->DR = data;
while ((BSP_RF_SPI->SR & SPI_FLAG_TXE) == RESET);
while ((BSP_RF_SPI->SR & SPI_FLAG_RXNE) == RESET);
return BSP_RF_SPI->DR;
// BSP_RF_SPI->DR = data;
// while ((BSP_RF_SPI->SR & SPI_FLAG_TXE) == RESET);
//
// while ((BSP_RF_SPI->SR & SPI_FLAG_RXNE) == RESET);
// return BSP_RF_SPI->DR;
}
/* !
@ -152,18 +153,18 @@ uint8_t Ebyte_BSP_SpiTransAndRecv( uint8_t data )
*/
void Ebyte_BSP_TIMER_Init( void )
{
/* ʱ<><CAB1> */
CLK_PeripheralClockConfig( CLK_Peripheral_TIM3, ENABLE);
/* <20><><EFBFBD><EFBFBD> */
TIM3_TimeBaseInit( TIM3_Prescaler_128 , TIM3_CounterMode_Up, 124);
/* <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD> */
TIM3_ClearFlag(TIM3_FLAG_Update);
TIM3_ITConfig(TIM3_IT_Update, ENABLE);
/* ʹ<><CAB9> */
TIM3_Cmd(ENABLE);
// /* ʱ<><CAB1> */
// CLK_PeripheralClockConfig( CLK_Peripheral_TIM3, ENABLE);
//
// /* <20><><EFBFBD><EFBFBD> */
// TIM3_TimeBaseInit( TIM3_Prescaler_128 , TIM3_CounterMode_Up, 124);
//
// /* <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD> */
// TIM3_ClearFlag(TIM3_FLAG_Update);
// TIM3_ITConfig(TIM3_IT_Update, ENABLE);
//
// /* ʹ<><CAB9> */
// TIM3_Cmd(ENABLE);
}
/* !
@ -190,16 +191,11 @@ void Ebyte_BSP_Init( void )
/* SPI<50>ӿ<EFBFBD> <20><>ʼ<EFBFBD><CABC> */
Ebyte_BSP_SPI_Init();
/* <20><>ʱ<EFBFBD><CAB1> <20><>ʼ<EFBFBD><CABC> */
Ebyte_BSP_TIMER_Init();
/* <20><><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD> <20><>ʼ<EFBFBD><CABC> */
Ebyte_BTN_FIFO_Init( &BSP_BTN_FIFO );
}
/* !

6
NSPE/WIFI_IOT/bsp/drivers/2_Ebyte_Board_Support/E15-EVB02/board_mini_printf.c
View File

@ -1,4 +1,6 @@
#include <stdio.h>
#include "stdarg.h"
#include "gd32w51x.h"
//#include "stm8l15x_usart.h"
#include "board_mini_printf.h"
@ -9,8 +11,8 @@
*/
static void send_uart_data(uint8_t data)
{
while (USART_GetFlagStatus(USART1, USART_FLAG_TXE) == RESET);
USART_SendData8(USART1,data);
// while (USART_GetFlagStatus(USART1, USART_FLAG_TXE) == RESET);
// USART_SendData8(USART1,data);
}
/*

1
NSPE/WIFI_IOT/bsp/drivers/3_Ebyte_WirelessModule_Drivers/E48xMx/radio_hal.h
View File

@ -5,6 +5,7 @@
#define __RADIO_HAL_H
//#include "stm8l15x.h"
#include "gd32w51x.h"
#include "ebyte_port.h"

58
NSPE/WIFI_IOT/bsp/drivers/CMakeLists.txt
View File

@ -9,7 +9,7 @@ target_sources(cmt2310
0_Project/IAR_for_Stm8/Uart_PingPong/ebyte/ebyte_callback.c
0_Project/IAR_for_Stm8/Uart_PingPong/ebyte/ebyte_core.c
0_Project/IAR_for_Stm8/Uart_PingPong/ebyte/ebyte_port.c
0_Project/IAR_for_Stm8/Uart_PingPong/stm8l15x_it.c
# 0_Project/IAR_for_Stm8/Uart_PingPong/stm8l15x_it.c
0_Project/IAR_for_Stm8/Uart_PingPong/main.c
1_Middleware/Kfifo/ebyte_kfifo.c
1_Middleware/Produce/ebyte_debug.c
@ -26,34 +26,34 @@ target_sources(cmt2310
3_Ebyte_WirelessModule_Drivers/E48xMx/radio_mac.c
3_Ebyte_WirelessModule_Drivers/E48xMx/radio_spi.c
3_Ebyte_WirelessModule_Drivers/E48xMx/ebyte_e48x.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_tim5.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_tim1.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_rst.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_comp.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_tim4.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_i2c.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_itc.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_tim3.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_irtim.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_beep.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_aes.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_tim2.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_iwdg.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_adc.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_rtc.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_exti.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_gpio.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_lcd.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_wwdg.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_flash.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_pwr.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_spi.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_syscfg.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_clk.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_usart.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_dac.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_wfe.c
4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_dma.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_tim5.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_tim1.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_rst.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_comp.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_tim4.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_i2c.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_itc.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_tim3.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_irtim.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_beep.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_aes.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_tim2.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_iwdg.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_adc.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_rtc.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_exti.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_gpio.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_lcd.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_wwdg.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_flash.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_pwr.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_spi.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_syscfg.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_clk.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_usart.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_dac.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_wfe.c
# 4_STM8_L15x_StdPeriph_Drivers/src/stm8l15x_dma.c
)
target_include_directories(cmt2310