[Mod] 完善退出流程

This commit is contained in:
gaoyang3513
2024-08-02 19:04:30 +08:00
parent d0892c2256
commit d587362102
4 changed files with 96 additions and 5 deletions

View File

@ -61,7 +61,6 @@ int ebyte_main( void )
{ {
/* Init Systick */ /* Init Systick */
systick_config(); systick_config();
#if 0
/* <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>Դ <20><>ʼ<EFBFBD><CABC> */ /* <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>Դ <20><>ʼ<EFBFBD><CABC> */
Ebyte_BSP_Init(); Ebyte_BSP_Init();
/* (<28><>ѡ) <20><><EFBFBD><EFBFBD><EFBFBD>жϽ<D0B6><CFBD><EFBFBD>FIFO <20>ɸ<EFBFBD><C9B8><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD>д<EFBFBD><D0B4><EFBFBD> */ /* (<28><>ѡ) <20><><EFBFBD><EFBFBD><EFBFBD>жϽ<D0B6><CFBD><EFBFBD>FIFO <20>ɸ<EFBFBD><C9B8><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD>д<EFBFBD><D0B4><EFBFBD> */
@ -71,7 +70,7 @@ int ebyte_main( void )
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */ /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
Ebyte_RF.EnterReceiveMode( 0 ); Ebyte_RF.EnterReceiveMode( 0 );
/* MCU <20><>ȫ<EFBFBD><C8AB><EFBFBD>ж<EFBFBD> */ /* MCU <20><>ȫ<EFBFBD><C8AB><EFBFBD>ж<EFBFBD> */
Ebyte_BSP_GlobalIntEnable(); // Ebyte_BSP_GlobalIntEnable();
EBYTE_LOG( "Start PingPong.....\r\n" ); EBYTE_LOG( "Start PingPong.....\r\n" );
EBYTE_LOG( "Please push button1 or button2.....\r\n" ); EBYTE_LOG( "Please push button1 or button2.....\r\n" );
@ -90,7 +89,7 @@ int ebyte_main( void )
} }
Ebyte_BSP_GlobalIntDisable(); Ebyte_BSP_GlobalIntDisable();
#endif Ebyte_BSP_Deinit();
systick_deinit(); systick_deinit();
} }

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@ -23,6 +23,10 @@
#include "ebyte_port.h" #include "ebyte_port.h"
#include "ebyte_conf.h" #include "ebyte_conf.h"
#include "gd32w51x_gpio.h" #include "gd32w51x_gpio.h"
#include "gd32w51x_misc.h"
#include "gd32w51x_rcu.h"
#include "gd32w51x_spi.h"
#include "gd32w51x_timer.h"
#include "platform_def.h" #include "platform_def.h"
BSP_BTN_FIFO_t BSP_BTN_FIFO; BSP_BTN_FIFO_t BSP_BTN_FIFO;
@ -43,7 +47,6 @@ void Ebyte_BSP_HSI_Init(void)
// CLK_SYSCLKDivConfig( CLK_SYSCLKDiv_1 ); // CLK_SYSCLKDivConfig( CLK_SYSCLKDiv_1 );
} }
void Ebyte_BSP_E48xGPIO_Init(void) void Ebyte_BSP_E48xGPIO_Init(void)
{ {
rcu_periph_clock_enable(BSP_GPIO_RCU_E48_GPIO); rcu_periph_clock_enable(BSP_GPIO_RCU_E48_GPIO);
@ -54,6 +57,12 @@ void Ebyte_BSP_E48xGPIO_Init(void)
gpio_mode_set( BSP_GPIO_PORT_E48_GP4, GPIO_MODE_INPUT, GPIO_PUPD_NONE, BSP_GPIO_PIN_E48_GP4); gpio_mode_set( BSP_GPIO_PORT_E48_GP4, GPIO_MODE_INPUT, GPIO_PUPD_NONE, BSP_GPIO_PIN_E48_GP4);
gpio_mode_set( BSP_GPIO_PORT_E48_GP5, GPIO_MODE_INPUT, GPIO_PUPD_PULLUP, BSP_GPIO_PIN_E48_GP5); gpio_mode_set( BSP_GPIO_PORT_E48_GP5, GPIO_MODE_INPUT, GPIO_PUPD_PULLUP, BSP_GPIO_PIN_E48_GP5);
} }
void Ebyte_BSP_E48xGPIO_Deinit(void)
{
rcu_periph_clock_disable(BSP_GPIO_RCU_E48_GPIO);
}
/* ! /* !
* @brief <20><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO * @brief <20><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO
* *
@ -77,6 +86,23 @@ void Ebyte_BSP_GPIO_Init(void)
// GPIO_Init( BSP_GPIO_PORT_BUTTON_2, BSP_GPIO_PIN_BUTTON_2, GPIO_Mode_In_PU_No_IT ); // GPIO_Init( BSP_GPIO_PORT_BUTTON_2, BSP_GPIO_PIN_BUTTON_2, GPIO_Mode_In_PU_No_IT );
} }
/* !
* @brief <20><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO
*
* @note Ŀ<><C4BF>Ӳ<EFBFBD><D3B2>: EBYTE E15-EVB02
*/
void Ebyte_BSP_GPIO_Deinit(void)
{
/* Button */
rcu_periph_clock_disable(BSP_GPIO_RCU_E48_BUTTON);
/* LED */
rcu_periph_clock_disable(BSP_GPIO_RCU_E48_LED);
/* E48 */
Ebyte_BSP_E48xGPIO_Deinit();
}
/* ! /* !
* @brief ͨ<>Ŵ<EFBFBD><C5B4>ڳ<EFBFBD>ʼ<EFBFBD><CABC> * @brief ͨ<>Ŵ<EFBFBD><C5B4>ڳ<EFBFBD>ʼ<EFBFBD><CABC>
* *
@ -146,6 +172,21 @@ void Ebyte_BSP_SPI_Init( void )
spi_enable(BSP_RF_SPI); spi_enable(BSP_RF_SPI);
} }
/* !
* @brief <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͨ<EFBFBD><CDA8>SPI<50>ӿڳ<D3BF>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void Ebyte_BSP_SPI_Deinit( void )
{
/* SPI enable */
spi_disable(BSP_RF_SPI);
spi_i2s_deinit(BSP_RF_SPI);
spi_parameter_struct spi_init_struct;
rcu_periph_clock_disable(BSP_RF_SPI_CLOCK);
}
/* ! /* !
* @brief RFģ<46><C4A3>SPIͨ<49><CDA8><EFBFBD><EFBFBD>/<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> * @brief RFģ<46><C4A3>SPIͨ<49><CDA8><EFBFBD><EFBFBD>/<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* *
@ -210,6 +251,31 @@ void Ebyte_BSP_TIMER_Init( void )
nvic_irq_enable(TIMER2_IRQn, 0, 0); nvic_irq_enable(TIMER2_IRQn, 0, 0);
} }
/* !
* @brief <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>
*
* @note ʹ<><CAB9><EFBFBD><EFBFBD>TIM3<4D><33><EFBFBD><EFBFBD>1ms<6D><73><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
* TIM3<4D><33><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>ΪHSI 16MHz, 128<32><38>Ƶ<EFBFBD><C6B5>Ϊ 16 MHz / 128 = 125 000 Hz
* Ŀ<>궨ʱ1ms <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڼ<EFBFBD>Ϊ ( 0.001 x 125000 - 1) = 124
*/
void Ebyte_BSP_TIMER_Deinit( void )
{
nvic_irq_disable(TIMER2_IRQn);
/* enable a TIMER */
timer_disable(BSP_RF_TIMER);
/* enable the TIMER interrupt */
timer_interrupt_disable(BSP_RF_TIMER, TIMER_INT_UP);
/* clear interrupt bit */
timer_interrupt_flag_clear(BSP_RF_TIMER, TIMER_INT_FLAG_UP);
/* enable the peripherals clock */
rcu_periph_clock_disable(BSP_RF_TIMER_RCU);
/* deinit a TIMER */
timer_deinit(BSP_RF_TIMER);
}
/* ! /* !
* @brief E15-EVB02 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4>ʼ<EFBFBD><CABC> * @brief E15-EVB02 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4>ʼ<EFBFBD><CABC>
* *
@ -241,6 +307,31 @@ void Ebyte_BSP_Init( void )
Ebyte_BTN_FIFO_Init( &BSP_BTN_FIFO ); Ebyte_BTN_FIFO_Init( &BSP_BTN_FIFO );
} }
/* !
* @brief E15-EVB02 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4>ʼ<EFBFBD><CABC>
*
* @note <20>ڲ<EFBFBD>ʱ<EFBFBD><CAB1>HSI x 16MHz
* <20>û<EFBFBD>ͨ<EFBFBD>Ŵ<EFBFBD><C5B4><EFBFBD> x USART1
* <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͨ<EFBFBD>Žӿ<C5BD> x SPI1
* <20><>ʱ<EFBFBD><CAB1> x TIM3
* <20><><EFBFBD><EFBFBD> x 2
* ָʾ<D6B8><CABE> x 2
*/
void Ebyte_BSP_Deinit( void )
{
/* <20><>ʱ<EFBFBD><CAB1> <20><>ʼ<EFBFBD><CABC> */
Ebyte_BSP_TIMER_Deinit();
/* SPI<50>ӿ<EFBFBD> <20><>ʼ<EFBFBD><CABC> */
Ebyte_BSP_SPI_Deinit();
/* <20><><EFBFBD><EFBFBD> <20><>ʼ<EFBFBD><CABC> */
// Ebyte_BSP_UART_Init();
/* IO <20><>ʼ<EFBFBD><CABC> */
Ebyte_BSP_GPIO_Deinit();
}
/* ! /* !
* @brief <20><><EFBFBD><EFBFBD>LED <20><>/<2F><>/<2F><>ת * @brief <20><><EFBFBD><EFBFBD>LED <20><>/<2F><>/<2F><>ת
* *

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@ -164,6 +164,7 @@ typedef struct
extern BSP_BTN_FIFO_t BSP_BTN_FIFO; extern BSP_BTN_FIFO_t BSP_BTN_FIFO;
void Ebyte_BSP_Init( void ); void Ebyte_BSP_Init( void );
void Ebyte_BSP_Deinit( void );
void Ebyte_BTN_FIFO_Init(BSP_BTN_FIFO_t *fifo); void Ebyte_BTN_FIFO_Init(BSP_BTN_FIFO_t *fifo);
void Ebyte_BSP_DelayMs( volatile uint32_t nTime ); void Ebyte_BSP_DelayMs( volatile uint32_t nTime );
void Ebyte_BSP_TimerDecrement(void); void Ebyte_BSP_TimerDecrement(void);

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@ -75,7 +75,7 @@ static void jump_to_main_image(uint32_t msp, uint32_t reset)
img_reset = (img_fptr_t)reset; img_reset = (img_fptr_t)reset;
__disable_irq(); // __disable_irq();
#if defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8M_BASE__) #if defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8M_BASE__)
/* Restore the Main Stack Pointer Limit register's reset value /* Restore the Main Stack Pointer Limit register's reset value
* before passing execution to runtime firmware to make the * before passing execution to runtime firmware to make the