68 lines
3.1 KiB
C
68 lines
3.1 KiB
C
/*!
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\file config_gdm32.h
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\brief Configuration file for GD32W51x WiFi SDK
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\version 2021-10-30, V1.0.0, firmware for GD32W51x
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*/
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/*
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Copyright (c) 2021, GigaDevice Semiconductor Inc.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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/* REGION DEFINE */
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#define RE_FLASH_BASE_S 0x0C000000 /* !Keep unchanged! */
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#define RE_FLASH_BASE_NS 0x08000000 /* !Keep unchanged! */
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#define RE_SRAM_BASE_S 0x30000000 /* !Keep unchanged! */
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#define RE_SRAM_BASE_NS 0x20000000 /* !Keep unchanged! */
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/* SRAM LAYOUT */
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#define RE_SHARED_DATA_START 0x0200 /* !Keep unchanged! */
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#define RE_MBL_DATA_START 0x0A00 /* !Keep unchanged! */
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#define RE_PROT_DATA_START 0x0A20
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#define RE_AROT_DATA_START 0xE000
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#define RE_NSPE_DATA_START 0xE000 // 0x4B00
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/* FLASH LAYEROUT */
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#define RE_VTOR_ALIGNMENT 0x200 /* !Keep unchanged! */
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#define RE_SYS_SET_OFFSET 0x0 /* !Keep unchanged! */
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#define RE_MBL_OFFSET 0x1000 /* !Keep unchanged! */
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#define RE_SYS_STATUS_OFFSET 0x8000
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#define RE_IMG_0_PROT_OFFSET 0xA000
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#define RE_IMG_0_AROT_OFFSET 0x3A000
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#define RE_IMG_0_NSPE_OFFSET 0x3A000 // 0xA000
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#define RE_IMG_1_PROT_OFFSET 0xF0000
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#define RE_IMG_1_AROT_OFFSET 0x120000
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#define RE_IMG_1_NSPE_OFFSET 0x120000 // 0x100000
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#define RE_IMG_1_END_OFFSET 0x1D6000
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#define RE_SST_OFFSET 0x1F5000
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#define RE_AUDIT_OFFSET 0x1FF000
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/* FW_VERSION */
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#define RE_MBL_VERSION 0x01000003
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#define RE_PROT_VERSION 0x01000003
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#define RE_AROT_VERSION 0x00000003
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#define RE_NSPE_VERSION 0x01000003
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