/*!
\file readme.txt
\brief description of the TIMER2 OC inactive demo for gd32w51x
\version 2021-10-30, V1.0.0, firmware for GD32W51x
*/
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*/
This demo is based on the GD32W515P-EVAL-V1.0 board, it shows how to configure the
TIMER peripheral to generate three different signals with three different delays.
The TIMxCLK frequency is set to systemcoreclock, the prescaler is 18000, so the
TIMER1 counter clock is 10KHz.
And generate 3 signals with 3 different delays:
TIMER1_CH0 delay = 4000/10000 = 0.4s
TIMER1_CH1 delay = 8000/10000 = 0.8s
TIMER1_CH2 delay = 12000/10000 = 1.2s
So PA6 is reset after a delay equal to 0.4s, PA7 is reset after a delay equal to 0.8s,
and PB0 is reset after a delay equal to 1.2s.
While the counter is lower than the TIMER_CHxCV registers values, which determines
the output delay. When the counter value reaches the TIMER_CHxCV registers values,
the channel output compare interrupts are generated,and in the handler routine,
these LEDs are turned on as follows:
reaches the TIMER_CH0CV - LED3 on, LED2off
reaches the TIMER_CH1CV - LED3 off, LED2 on
reaches the TIMER_CH2CV - LED3 on, LED2 on
