206 lines
6.3 KiB
C
206 lines
6.3 KiB
C
/*!
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\file main.c
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\brief DMA transfer with security and non-security, non-secure code with TZEN = 1
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\version 2021-10-30, V1.0.0, firmware for GD32W51x
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*/
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/*
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Copyright (c) 2021, GigaDevice Semiconductor Inc.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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#include "gd32w51x.h"
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#include "gd32w515p_eval.h"
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#define BUFFER_SIZE 32U
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const uint32_t ns_buffer0[BUFFER_SIZE] =
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{
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0x01020304, 0x05060708, 0x090A0B0C, 0x0D0E0F10,
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0x11121314, 0x15161718, 0x191A1B1C, 0x1D1E1F20,
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0x21222324, 0x25262728, 0x292A2B2C, 0x2D2E2F30,
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0x31323334, 0x35363738, 0x393A3B3C, 0x3D3E3F40,
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0x41424344, 0x45464748, 0x494A4B4C, 0x4D4E4F50,
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0x51525354, 0x55565758, 0x595A5B5C, 0x5D5E5F60,
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0x61626364, 0x65666768, 0x696A6B6C, 0x6D6E6F70,
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0x71727374, 0x75767778, 0x797A7B7C, 0x7D7E7F80
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};
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uint32_t ns_buffer1[BUFFER_SIZE] = {0};
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uint32_t ns_buffer2[BUFFER_SIZE] = {0};
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FlagStatus ch1_complete = RESET;
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FlagStatus ch2_complete = RESET;
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FlagStatus ch3_complete = RESET;
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uint32_t check_result = 1;
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void dma1_ch1_complete(void);
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void dma1_ch2_complete(void);
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ErrStatus ns_data_check(uint32_t *src, uint32_t *des);
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ErrStatus last_data_check(void);
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void ns_dma1_config(void);
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/* led spark function */
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extern void dma1_config(dma_channel_enum channelx, uint32_t address, void *func);
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extern ErrStatus data_check(uint32_t *src, uint32_t *des);
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/*!
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\brief main function
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\param[in] none
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\param[out] none
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\retval none
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*/
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int main(void)
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{
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/* configure LED3 */
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gd_eval_led_init(LED3);
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dma1_config(DMA_CH1, (uint32_t)ns_buffer1, dma1_ch1_complete);
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/* wait until transfer complete */
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while(ch1_complete == RESET){
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}
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if(ERROR == ns_data_check((uint32_t *)ns_buffer0, ns_buffer1)){
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check_result = 0;
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}
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/* configure none secure DMA */
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ns_dma1_config();
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/* wait until transfer complete */
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while(ch3_complete == RESET){
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}
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if(ERROR == ns_data_check(ns_buffer1, ns_buffer2)){
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check_result = 0;
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}
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dma1_config(DMA_CH2, (uint32_t)ns_buffer2, dma1_ch2_complete);
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/* wait until transfer complete */
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while(ch2_complete == RESET){
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}
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if(ERROR == last_data_check()){
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check_result = 0;
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}
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if(check_result){
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gd_eval_led_on(LED3);
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}
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while(1){
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}
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}
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/*!
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\brief configure the DMA1 channel3
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\param[in] none
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\param[out] none
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\retval none
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*/
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void ns_dma1_config(void)
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{
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dma_single_data_parameter_struct dma_init_parameter;
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dma_single_data_para_struct_init(&dma_init_parameter);
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rcu_periph_clock_enable(RCU_DMA1);
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dma_deinit(DMA1, DMA_CH3);
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/* configure DMA1 channel3 */
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dma_init_parameter.periph_addr = (uint32_t)ns_buffer1;
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dma_init_parameter.periph_inc = DMA_PERIPH_INCREASE_ENABLE;
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dma_init_parameter.memory0_addr = (uint32_t)ns_buffer2;
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dma_init_parameter.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
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dma_init_parameter.periph_memory_width = DMA_PERIPH_WIDTH_32BIT;
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dma_init_parameter.circular_mode = DMA_CIRCULAR_MODE_DISABLE;
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dma_init_parameter.direction = DMA_MEMORY_TO_MEMORY;
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dma_init_parameter.number = BUFFER_SIZE;
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dma_init_parameter.priority = DMA_PRIORITY_ULTRA_HIGH;
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dma_single_data_mode_init(DMA1, DMA_CH3, &dma_init_parameter);
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/* configure security attribute */
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dma_security_config(DMA1, DMA_CH3, DMA_CHANNEL_NONSECURE | DMA_CHANNEL_SOURCE_NONSECURE | DMA_CHANNEL_DESTINATION_NONSECURE);
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/* configure DMA interrupt */
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nvic_irq_enable(DMA1_Channel3_IRQn, 0, 0);
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dma_interrupt_enable(DMA1, DMA_CH3, DMA_CHXCTL_FTFIE);
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/* enable DMA channel */
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dma_channel_enable(DMA1, DMA_CH3);
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}
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/*!
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\brief DMA1 channel1 interrupt callback function
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dma1_ch1_complete(void)
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{
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ch1_complete = SET;
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}
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/*!
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\brief DMA1 channel2 interrupt callback function
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dma1_ch2_complete(void)
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{
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ch2_complete = SET;
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}
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/*!
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\brief none secure check data
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\param[in] none
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\param[out] none
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\retval none
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*/
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ErrStatus ns_data_check(uint32_t *src, uint32_t *des)
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{
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uint32_t i = BUFFER_SIZE;
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while(i--){
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if(*src != *des){
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return ERROR;
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}
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src++;
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des++;
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}
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return SUCCESS;
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}
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/*!
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\brief this function handles DMA1_Channel3_IRQHandler interrupt
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\param[in] none
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\param[out] none
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\retval none
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*/
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void DMA1_Channel3_IRQHandler(void)
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{
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if(RESET != dma_interrupt_flag_get(DMA1, DMA_CH3, DMA_INT_FLAG_FTF)){
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dma_interrupt_flag_clear(DMA1, DMA_CH3, DMA_INT_FLAG_FTF);
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dma_interrupt_flag_clear(DMA1, DMA_CH3, DMA_INT_FLAG_HTF);
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ch3_complete = SET;
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}
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}
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