354 lines
11 KiB
C
354 lines
11 KiB
C
/*!
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\file gd32w51x_icache.c
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\brief ICACHE driver
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\version 2021-10-30, V1.0.0, firmware for GD32W51x
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*/
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/*
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Copyright (c) 2021, GigaDevice Semiconductor Inc.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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#include "gd32w51x_icache.h"
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/*!
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\brief enable icache
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\param[in] none
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\param[out] none
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\retval none
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*/
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void icache_enable(void)
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{
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if(ENABLE != (ICACHE_CTL & ICACHE_CTL_EN)){
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ICACHE_CTL |= ICACHE_CTL_EN;
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}
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}
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/*!
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\brief disable icache
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\param[in] none
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\param[out] none
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\retval none
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*/
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void icache_disable(void)
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{
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/* disable memory remap */
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icache_remap_disable(ICACHE_REMAP_REGION_0);
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icache_remap_disable(ICACHE_REMAP_REGION_1);
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icache_remap_disable(ICACHE_REMAP_REGION_2);
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icache_remap_disable(ICACHE_REMAP_REGION_3);
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/* reset and disable monitor */
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icache_monitor_reset(ICACHE_MONITOR_RESET_HIT_MISS);
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icache_monitor_disable(ICACHE_MONITOR_HIT_MISS);
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/* disable icache */
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ICACHE_CTL &= ICACHE_CTL_DEFAULT;
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}
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/*!
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\brief enable the icache monitor
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\param[in] monitor_source: the monitor to be enabled
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only one parameter can be selected which is shown as below:
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\arg ICACHE_MONITOR_HIT: hit monitor
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\arg ICACHE_MONITOR_MISS: miss monitor
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\arg ICACHE_MONITOR_HIT_MISS: hit and miss monitor
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\param[out] none
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\retval none
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*/
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void icache_monitor_enable(uint32_t monitor_source)
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{
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ICACHE_CTL |= monitor_source;
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}
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/*!
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\brief disable the icache monitor
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\param[in] monitor_source: the monitor to be disabled
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only one parameter can be selected which is shown as below:
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\arg ICACHE_MONITOR_HIT: hit monitor
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\arg ICACHE_MONITOR_MISS: miss monitor
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\arg ICACHE_MONITOR_HIT_MISS: hit and miss monitor
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\param[out] none
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\retval none
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*/
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void icache_monitor_disable(uint32_t monitor_source)
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{
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ICACHE_CTL &= ~monitor_source;
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}
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/*!
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\brief reset the icache monitor
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\param[in] reset_monitor_source: the monitor to be reset
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only one parameter can be selected which is shown as below:
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\arg ICACHE_MONITOR_RESET_HIT: hit monitor
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\arg ICACHE_MONITOR_RESET_MISS: miss monitor
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\arg ICACHE_MONITOR_RESET_HIT_MISS: hit and miss monitor
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\param[out] none
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\retval none
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*/
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void icache_monitor_reset(uint32_t reset_monitor_source)
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{
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ICACHE_CTL |= reset_monitor_source;
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ICACHE_CTL &= ~reset_monitor_source;
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}
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/*!
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\brief configure icache way (associativity mode)
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\param[in] none
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\param[out] none
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\retval ErrStatus: status of result(SUCCESS or ERROR)
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*/
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ErrStatus icache_way_configure(void)
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{
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if(ENABLE == (ICACHE_CTL & ICACHE_CTL_EN)){
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return ERROR;
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}else{
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ICACHE_CTL |= ICACHE_CTL_AMSEL;
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}
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return SUCCESS;
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}
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/*!
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\brief select icache burst type
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\param[in] burst_type: output burst type
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only one parameter can be selected which is shown as below:
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\arg ICACHE_WRAP_BURST: icache WRAP burst mode
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\arg ICACHE_INCR_BURST: icache INCR burst mode
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\param[out] none
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\retval ErrStatus: status of result(SUCCESS or ERROR)
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*/
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ErrStatus icache_burst_type_select(uint32_t burst_type)
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{
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if(ENABLE == (ICACHE_CTL & ICACHE_CTL_EN)){
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return ERROR;
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}else{
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/* select burst type */
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if (ICACHE_WRAP_BURST == burst_type){
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ICACHE_CTL &= ~ICACHE_CTL_BSTT;
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}else{
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ICACHE_CTL |= ICACHE_CTL_BSTT;
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}
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return SUCCESS;
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}
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}
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/*!
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\brief invalidate icache
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\param[in] none
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\param[out] none
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\retval ErrStatus: status of result(SUCCESS or ERROR)
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*/
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ErrStatus icache_invalidation(void)
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{
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if(ENABLE == (ICACHE_CTL & ICACHE_CTL_EN)){
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return ERROR;
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}
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icache_interrupt_flag_clear(ICACHE_ENDC_FLAG);
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/* set the invalidation */
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ICACHE_CTL |= ICACHE_CTL_INVAL;
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/* wait until the busy end */
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while (RESET == (ICACHE_STAT & ICACHE_STAT_END)){
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}
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return SUCCESS;
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}
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/*!
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\brief get the hit monitor value
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\param[in] none
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\param[out] none
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\retval hit value
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*/
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uint32_t icache_hitvalue_get(void)
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{
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return ICACHE_HMC;
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}
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/*!
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\brief get the miss monitor value
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\param[in] none
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\param[out] none
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\retval miss value
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*/
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uint32_t icache_missvalue_get(void)
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{
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return ICACHE_MMC;
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}
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/*!
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\brief enable the icache remap function
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\param[in] icache_remap_struct : structure of icache remap parameters
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\param[out] none
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\retval ErrStatus: status of result(SUCCESS or ERROR)
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*/
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ErrStatus icache_remap_enable(icache_remap_struct * icache_remap_config)
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{
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uint32_t val = 0x00U;
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uint32_t reg_val;
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/* the remap can not be configured when icache en is 1 */
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if(ENABLE == (ICACHE_CTL & ICACHE_CTL_EN)){
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return ERROR;
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}else{
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/* select the icache region */
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__IO uint32_t reg = (ICACHE + 0x20U + (0x04U * icache_remap_config->region_num));
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/* check if the region is already configured */
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if(0U != (REG32(reg) & 0x1000U)){
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return ERROR;
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}else{
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/* set the base address */
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val |= ((icache_remap_config->base_address & 0x1FFE00000U) >> 21U);
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/* set the remap address */
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val |= ((icache_remap_config->remap_address & 0xFFE00000U) >> 5U);
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/* set the remap size select the master and burst type */
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val |= ((icache_remap_config->remap_size << 9) | (icache_remap_config->master_sel << 28U) | (icache_remap_config->burst_type << 31U));
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reg_val = (REG32(reg) | val);
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REG32(reg) = reg_val;
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/* enable remap */
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reg_val = (REG32(reg) | ICACHE_CFGx_EN);
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REG32(reg) = reg_val;
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return SUCCESS;
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}
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}
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}
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/*!
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\brief disable the icache remap function
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\param[in] region_num : the remap region to be disabled
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\param[out] none
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\retval ErrStatus: status of result(SUCCESS or ERROR)
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*/
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ErrStatus icache_remap_disable(uint32_t region_num)
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{
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if(ENABLE == (ICACHE_CTL & ICACHE_CTL_EN)){
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return ERROR;
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}else{
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/* select the icache region */
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__IO uint32_t reg = REG32(ICACHE + 0x20U + (0x04U * region_num));
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reg &= ~ICACHE_CFGx_EN;
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return SUCCESS;
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}
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}
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/*!
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\brief get icache flag
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\param[in] flag: the icache flag to be get
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only one parameter can be selected which is shown as below:
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\arg ICACHE_BUSY_FLAG: icache busy flag
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\arg ICACHE_END_FLAG: icache busy end flag
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\arg ICACHE_ERR_FLAG: icache error flag
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\param[out] none
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\retval FlagStatus: status of result(SET or RESET)
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*/
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FlagStatus icache_flag_get(uint32_t flag)
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{
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__IO uint32_t reg = 0U;
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reg = ICACHE_STAT;
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/* check the status of interrupt source */
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if (RESET != (reg & flag)){
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return SET;
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}else{
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return RESET;
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}
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}
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/*!
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\brief clear icache flag
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\param[in] icache_flag: the icache flag to be cleared
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only one parameter can be selected which is shown as below:
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\arg ICACHE_ENDC_FLAG: icache busy end clear flag
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\arg ICACHE_ERRC_FLAG: icache error clear flag
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\param[out] none
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\retval none
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*/
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void icache_flag_clear(uint32_t flag)
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{
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ICACHE_FC |= flag;
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}
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/*!
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\brief enable icache interrupt
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\param[in] interrupt: the interrupt to be enabled
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only one parameter can be selected which is shown as below:
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\arg ICACHE_ENDIE: icache busy end interrupt
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\arg ICACHE_ERRIE: icache error interrupt
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\param[out] none
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\retval none
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*/
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void icache_interrupt_enable(uint32_t interrupt)
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{
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ICACHE_INTEN |= interrupt;
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}
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/*!
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\brief disable icache interrupt
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\param[in] interrupt: the interrupt to be disabled
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only one parameter can be selected which is shown as below:
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\arg ICACHE_ENDIE: icache busy end interrupt
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\arg ICACHE_ERRIE: icache error interrupt
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\param[out] none
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\retval none
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*/
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void icache_interrupt_disable(uint32_t interrupt)
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{
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ICACHE_INTEN &= ~interrupt;
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}
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/*!
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\brief get icache interrupt flag
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\param[in] interrupt: the interrupt flag to be get
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only one parameter can be selected which is shown as below:
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\arg ICACHE_END_FLAG: icache busy end interrupt flag
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\arg ICACHE_ERR_FLAG: icache error interrupt flag
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\param[out] none
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\retval FlagStatus: status of result(SET or RESET)
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*/
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FlagStatus icache_interrupt_flag_get(uint32_t interrupt)
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{
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__IO uint32_t reg = 0U;
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reg = ICACHE_STAT;
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/* check the status of interrupt source */
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if(RESET != (reg & interrupt)){
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return SET;
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}else{
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return RESET;
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}
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}
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/*!
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\brief clear icache interrupt flag
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\param[in] interrupt: the interrupt flag to be cleared
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only one parameter can be selected which is shown as below:
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\arg ICACHE_ENDC_FLAG: icache busy end interrupt clear flag
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\arg ICACHE_ERRC_FLAG: icache error interrupt clear flag
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\param[out] none
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\retval none
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*/
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void icache_interrupt_flag_clear(uint32_t interrupt)
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{
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ICACHE_FC |= interrupt;
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}
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