182 lines
6.6 KiB
C
182 lines
6.6 KiB
C
/*!
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\file main.c
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\brief transmit/receive data using DMA interrupt
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\version 2021-10-30, V1.0.0, firmware for GD32W51x
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*/
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/*
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Copyright (c) 2021, GigaDevice Semiconductor Inc.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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#include <stdio.h>
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#include "gd32w51x.h"
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#define USART2_RDATA_ADDRESS (&USART_RDATA(USART2))
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#define USART2_TDATA_ADDRESS (&USART_TDATA(USART2))
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#define ARRAYNUM(arr_nanme) (uint32_t)(sizeof(arr_nanme) / sizeof(*(arr_nanme)))
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__IO FlagStatus g_transfer_complete = RESET;
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uint8_t rxbuffer[10];
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uint8_t txbuffer[] = "\n\rUSART DMA interrupt receive and transmit example, please input 10 bytes:\n\r";
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void com_usart_init(void);
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void nvic_config(void);
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/*!
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\brief main function
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\param[in] none
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\param[out] none
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\retval none
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*/
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int main(void)
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{
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dma_single_data_parameter_struct dma_init_struct;
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/* enable DMA clock */
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rcu_periph_clock_enable(RCU_DMA0);
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/* initialize the COM */
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com_usart_init();
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/*configure DMA interrupt*/
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nvic_config();
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/* initialize DMA0 channel3 */
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dma_deinit(DMA0, DMA_CH3);
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dma_single_data_para_struct_init(&dma_init_struct);
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dma_init_struct.periph_addr = (uint32_t)USART2_TDATA_ADDRESS;
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dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
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dma_init_struct.memory0_addr = (uint32_t)txbuffer;
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dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
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dma_init_struct.periph_memory_width = DMA_MEMORY_WIDTH_8BIT;
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dma_init_struct.circular_mode = DMA_CIRCULAR_MODE_DISABLE;
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dma_init_struct.direction = DMA_MEMORY_TO_PERIPH;
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dma_init_struct.number = ARRAYNUM(txbuffer);
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dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
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dma_single_data_mode_init(DMA0, DMA_CH3, &dma_init_struct);
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/* select DMA channel peripheral */
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dma_channel_subperipheral_select(DMA0, DMA_CH3, DMA_SUBPERI4);
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/* initialize DMA0 channel1 */
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dma_deinit(DMA0, DMA_CH1);
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dma_single_data_para_struct_init(&dma_init_struct);
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dma_init_struct.periph_addr = (uint32_t)USART2_RDATA_ADDRESS;
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dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
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dma_init_struct.memory0_addr = (uint32_t)rxbuffer;
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dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
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dma_init_struct.periph_memory_width = DMA_MEMORY_WIDTH_8BIT;
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dma_init_struct.circular_mode = DMA_CIRCULAR_MODE_DISABLE;
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dma_init_struct.direction = DMA_PERIPH_TO_MEMORY;
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dma_init_struct.number = 10;
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dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
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dma_single_data_mode_init(DMA0, DMA_CH1, &dma_init_struct);
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/* select DMA channel peripheral */
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dma_channel_subperipheral_select(DMA0, DMA_CH1, DMA_SUBPERI4);
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/* USART DMA enable for reception */
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usart_dma_enable(USART2, USART_DMA_RECEIVE);
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/* enable DMA channel1 transfer complete interrupt */
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dma_interrupt_enable(DMA0, DMA_CH1, DMA_CHXCTL_FTFIE);
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/* enable DMA channel1 */
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dma_channel_enable(DMA0, DMA_CH1);
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/* USART DMA enable for transmission */
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usart_dma_enable(USART2, USART_DMA_TRANSMIT);
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/* enable DMA0 channel3 transfer complete interrupt */
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dma_interrupt_enable(DMA0, DMA_CH3, DMA_CHXCTL_FTFIE);
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/* enable DMA0 channel3 */
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dma_channel_enable(DMA0, DMA_CH3);
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/* waiting for the transfer to complete*/
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while(RESET == g_transfer_complete);
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g_transfer_complete = RESET;
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/* waiting for the transfer to complete*/
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while(RESET == g_transfer_complete);
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printf("\n\r%s\n\r", rxbuffer);
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while(1){
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}
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}
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/*!
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\brief initialize the USART configuration of the COM
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\param[in] none
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\param[out] none
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\retval none
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*/
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void com_usart_init(void)
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{
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/* enable USART clock */
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rcu_periph_clock_enable(RCU_USART2);
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/* enable COM GPIO clock */
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rcu_periph_clock_enable(RCU_GPIOB);
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/* connect port to USARTx_Tx */
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gpio_af_set(GPIOB, GPIO_AF_7, GPIO_PIN_10);
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/* connect port to USARTx_Rx */
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gpio_af_set(GPIOB, GPIO_AF_7, GPIO_PIN_11);
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/* configure USART Tx as alternate function push-pull */
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gpio_mode_set(GPIOB, GPIO_MODE_AF, GPIO_PUPD_PULLUP, GPIO_PIN_10);
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gpio_output_options_set(GPIOB, GPIO_OTYPE_PP, GPIO_OSPEED_10MHZ, GPIO_PIN_10);
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/* configure USART Rx as alternate function push-pull */
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gpio_mode_set(GPIOB, GPIO_MODE_AF, GPIO_PUPD_PULLUP, GPIO_PIN_11);
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gpio_output_options_set(GPIOB, GPIO_OTYPE_PP, GPIO_OSPEED_10MHZ, GPIO_PIN_11);
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/* USART configure */
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usart_deinit(USART2);
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usart_baudrate_set(USART2, 115200U);
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usart_receive_config(USART2, USART_RECEIVE_ENABLE);
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usart_transmit_config(USART2, USART_TRANSMIT_ENABLE);
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usart_enable(USART2);
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}
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/*!
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\brief configure DMA interrupt
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\param[in] none
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\param[out] none
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\retval none
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*/
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void nvic_config(void)
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{
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nvic_irq_enable(DMA0_Channel3_IRQn, 0, 0);
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nvic_irq_enable(DMA0_Channel1_IRQn, 0, 1);
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}
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/* retarget the C library printf function to the USART */
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int fputc(int ch, FILE *f)
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{
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usart_data_transmit(USART2, (uint8_t)ch);
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while(RESET == usart_flag_get(USART2, USART_FLAG_TBE));
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return ch;
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}
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