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@ -0,0 +1,66 @@
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// HCS12 Core erasing + unsecuring command file:
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// These commands mass erase the chip then program the security byte to 0xFE (unsecured state).
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// Evaluate the clock divider to set in ECLKDIV/FCLKDIV registers:
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// An average programming clock of 175 kHz is chosen.
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// If the oscillator frequency is less than 10 MHz, the value to store
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// in ECLKDIV/FCLKDIV is equal to " oscillator frequency (kHz) / 175 ".
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// If the oscillator frequency is higher than 10 MHz, the value to store
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// in ECLKDIV/FCLKDIV is equal to " oscillator frequency (kHz) / 1400 + 0x40 (to set PRDIV8 flag)".
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// Datasheet proposed values:
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//
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// oscillator frequency ECLKDIV/FCLKDIV value (hexadecimal)
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//
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// 16 MHz $49
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// 8 MHz $27
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// 4 MHz $13
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// 2 MHz $9
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// 1 MHz $4
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define CLKDIV 0x49
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FLASH MEMUNMAP // do not interact with regular flash programming monitor
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//mass erase flash
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wb 0x100 CLKDIV // set FCLKDIV clock divider
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wb 0x103 0 // FCFNG select block 0
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wb 0x102 0x10 // set the WRALL bit in FTSTMOD to affect all blocks
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wb 0x104 0xFF // FPROT all protection disabled
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wb 0x105 0x30 // clear PVIOL and ACCERR in FSTAT register
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ww 0x108 0xD000 // write to FADDR address register
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ww 0x10A 0x0000 // write to FDATA data register
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wb 0x106 0x41 // write MASS ERASE command in FCMD register
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wb 0x105 0x80 // clear CBEIF in FSTAT register to execute the command
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wait 20 // wait for command to complete
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//mass erase eeprom
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wb 0x110 CLKDIV // set ECLKDV clock divider
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wb 0x114 0xFF // EPROT all protection disabled
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wb 0x115 0x30 // clear PVIOL and ACCERR in ESTAT register
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ww 0x118 0x0400 // write to EADDR eeprom address register
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ww 0x11A 0x0000 // write to EDATA eeprom data register
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wb 0x116 0x41 // write MASS ERASE command in ECMD register
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wb 0x115 0x80 // clear CBEIF in ESTAT register to execute the command
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wait 20 // wait for command to complete
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reset
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//reprogram Security byte to Unsecure state
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wb 0x100 CLKDIV // set FCLKDIV clock divider
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wb 0x103 0 // FCFNG select block 0
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wb 0x104 0xFF // FPROT all protection disabled
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wb 0x105 0x30 // clear PVIOL and ACCERR in FSTAT register
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ww 0xFF0E 0xFFFE // write security byte to "Unsecured" state
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wb 0x106 0x20 // write MEMORY PROGRAM command in FCMD register
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wb 0x105 0x80 // clear CBEIF in FSTAT register to execute the command
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wait 20 // wait for command to complete
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reset
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FLASH MEMMAP // restore regular flash programming monitor
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undef CLKDIV // undefine variable
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