[修改] 增加freeRTOS
1. 版本FreeRTOSv202212.01，命名为kernel；
This commit is contained in:
622
kernel/FreeRTOS/Source/portable/GCC/RX700v3_DPFPU/port.c
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622
kernel/FreeRTOS/Source/portable/GCC/RX700v3_DPFPU/port.c
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/*
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* FreeRTOS Kernel V10.5.1
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* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the RXv3 DPFPU port.
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*----------------------------------------------------------*/
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#warning Testing for DFPU support in this port is not yet complete
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Library includes. */
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#include "string.h"
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/* Hardware specifics. */
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#if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
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#include "platform.h"
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#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
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#include "iodefine.h"
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#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
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/*-----------------------------------------------------------*/
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/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
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* PSW is set with U and I set, and PM and IPL clear. */
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#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
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#define portINITIAL_FPSW ( ( StackType_t ) 0x00000100 )
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#define portINITIAL_DPSW ( ( StackType_t ) 0x00000100 )
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#define portINITIAL_DCMR ( ( StackType_t ) 0x00000000 )
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#define portINITIAL_DECNT ( ( StackType_t ) 0x00000001 )
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/* Tasks are not created with a DPFPU context, but can be given a DPFPU context
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* after they have been created. A variable is stored as part of the tasks context
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* that holds portNO_DPFPU_CONTEXT if the task does not have a DPFPU context, or
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* any other value if the task does have a DPFPU context. */
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#define portNO_DPFPU_CONTEXT ( ( StackType_t ) 0 )
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#define portHAS_DPFPU_CONTEXT ( ( StackType_t ) 1 )
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/* The space on the stack required to hold the DPFPU data registers. This is 16
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* 64-bit registers. */
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#define portDPFPU_DATA_REGISTER_WORDS ( 16 * 2 )
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/* These macros allow a critical section to be added around the call to
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* xTaskIncrementTick(), which is only ever called from interrupts at the kernel
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* priority - ie a known priority. Therefore these local macros are a slight
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* optimisation compared to calling the global SET/CLEAR_INTERRUPT_MASK macros,
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* which would require the old IPL to be read first and stored in a local variable. */
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#define portMASK_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0" ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
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#define portUNMASK_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0" ::"i" ( configKERNEL_INTERRUPT_PRIORITY ) )
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/*-----------------------------------------------------------*/
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/*
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* Function to start the first task executing - written in asm code as direct
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* access to registers is required.
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*/
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static void prvStartFirstTask( void ) __attribute__( ( naked ) );
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/*
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* Software interrupt handler. Performs the actual context switch (saving and
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* restoring of registers). Written in asm code as direct register access is
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* required.
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*/
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#if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
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R_BSP_PRAGMA_INTERRUPT( vSoftwareInterruptISR, VECT( ICU, SWINT ) )
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R_BSP_ATTRIB_INTERRUPT void vSoftwareInterruptISR( void ) __attribute__( ( naked ) );
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#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
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void vSoftwareInterruptISR( void ) __attribute__( ( naked ) );
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#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
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/*
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* The tick ISR handler. The peripheral used is configured by the application
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* via a hook/callback function.
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*/
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#if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
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R_BSP_PRAGMA_INTERRUPT( vTickISR, _VECT( configTICK_VECTOR ) )
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R_BSP_ATTRIB_INTERRUPT void vTickISR( void ); /* Do not add __attribute__( ( interrupt ) ). */
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#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
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void vTickISR( void ) __attribute__( ( interrupt ) );
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#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
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/*-----------------------------------------------------------*/
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/* Saved as part of the task context. If ulPortTaskHasDPFPUContext is non-zero
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* then a DPFPU context must be saved and restored for the task. */
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#if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
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StackType_t ulPortTaskHasDPFPUContext = portNO_DPFPU_CONTEXT;
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#endif /* configUSE_TASK_DPFPU_SUPPORT */
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/* This is accessed by the inline assembler functions so is file scope for
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* convenience. */
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extern void * pxCurrentTCB;
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extern void vTaskSwitchContext( void );
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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TaskFunction_t pxCode,
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void * pvParameters )
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{
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/* R0 is not included as it is the stack pointer. */
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*pxTopOfStack = 0x00;
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_PSW;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) pxCode;
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/* When debugging it can be useful if every register is set to a known
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* value. Otherwise code space can be saved by just setting the registers
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* that need to be set. */
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#ifdef USE_FULL_REGISTER_INITIALISATION
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{
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pxTopOfStack--;
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*pxTopOfStack = 0xffffffff; /* r15. */
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pxTopOfStack--;
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*pxTopOfStack = 0xeeeeeeee;
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pxTopOfStack--;
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*pxTopOfStack = 0xdddddddd;
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pxTopOfStack--;
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*pxTopOfStack = 0xcccccccc;
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pxTopOfStack--;
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*pxTopOfStack = 0xbbbbbbbb;
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pxTopOfStack--;
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*pxTopOfStack = 0xaaaaaaaa;
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pxTopOfStack--;
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*pxTopOfStack = 0x99999999;
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pxTopOfStack--;
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*pxTopOfStack = 0x88888888;
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pxTopOfStack--;
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*pxTopOfStack = 0x77777777;
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pxTopOfStack--;
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*pxTopOfStack = 0x66666666;
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pxTopOfStack--;
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*pxTopOfStack = 0x55555555;
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pxTopOfStack--;
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*pxTopOfStack = 0x44444444;
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pxTopOfStack--;
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*pxTopOfStack = 0x33333333;
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pxTopOfStack--;
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*pxTopOfStack = 0x22222222;
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pxTopOfStack--;
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}
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#else /* ifdef USE_FULL_REGISTER_INITIALISATION */
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{
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pxTopOfStack -= 15;
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}
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#endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
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*pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_FPSW;
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pxTopOfStack--;
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*pxTopOfStack = 0x11111111; /* Accumulator 1. */
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pxTopOfStack--;
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*pxTopOfStack = 0x22222222; /* Accumulator 1. */
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pxTopOfStack--;
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*pxTopOfStack = 0x33333333; /* Accumulator 1. */
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pxTopOfStack--;
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*pxTopOfStack = 0x44444444; /* Accumulator 0. */
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pxTopOfStack--;
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*pxTopOfStack = 0x55555555; /* Accumulator 0. */
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pxTopOfStack--;
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*pxTopOfStack = 0x66666666; /* Accumulator 0. */
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#if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
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{
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/* The task will start without a DPFPU context. A task that
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* uses the DPFPU hardware must call vPortTaskUsesDPFPU() before
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* executing any floating point instructions. */
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pxTopOfStack--;
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*pxTopOfStack = portNO_DPFPU_CONTEXT;
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}
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#elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
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{
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/* The task will start with a DPFPU context. Leave enough
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* space for the registers - and ensure they are initialised if desired. */
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#ifdef USE_FULL_REGISTER_INITIALISATION
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{
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pxTopOfStack -= 2;
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*(double *)pxTopOfStack = 1515.1515; /* DR15. */
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pxTopOfStack -= 2;
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*(double *)pxTopOfStack = 1414.1414; /* DR14. */
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pxTopOfStack -= 2;
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*(double *)pxTopOfStack = 1313.1313; /* DR13. */
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pxTopOfStack -= 2;
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*(double *)pxTopOfStack = 1212.1212; /* DR12. */
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pxTopOfStack -= 2;
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*(double *)pxTopOfStack = 1111.1111; /* DR11. */
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pxTopOfStack -= 2;
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*(double *)pxTopOfStack = 1010.1010; /* DR10. */
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pxTopOfStack -= 2;
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*(double *)pxTopOfStack = 909.0909; /* DR9. */
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pxTopOfStack -= 2;
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*(double *)pxTopOfStack = 808.0808; /* DR8. */
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pxTopOfStack -= 2;
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*(double *)pxTopOfStack = 707.0707; /* DR7. */
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pxTopOfStack -= 2;
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*(double *)pxTopOfStack = 606.0606; /* DR6. */
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pxTopOfStack -= 2;
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*(double *)pxTopOfStack = 505.0505; /* DR5. */
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pxTopOfStack -= 2;
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*(double *)pxTopOfStack = 404.0404; /* DR4. */
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pxTopOfStack -= 2;
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*(double *)pxTopOfStack = 303.0303; /* DR3. */
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pxTopOfStack -= 2;
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*(double *)pxTopOfStack = 202.0202; /* DR2. */
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pxTopOfStack -= 2;
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*(double *)pxTopOfStack = 101.0101; /* DR1. */
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pxTopOfStack -= 2;
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*(double *)pxTopOfStack = 9876.54321;/* DR0. */
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}
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#else /* ifdef USE_FULL_REGISTER_INITIALISATION */
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{
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pxTopOfStack -= portDPFPU_DATA_REGISTER_WORDS;
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memset( pxTopOfStack, 0x00, portDPFPU_DATA_REGISTER_WORDS * sizeof( StackType_t ) );
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}
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#endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_DECNT; /* DECNT. */
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_DCMR; /* DCMR. */
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_DPSW; /* DPSW. */
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}
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#elif ( configUSE_TASK_DPFPU_SUPPORT == 0 )
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{
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/* Omit DPFPU support. */
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}
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#else /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
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{
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#error Invalid configUSE_TASK_DPFPU_SUPPORT setting - configUSE_TASK_DPFPU_SUPPORT must be set to 0, 1, 2, or left undefined.
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}
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#endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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#if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
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void vPortTaskUsesDPFPU( void )
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{
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/* A task is registering the fact that it needs a DPFPU context. Set the
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* DPFPU flag (which is saved as part of the task context). */
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ulPortTaskHasDPFPUContext = portHAS_DPFPU_CONTEXT;
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}
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#endif /* configUSE_TASK_DPFPU_SUPPORT */
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/*-----------------------------------------------------------*/
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BaseType_t xPortStartScheduler( void )
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{
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extern void vApplicationSetupTimerInterrupt( void );
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/* Use pxCurrentTCB just so it does not get optimised away. */
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if( pxCurrentTCB != NULL )
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{
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/* Call an application function to set up the timer that will generate the
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* tick interrupt. This way the application can decide which peripheral to
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* use. A demo application is provided to show a suitable example. */
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vApplicationSetupTimerInterrupt();
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/* Enable the software interrupt. */
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_IEN( _ICU_SWINT ) = 1;
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/* Ensure the software interrupt is clear. */
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_IR( _ICU_SWINT ) = 0;
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/* Ensure the software interrupt is set to the kernel priority. */
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_IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
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/* Start the first task. */
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prvStartFirstTask();
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}
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/* Should not get here. */
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return pdFAIL;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* Not implemented in ports where there is nothing to return to.
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* Artificially force an assert. */
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configASSERT( pxCurrentTCB == NULL );
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}
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/*-----------------------------------------------------------*/
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static void prvStartFirstTask( void )
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{
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__asm volatile
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(
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/* When starting the scheduler there is nothing that needs moving to the
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* interrupt stack because the function is not called from an interrupt.
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* Just ensure the current stack is the user stack. */
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"SETPSW U \n"\
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/* Obtain the location of the stack associated with which ever task
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* pxCurrentTCB is currently pointing to. */
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"MOV.L #_pxCurrentTCB, R15 \n"\
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"MOV.L [R15], R15 \n"\
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"MOV.L [R15], R0 \n"\
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/* Restore the registers from the stack of the task pointed to by
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* pxCurrentTCB. */
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#if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
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/* The restored ulPortTaskHasDPFPUContext is to be zero here.
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* So, it is never necessary to restore the DPFPU context here. */
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"POP R15 \n"\
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"MOV.L #_ulPortTaskHasDPFPUContext, R14 \n"\
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"MOV.L R15, [R14] \n"\
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#elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
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/* Restore the DPFPU context. */
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"DPOPM.L DPSW-DECNT \n"\
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"DPOPM.D DR0-DR15 \n"\
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#endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
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"POP R15 \n"\
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/* Accumulator low 32 bits. */
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"MVTACLO R15, A0 \n"\
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"POP R15 \n"\
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/* Accumulator high 32 bits. */
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"MVTACHI R15, A0 \n"\
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"POP R15 \n"\
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/* Accumulator guard. */
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"MVTACGU R15, A0 \n"\
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"POP R15 \n"\
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/* Accumulator low 32 bits. */
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"MVTACLO R15, A1 \n"\
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"POP R15 \n"\
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/* Accumulator high 32 bits. */
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"MVTACHI R15, A1 \n"\
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"POP R15 \n"\
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/* Accumulator guard. */
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"MVTACGU R15, A1 \n"\
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"POP R15 \n"\
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|
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/* Floating point status word. */
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"MVTC R15, FPSW \n"\
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/* R1 to R15 - R0 is not included as it is the SP. */
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"POPM R1-R15 \n"\
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/* This pops the remaining registers. */
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"RTE \n"\
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"NOP \n"\
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"NOP \n"
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);
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}
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||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vSoftwareInterruptISR( void )
|
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{
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__asm volatile
|
||||
(
|
||||
/* Re-enable interrupts. */
|
||||
"SETPSW I \n"\
|
||||
|
||||
|
||||
/* Move the data that was automatically pushed onto the interrupt stack when
|
||||
* the interrupt occurred from the interrupt stack to the user stack.
|
||||
*
|
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* R15 is saved before it is clobbered. */
|
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"PUSH.L R15 \n"\
|
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|
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/* Read the user stack pointer. */
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"MVFC USP, R15 \n"\
|
||||
|
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/* Move the address down to the data being moved. */
|
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"SUB #12, R15 \n"\
|
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"MVTC R15, USP \n"\
|
||||
|
||||
/* Copy the data across, R15, then PC, then PSW. */
|
||||
"MOV.L [ R0 ], [ R15 ] \n"\
|
||||
"MOV.L 4[ R0 ], 4[ R15 ] \n"\
|
||||
"MOV.L 8[ R0 ], 8[ R15 ] \n"\
|
||||
|
||||
/* Move the interrupt stack pointer to its new correct position. */
|
||||
"ADD #12, R0 \n"\
|
||||
|
||||
/* All the rest of the registers are saved directly to the user stack. */
|
||||
"SETPSW U \n"\
|
||||
|
||||
/* Save the rest of the general registers (R15 has been saved already). */
|
||||
"PUSHM R1-R14 \n"\
|
||||
|
||||
/* Save the FPSW and accumulators. */
|
||||
"MVFC FPSW, R15 \n"\
|
||||
"PUSH.L R15 \n"\
|
||||
"MVFACGU #0, A1, R15 \n"\
|
||||
"PUSH.L R15 \n"\
|
||||
"MVFACHI #0, A1, R15 \n"\
|
||||
"PUSH.L R15 \n"\
|
||||
"MVFACLO #0, A1, R15 \n" /* Low order word. */ \
|
||||
"PUSH.L R15 \n"\
|
||||
"MVFACGU #0, A0, R15 \n"\
|
||||
"PUSH.L R15 \n"\
|
||||
"MVFACHI #0, A0, R15 \n"\
|
||||
"PUSH.L R15 \n"\
|
||||
"MVFACLO #0, A0, R15 \n" /* Low order word. */ \
|
||||
"PUSH.L R15 \n"\
|
||||
|
||||
#if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
|
||||
|
||||
/* Does the task have a DPFPU context that needs saving? If
|
||||
* ulPortTaskHasDPFPUContext is 0 then no. */
|
||||
"MOV.L #_ulPortTaskHasDPFPUContext, R15 \n"\
|
||||
"MOV.L [R15], R15 \n"\
|
||||
"CMP #0, R15 \n"\
|
||||
|
||||
/* Save the DPFPU context, if any. */
|
||||
"BEQ.B ?+ \n"\
|
||||
"DPUSHM.D DR0-DR15 \n"\
|
||||
"DPUSHM.L DPSW-DECNT \n"\
|
||||
"?: \n"\
|
||||
|
||||
/* Save ulPortTaskHasDPFPUContext itself. */
|
||||
"PUSH.L R15 \n"\
|
||||
|
||||
#elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
|
||||
|
||||
/* Save the DPFPU context, always. */
|
||||
"DPUSHM.D DR0-DR15 \n"\
|
||||
"DPUSHM.L DPSW-DECNT \n"\
|
||||
|
||||
#endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
|
||||
|
||||
|
||||
/* Save the stack pointer to the TCB. */
|
||||
"MOV.L #_pxCurrentTCB, R15 \n"\
|
||||
"MOV.L [ R15 ], R15 \n"\
|
||||
"MOV.L R0, [ R15 ] \n"\
|
||||
|
||||
|
||||
/* Ensure the interrupt mask is set to the syscall priority while the kernel
|
||||
* structures are being accessed. */
|
||||
"MVTIPL %0 \n"\
|
||||
|
||||
/* Select the next task to run. */
|
||||
"BSR.A _vTaskSwitchContext \n"\
|
||||
|
||||
/* Reset the interrupt mask as no more data structure access is required. */
|
||||
"MVTIPL %1 \n"\
|
||||
|
||||
|
||||
/* Load the stack pointer of the task that is now selected as the Running
|
||||
* state task from its TCB. */
|
||||
"MOV.L #_pxCurrentTCB,R15 \n"\
|
||||
"MOV.L [ R15 ], R15 \n"\
|
||||
"MOV.L [ R15 ], R0 \n"\
|
||||
|
||||
|
||||
/* Restore the context of the new task. The PSW (Program Status Word) and
|
||||
* PC will be popped by the RTE instruction. */
|
||||
|
||||
#if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
|
||||
|
||||
/* Is there a DPFPU context to restore? If the restored
|
||||
* ulPortTaskHasDPFPUContext is zero then no. */
|
||||
"POP R15 \n"\
|
||||
"MOV.L #_ulPortTaskHasDPFPUContext, R14 \n"\
|
||||
"MOV.L R15, [R14] \n"\
|
||||
"CMP #0, R15 \n"\
|
||||
|
||||
/* Restore the DPFPU context, if any. */
|
||||
"BEQ.B ?+ \n"\
|
||||
"DPOPM.L DPSW-DECNT \n"\
|
||||
"DPOPM.D DR0-DR15 \n"\
|
||||
"?: \n"\
|
||||
|
||||
#elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
|
||||
|
||||
/* Restore the DPFPU context, always. */
|
||||
"DPOPM.L DPSW-DECNT \n"\
|
||||
"DPOPM.D DR0-DR15 \n"\
|
||||
|
||||
#endif /* if( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
|
||||
|
||||
"POP R15 \n"\
|
||||
|
||||
/* Accumulator low 32 bits. */
|
||||
"MVTACLO R15, A0 \n"\
|
||||
"POP R15 \n"\
|
||||
|
||||
/* Accumulator high 32 bits. */
|
||||
"MVTACHI R15, A0 \n"\
|
||||
"POP R15 \n"\
|
||||
|
||||
/* Accumulator guard. */
|
||||
"MVTACGU R15, A0 \n"\
|
||||
"POP R15 \n"\
|
||||
|
||||
/* Accumulator low 32 bits. */
|
||||
"MVTACLO R15, A1 \n"\
|
||||
"POP R15 \n"\
|
||||
|
||||
/* Accumulator high 32 bits. */
|
||||
"MVTACHI R15, A1 \n"\
|
||||
"POP R15 \n"\
|
||||
|
||||
/* Accumulator guard. */
|
||||
"MVTACGU R15, A1 \n"\
|
||||
"POP R15 \n"\
|
||||
"MVTC R15, FPSW \n"\
|
||||
"POPM R1-R15 \n"\
|
||||
"RTE \n"\
|
||||
"NOP \n"\
|
||||
"NOP "
|
||||
::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ), "i" ( configKERNEL_INTERRUPT_PRIORITY )
|
||||
);
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vTickISR( void )
|
||||
{
|
||||
/* Re-enabled interrupts. */
|
||||
__asm volatile ( "SETPSW I");
|
||||
|
||||
/* Increment the tick, and perform any processing the new tick value
|
||||
* necessitates. Ensure IPL is at the max syscall value first. */
|
||||
portMASK_INTERRUPTS_FROM_KERNEL_ISR();
|
||||
{
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
taskYIELD();
|
||||
}
|
||||
}
|
||||
portUNMASK_INTERRUPTS_FROM_KERNEL_ISR();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
uint32_t ulPortGetIPL( void )
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
"MVFC PSW, R1 \n"\
|
||||
"SHLR #24, R1 \n"\
|
||||
"RTS "
|
||||
);
|
||||
|
||||
/* This will never get executed, but keeps the compiler from complaining. */
|
||||
return 0;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortSetIPL( uint32_t ulNewIPL )
|
||||
{
|
||||
/* Avoid compiler warning about unreferenced parameter. */
|
||||
( void ) ulNewIPL;
|
||||
|
||||
__asm volatile
|
||||
(
|
||||
"PUSH R5 \n"\
|
||||
"MVFC PSW, R5 \n"\
|
||||
"SHLL #24, R1 \n"\
|
||||
"AND #-0F000001H, R5 \n"\
|
||||
"OR R1, R5 \n"\
|
||||
"MVTC R5, PSW \n"\
|
||||
"POP R5 \n"\
|
||||
"RTS "
|
||||
);
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
187
kernel/FreeRTOS/Source/portable/GCC/RX700v3_DPFPU/portmacro.h
Normal file
187
kernel/FreeRTOS/Source/portable/GCC/RX700v3_DPFPU/portmacro.h
Normal file
@ -0,0 +1,187 @@
|
||||
/*
|
||||
* FreeRTOS Kernel V10.5.1
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
*
|
||||
* The settings in this file configure FreeRTOS correctly for the
|
||||
* given hardware and compiler.
|
||||
*
|
||||
* These settings should not be altered.
|
||||
*-----------------------------------------------------------
|
||||
*/
|
||||
|
||||
/* When the FIT configurator or the Smart Configurator is used, platform.h has to be
|
||||
* used. */
|
||||
#ifndef configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H
|
||||
#define configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H 0
|
||||
#endif
|
||||
|
||||
/* If configUSE_TASK_DPFPU_SUPPORT is set to 1 (or undefined) then each task will
|
||||
* be created without a DPFPU context, and a task must call vTaskUsesDPFPU() before
|
||||
* making use of any DPFPU registers. If configUSE_TASK_DPFPU_SUPPORT is set to 2 then
|
||||
* tasks are created with a DPFPU context by default, and calling vTaskUsesDPFPU() has
|
||||
* no effect. If configUSE_TASK_DPFPU_SUPPORT is set to 0 then tasks never take care
|
||||
* of any DPFPU context (even if DPFPU registers are used). */
|
||||
#ifndef configUSE_TASK_DPFPU_SUPPORT
|
||||
#define configUSE_TASK_DPFPU_SUPPORT 1
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Type definitions - these are a bit legacy and not really used now, other than
|
||||
* portSTACK_TYPE and portBASE_TYPE. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
#if ( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
* not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Hardware specifics. */
|
||||
#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */
|
||||
#define portSTACK_GROWTH -1
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portNOP() __asm volatile ( "NOP" )
|
||||
|
||||
/* Yield equivalent to "*portITU_SWINTR = 0x01; ( void ) *portITU_SWINTR;"
|
||||
* where portITU_SWINTR is the location of the software interrupt register
|
||||
* (0x000872E0). Don't rely on the assembler to select a register, so instead
|
||||
* save and restore clobbered registers manually. */
|
||||
#define portYIELD() \
|
||||
__asm volatile \
|
||||
( \
|
||||
"PUSH.L R10 \n"\
|
||||
"MOV.L #0x872E0, R10 \n"\
|
||||
"MOV.B #0x1, [R10] \n"\
|
||||
"CMP [R10].UB, R10 \n"\
|
||||
"POP R10 \n"\
|
||||
:::"cc" \
|
||||
)
|
||||
|
||||
#define portYIELD_FROM_ISR( x ) do { if( ( x ) != pdFALSE ) portYIELD(); } while( 0 )
|
||||
|
||||
/* Workaround to reduce errors/warnings caused by e2 studio CDT's INDEXER and CODAN. */
|
||||
#ifdef __CDT_PARSER__
|
||||
#ifndef __asm
|
||||
#define __asm asm
|
||||
#endif
|
||||
#ifndef __attribute__
|
||||
#define __attribute__( ... )
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* These macros should not be called directly, but through the
|
||||
* taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
|
||||
* performed if configASSERT() is defined to ensure an assertion handler does not
|
||||
* inadvertently attempt to lower the IPL when the call to assert was triggered
|
||||
* because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
* when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
|
||||
* functions are those that end in FromISR. FreeRTOS maintains a separate
|
||||
* interrupt API to ensure API function and interrupt entry is as fast and as
|
||||
* simple as possible. */
|
||||
#define portENABLE_INTERRUPTS() __asm volatile ( "MVTIPL #0")
|
||||
#ifdef configASSERT
|
||||
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( ulPortGetIPL() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
|
||||
#define portDISABLE_INTERRUPTS() if( ulPortGetIPL() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) __asm volatile ( "MVTIPL %0"::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
|
||||
#else
|
||||
#define portDISABLE_INTERRUPTS() __asm volatile ( "MVTIPL %0"::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
|
||||
#endif
|
||||
|
||||
/* Critical nesting counts are stored in the TCB. */
|
||||
#define portCRITICAL_NESTING_IN_TCB ( 1 )
|
||||
|
||||
/* The critical nesting functions defined within tasks.c. */
|
||||
extern void vTaskEnterCritical( void );
|
||||
extern void vTaskExitCritical( void );
|
||||
#define portENTER_CRITICAL() vTaskEnterCritical()
|
||||
#define portEXIT_CRITICAL() vTaskExitCritical()
|
||||
|
||||
/* As this port allows interrupt nesting... */
|
||||
uint32_t ulPortGetIPL( void ) __attribute__( ( naked ) );
|
||||
void vPortSetIPL( uint32_t ulNewIPL ) __attribute__( ( naked ) );
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortGetIPL(); portDISABLE_INTERRUPTS()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) vPortSetIPL( uxSavedInterruptStatus )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* If configUSE_TASK_DPFPU_SUPPORT is set to 1 (or left undefined) then tasks are
|
||||
* created without a DPFPU context and must call vPortTaskUsesDPFPU() to give
|
||||
* themselves a DPFPU context before using any DPFPU instructions. If
|
||||
* configUSE_TASK_DPFPU_SUPPORT is set to 2 then all tasks will have a DPFPU context
|
||||
* by default. */
|
||||
#if( configUSE_TASK_DPFPU_SUPPORT == 1 )
|
||||
void vPortTaskUsesDPFPU( void );
|
||||
#else
|
||||
/* Each task has a DPFPU context already, so define this function away to
|
||||
* nothing to prevent it being called accidentally. */
|
||||
#define vPortTaskUsesDPFPU()
|
||||
#endif
|
||||
#define portTASK_USES_DPFPU() vPortTaskUsesDPFPU()
|
||||
|
||||
/* Definition to allow compatibility with existing FreeRTOS Demo using flop.c. */
|
||||
#define portTASK_USES_FLOATING_POINT() vPortTaskUsesDPFPU()
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
72
kernel/FreeRTOS/Source/portable/GCC/RX700v3_DPFPU/readme.txt
Normal file
72
kernel/FreeRTOS/Source/portable/GCC/RX700v3_DPFPU/readme.txt
Normal file
@ -0,0 +1,72 @@
|
||||
The following table shows which port is recommended to be used.
|
||||
|
||||
|
||||
RX MCU Group CPU FPU FPU Port Layer
|
||||
Core (Single (Double CC-RX GNURX ICCRX (*6)
|
||||
Type Precision) Precision)
|
||||
|
||||
RX110 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
|
||||
RX111 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
|
||||
RX113 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
|
||||
RX130 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
|
||||
RX13T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600
|
||||
|
||||
RX210 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3)
|
||||
RX21A RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3)
|
||||
RX220 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3)
|
||||
RX230,RX231 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2
|
||||
RX23E-A RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2
|
||||
RX23W RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2
|
||||
RX23T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2
|
||||
RX24T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2
|
||||
RX24U RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2
|
||||
|
||||
RX610 RXv1 Yes --- N/A (*4) N/A (*4) N/A (*4)
|
||||
RX62N,RX621 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600
|
||||
RX630 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600
|
||||
RX634 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600
|
||||
RX63N,RX631 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600
|
||||
RX64M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2
|
||||
RX65N,RX651 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2
|
||||
RX66N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU
|
||||
RX62T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600
|
||||
RX62G RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600
|
||||
RX63T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600
|
||||
RX66T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5)
|
||||
|
||||
RX71M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2
|
||||
RX72M RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU
|
||||
RX72N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU
|
||||
RX72T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5)
|
||||
|
||||
Notes:
|
||||
|
||||
*1: If the application writer wants to use their own tick interrupt configuration when tickless idle
|
||||
functionality is not used, please define configSETUP_TICK_INTERRUPT() (in FreeRTOSConfig.h) and provide
|
||||
the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems to be
|
||||
configured to use any CMTn according to the definition of configTICK_VECTOR (in FreeRTOSConfig.h).
|
||||
|
||||
*2: If the application writer wants to use their own tick interrupt configuration when tickless idle
|
||||
functionality is used, please modify port.c for the configuration. Please be aware that port.c is
|
||||
hard coded to use CMT0 though it seems to be configured to use any CMTn according to the definition of
|
||||
configTICK_VECTOR (in FreeRTOSConfig.h).
|
||||
|
||||
*3: RX100 ports are also available.
|
||||
|
||||
*4: RX600 ports use MVTIPL instruction but RX610 MCUs don't support this instruction.
|
||||
|
||||
*5: RX700v3_DPFPU ports are also available with the following definition in FreeRTOSConfig.h.
|
||||
|
||||
#define configUSE_TASK_DPFPU_SUPPORT 0
|
||||
|
||||
*6: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port.
|
||||
It contains two definitions of interrupt priority like the following.
|
||||
|
||||
#define configKERNEL_INTERRUPT_PRIORITY 1
|
||||
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4
|
||||
|
||||
|
||||
For more information about Renesas RX MCUs, please visit the following URL:
|
||||
|
||||
https://www.renesas.com/products/microcontrollers-microprocessors/rx.html
|
||||
|
||||
Reference in New Issue
Block a user