[修改] 增加freeRTOS
1. 版本FreeRTOSv202212.01,命名为kernel;
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/*
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* Trace Recorder for Tracealyzer v4.6.0
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* Copyright 2021 Percepio AB
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* www.percepio.com
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Main configuration parameters for the trace recorder library.
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* More settings can be found in trcStreamingConfig.h and trcSnapshotConfig.h.
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*/
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#ifndef TRC_CONFIG_H
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#define TRC_CONFIG_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/******************************************************************************
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* Include of processor header file
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*
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* Here you may need to include the header file for your processor. This is
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* required at least for the ARM Cortex-M port, that uses the ARM CMSIS API.
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* Try that in case of build problems. Otherwise, remove the #error line below.
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*****************************************************************************/
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#error "Trace Recorder: Please include your processor's header file here and remove this line."
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/**
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* @def TRC_CFG_HARDWARE_PORT
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* @brief Specify what hardware port to use (i.e., the "timestamping driver").
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*
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* All ARM Cortex-M MCUs are supported by "TRC_HARDWARE_PORT_ARM_Cortex_M".
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* This port uses the DWT cycle counter for Cortex-M3/M4/M7 devices, which is
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* available on most such devices. In case your device don't have DWT support,
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* you will get an error message opening the trace. In that case, you may
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* force the recorder to use SysTick timestamping instead, using this define:
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*
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* #define TRC_CFG_ARM_CM_USE_SYSTICK
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*
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* For ARM Cortex-M0/M0+ devices, SysTick mode is used automatically.
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*
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* See trcHardwarePort.h for available ports and information on how to
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* define your own port, if not already present.
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*/
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#define TRC_CFG_HARDWARE_PORT TRC_HARDWARE_PORT_NOT_SET
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/**
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* @def TRC_CFG_SCHEDULING_ONLY
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* @brief Macro which should be defined as an integer value.
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*
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* If this setting is enabled (= 1), only scheduling events are recorded.
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* If disabled (= 0), all events are recorded (unless filtered in other ways).
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*
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* Default value is 0 (= include additional events).
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*/
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#define TRC_CFG_SCHEDULING_ONLY 0
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/**
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* @def TRC_CFG_INCLUDE_MEMMANG_EVENTS
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* @brief Macro which should be defined as either zero (0) or one (1).
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*
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* This controls if malloc and free calls should be traced. Set this to zero (0)
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* to exclude malloc/free calls, or one (1) to include such events in the trace.
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*
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* Default value is 1.
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*/
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#define TRC_CFG_INCLUDE_MEMMANG_EVENTS 1
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/**
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* @def TRC_CFG_INCLUDE_USER_EVENTS
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* @brief Macro which should be defined as either zero (0) or one (1).
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*
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* If this is zero (0), all code related to User Events is excluded in order
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* to reduce code size. Any attempts of storing User Events are then silently
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* ignored.
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*
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* User Events are application-generated events, like "printf" but for the
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* trace log, generated using vTracePrint and vTracePrintF.
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* The formatting is done on host-side, by Tracealyzer. User Events are
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* therefore much faster than a console printf and can often be used
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* in timing critical code without problems.
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*
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* Note: In streaming mode, User Events are used to provide error messages
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* and warnings from the recorder (in case of incorrect configuration) for
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* display in Tracealyzer. Disabling user events will also disable these
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* warnings. You can however still catch them by calling xTraceErrorGetLast
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* or by putting breakpoints in xTraceError and xTraceWarning.
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*
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* Default value is 1.
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*/
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#define TRC_CFG_INCLUDE_USER_EVENTS 1
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/**
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* @def TRC_CFG_INCLUDE_ISR_TRACING
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* @brief Macro which should be defined as either zero (0) or one (1).
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*
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* If this is zero (0), the code for recording Interrupt Service Routines is
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* excluded, in order to reduce code size. This means that any calls to
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* vTraceStoreISRBegin/vTraceStoreISREnd will be ignored.
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* This does not completely disable ISR tracing, in cases where an ISR is
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* calling a traced kernel service. These events will still be recorded and
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* show up in anonymous ISR instances in Tracealyzer, with names such as
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* "ISR sending to <queue name>".
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* To disable such tracing, please refer to vTraceSetFilterGroup and
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* vTraceSetFilterMask.
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*
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* Default value is 1.
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*
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* Note: tracing ISRs requires that you insert calls to vTraceStoreISRBegin
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* and vTraceStoreISREnd in your interrupt handlers.
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*/
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#define TRC_CFG_INCLUDE_ISR_TRACING 1
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/**
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* @def TRC_CFG_INCLUDE_READY_EVENTS
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* @brief Macro which should be defined as either zero (0) or one (1).
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*
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* If one (1), events are recorded when tasks enter scheduling state "ready".
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* This allows Tracealyzer to show the initial pending time before tasks enter
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* the execution state, and present accurate response times.
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* If zero (0), "ready events" are not created, which allows for recording
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* longer traces in the same amount of RAM.
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*
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* Default value is 1.
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*/
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#define TRC_CFG_INCLUDE_READY_EVENTS 1
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/**
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* @def TRC_CFG_INCLUDE_OSTICK_EVENTS
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* @brief Macro which should be defined as either zero (0) or one (1).
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*
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* If this is one (1), events will be generated whenever the OS clock is
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* increased. If zero (0), OS tick events are not generated, which allows for
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* recording longer traces in the same amount of RAM.
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*
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* Default value is 1.
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*/
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#define TRC_CFG_INCLUDE_OSTICK_EVENTS 1
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/**
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* @def TRC_CFG_ENABLE_STACK_MONITOR
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* @brief If enabled (1), the recorder periodically reports the unused stack space of
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* all active tasks.
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* The stack monitoring runs in the Tracealyzer Control task, TzCtrl. This task
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* is always created by the recorder when in streaming mode.
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* In snapshot mode, the TzCtrl task is only used for stack monitoring and is
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* not created unless this is enabled.
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*/
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#define TRC_CFG_ENABLE_STACK_MONITOR 1
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/**
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* @def TRC_CFG_STACK_MONITOR_MAX_TASKS
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* @brief Macro which should be defined as a non-zero integer value.
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*
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* This controls how many tasks that can be monitored by the stack monitor.
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* If this is too small, some tasks will be excluded and a warning is shown.
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*
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* Default value is 10.
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*/
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#define TRC_CFG_STACK_MONITOR_MAX_TASKS 10
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/**
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* @def TRC_CFG_STACK_MONITOR_MAX_REPORTS
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* @brief Macro which should be defined as a non-zero integer value.
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*
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* This defines how many tasks that will be subject to stack usage analysis for
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* each execution of the Tracealyzer Control task (TzCtrl). Note that the stack
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* monitoring cycles between the tasks, so this does not affect WHICH tasks that
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* are monitored, but HOW OFTEN each task stack is analyzed.
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*
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* This setting can be combined with TRC_CFG_CTRL_TASK_DELAY to tune the
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* frequency of the stack monitoring. This is motivated since the stack analysis
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* can take some time to execute.
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* However, note that the stack analysis runs in a separate task (TzCtrl) that
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* can be executed on low priority. This way, you can avoid that the stack
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* analysis disturbs any time-sensitive tasks.
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*
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* Default value is 1.
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*/
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#define TRC_CFG_STACK_MONITOR_MAX_REPORTS 1
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/**
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* @def TRC_CFG_CTRL_TASK_PRIORITY
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* @brief The scheduling priority of the Tracealyzer Control (TzCtrl) task.
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*
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* In streaming mode, TzCtrl is used to receive start/stop commands from
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* Tracealyzer and in some cases also to transmit the trace data (for stream
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* ports that uses the internal buffer, like TCP/IP). For such stream ports,
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* make sure the TzCtrl priority is high enough to ensure reliable periodic
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* execution and transfer of the data, but low enough to avoid disturbing any
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* time-sensitive functions.
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*
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* In Snapshot mode, TzCtrl is only used for the stack usage monitoring and is
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* not created if stack monitoring is disabled. TRC_CFG_CTRL_TASK_PRIORITY should
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* be low, to avoid disturbing any time-sensitive tasks.
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*/
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#define TRC_CFG_CTRL_TASK_PRIORITY 1
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/**
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* @def TRC_CFG_CTRL_TASK_DELAY
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* @brief The delay between loops of the TzCtrl task (see TRC_CFG_CTRL_TASK_PRIORITY),
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* which affects the frequency of the stack monitoring.
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*
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* In streaming mode, this also affects the trace data transfer if you are using
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* a stream port leveraging the internal buffer (like TCP/IP). A shorter delay
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* increases the CPU load of TzCtrl somewhat, but may improve the performance of
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* of the trace streaming, especially if the trace buffer is small.
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*/
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#define TRC_CFG_CTRL_TASK_DELAY 2
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/**
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* @def TRC_CFG_CTRL_TASK_STACK_SIZE
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* @brief The stack size of the Tracealyzer Control (TzCtrl) task.
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* See TRC_CFG_CTRL_TASK_PRIORITY for further information about TzCtrl.
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*/
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#define TRC_CFG_CTRL_TASK_STACK_SIZE 1024
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/**
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* @def TRC_CFG_RECORDER_BUFFER_ALLOCATION
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* @brief Specifies how the recorder buffer is allocated (also in case of streaming, in
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* port using the recorder's internal temporary buffer)
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*
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* Values:
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* TRC_RECORDER_BUFFER_ALLOCATION_STATIC - Static allocation (internal)
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* TRC_RECORDER_BUFFER_ALLOCATION_DYNAMIC - Malloc in vTraceEnable
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* TRC_RECORDER_BUFFER_ALLOCATION_CUSTOM - Use vTraceSetRecorderDataBuffer
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*
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* Static and dynamic mode does the allocation for you, either in compile time
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* (static) or in runtime (malloc).
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* The custom mode allows you to control how and where the allocation is made,
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* for details see TRC_ALLOC_CUSTOM_BUFFER and vTraceSetRecorderDataBuffer().
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*/
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#define TRC_CFG_RECORDER_BUFFER_ALLOCATION TRC_RECORDER_BUFFER_ALLOCATION_STATIC
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/**
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* @def TRC_CFG_MAX_ISR_NESTING
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* @brief Defines how many levels of interrupt nesting the recorder can handle, in
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* case multiple ISRs are traced and ISR nesting is possible. If this
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* is exceeded, the particular ISR will not be traced and the recorder then
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* logs an error message. This setting is used to allocate an internal stack
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* for keeping track of the previous execution context (4 byte per entry).
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*
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* This value must be a non-zero positive constant, at least 1.
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*
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* Default value: 8
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*/
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#define TRC_CFG_MAX_ISR_NESTING 8
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/**
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* @def TRC_CFG_ISR_TAILCHAINING_THRESHOLD
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* @brief Macro which should be defined as an integer value.
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*
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* If tracing multiple ISRs, this setting allows for accurate display of the
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* context-switching also in cases when the ISRs execute in direct sequence.
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*
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* vTraceStoreISREnd normally assumes that the ISR returns to the previous
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* context, i.e., a task or a preempted ISR. But if another traced ISR
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* executes in direct sequence, Tracealyzer may incorrectly display a minimal
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* fragment of the previous context in between the ISRs.
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*
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* By using TRC_CFG_ISR_TAILCHAINING_THRESHOLD you can avoid this. This is
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* however a threshold value that must be measured for your specific setup.
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* See http://percepio.com/2014/03/21/isr_tailchaining_threshold/
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*
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* The default setting is 0, meaning "disabled" and that you may get an
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* extra fragments of the previous context in between tail-chained ISRs.
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*
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* Note: This setting has separate definitions in trcSnapshotConfig.h and
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* trcStreamingConfig.h, since it is affected by the recorder mode.
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*/
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#define TRC_CFG_ISR_TAILCHAINING_THRESHOLD 0
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/**
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* @def TRC_CFG_RECORDER_DATA_INIT
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* @brief Macro which states wether the recorder data should have an initial value.
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*
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* In very specific cases where traced objects are created before main(),
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* the recorder will need to be started even before that. In these cases,
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* the recorder data would be initialized by vTraceEnable(TRC_INIT) but could
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* then later be overwritten by the initialization value.
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* If this is an issue for you, set TRC_CFG_RECORDER_DATA_INIT to 0.
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* The following code can then be used before any traced objects are created:
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*
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* extern uint32_t RecorderEnabled;
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* RecorderEnabled = 0;
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* xTraceInitialize();
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*
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* After the clocks are properly initialized, use vTraceEnable(...) to start
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* the tracing.
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*
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* Default value is 1.
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*/
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#define TRC_CFG_RECORDER_DATA_INIT 1
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/**
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* @def TRC_CFG_RECORDER_DATA_ATTRIBUTE
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* @brief When setting TRC_CFG_RECORDER_DATA_INIT to 0, you might also need to make
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* sure certain recorder data is placed in a specific RAM section to avoid being
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* zeroed out after initialization. Define TRC_CFG_RECORDER_DATA_ATTRIBUTE as
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* that attribute.
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*
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* Example:
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* #define TRC_CFG_RECORDER_DATA_ATTRIBUTE __attribute__((section(".bss.trace_recorder_data")))
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*
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* Default value is empty.
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*/
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#define TRC_CFG_RECORDER_DATA_ATTRIBUTE
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/**
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* @def TRC_CFG_USE_TRACE_ASSERT
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* @brief Enable or disable debug asserts. Information regarding any assert that is
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* triggered will be in trcAssert.c.
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*/
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#define TRC_CFG_USE_TRACE_ASSERT 0
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#ifdef __cplusplus
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}
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#endif
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#endif /* _TRC_CONFIG_H */
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