[修改] 增加freeRTOS
1. 版本FreeRTOSv202212.01,命名为kernel;
This commit is contained in:
43
kernel/FreeRTOS-Plus/ThirdParty/wolfSSL/mqx/wolfssl_client/Debugger/K70FN1M0.mem
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43
kernel/FreeRTOS-Plus/ThirdParty/wolfSSL/mqx/wolfssl_client/Debugger/K70FN1M0.mem
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// Memory Configuration File
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//
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// Description:
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// A memory configuration file contains commands that define the legally accessible
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// areas of memory for your specific board. Useful for example when the debugger
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// tries to display the content of a "char *" variable, that has not yet been initialized.
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// In this case the debugger may try to read from a bogus address, which could cause a
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// bus error.
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//
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// Board:
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// Kinetis K70FN1M0
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//
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// Reference:
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// -
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// All reserved ranges read back 0xBABA...
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reservedchar 0xBA
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usederivative "MK70F15"
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// Memory Map:
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// ----------------------------------------------------------------------
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range 0x00000000 0x000FFFFF 4 ReadWrite // 1024KB Code Flash
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reserved 0x00100000 0x13FFFFFF
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range 0x14000000 0x14003FFF 4 ReadWrite // 16KB Programming acceleration RAM
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reserved 0x14004000 0x1FFEFFFF
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range 0x1FFF0000 0x1FFFFFFF 4 ReadWrite // 64KB On chip SRAM (TCML)
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range 0x20000000 0x2000FFFF 4 ReadWrite // 64KB On chip SRAM (TCMU)
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reserved 0x20010000 0x21FFFFFF
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range 0x22000000 0x221FFFFF 4 ReadWrite // Aliased to TCMU SRAM bitband
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reserved 0x22200000 0x3FFFFFFF
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reserved 0x60000000 0x6FFFFFFF // Flexbus for external memory
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range 0x70000000 0x7FFFFFFF 4 ReadWrite // DRAM Controller - Write-back
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range 0x80000000 0x8FFFFFFF 4 ReadWrite // DRAM Controller - Write-through
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reserved 0x90000000 0xDFFFFFFF // Flexbus for external memory
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reserved 0xE0100000 0xFFFFFFFF
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// Comment the following line for NFC-projects
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reserved 0x400A8000 0x400ABEFF
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// Uncomment the following line for NFC-projects
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//range 0x400A8000 0x400ABEFF 4 ReadWrite
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71
kernel/FreeRTOS-Plus/ThirdParty/wolfSSL/mqx/wolfssl_client/Debugger/init_kinetis.tcl
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Executable file
71
kernel/FreeRTOS-Plus/ThirdParty/wolfSSL/mqx/wolfssl_client/Debugger/init_kinetis.tcl
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# this method initializes debug modules which are not affected by software reset
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# register names should be referenced including the register group name to improve performance
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proc init_debug_modules {} {
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# initialize LR to avoid invalid stack after reset
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reg "User\\/System Mode Registers/LR" = 0xFFFFFFFF
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# clear DWT function registers
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reg "Core Debug Registers/DEMCR" = 0x1000001
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reg "Data Watchpoint and Trace Unit Registers/DWT_FUNCTION0" = 0x0
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reg "Data Watchpoint and Trace Unit Registers/DWT_FUNCTION1" = 0x0
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reg "Data Watchpoint and Trace Unit Registers/DWT_FUNCTION2" = 0x0
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reg "Data Watchpoint and Trace Unit Registers/DWT_FUNCTION3" = 0x0
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# clear FPB comparators
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reg "Flash Patch and Breakpoint Unit Registers/FP_COMP0" = 0x0
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reg "Flash Patch and Breakpoint Unit Registers/FP_COMP1" = 0x0
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reg "Flash Patch and Breakpoint Unit Registers/FP_COMP2" = 0x0
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reg "Flash Patch and Breakpoint Unit Registers/FP_COMP3" = 0x0
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reg "Flash Patch and Breakpoint Unit Registers/FP_COMP4" = 0x0
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reg "Flash Patch and Breakpoint Unit Registers/FP_COMP5" = 0x0
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}
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proc init_trace_modules {} {
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# clear DWT registers
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reg "Data Watchpoint and Trace Unit Registers/DWT_CTRL" =0x40000000
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reg "Data Watchpoint and Trace Unit Registers/DWT_CYCCNT" =0x0
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reg "Data Watchpoint and Trace Unit Registers/DWT_CPICNT" =0x0
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reg "Data Watchpoint and Trace Unit Registers/DWT_EXCCNT" =0x0
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reg "Data Watchpoint and Trace Unit Registers/DWT_SLEEPCNT" =0x0
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reg "Data Watchpoint and Trace Unit Registers/DWT_LSUCNT" =0x0
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reg "Data Watchpoint and Trace Unit Registers/DWT_FOLDCNT" =0x0
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reg "Data Watchpoint and Trace Unit Registers/DWT_COMP0" =0x0
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reg "Data Watchpoint and Trace Unit Registers/DWT_COMP1" =0x0
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reg "Data Watchpoint and Trace Unit Registers/DWT_COMP2" =0x0
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reg "Data Watchpoint and Trace Unit Registers/DWT_COMP3" =0x0
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reg "Data Watchpoint and Trace Unit Registers/DWT_MASK0" =0x0
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reg "Data Watchpoint and Trace Unit Registers/DWT_MASK1" =0x0
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reg "Data Watchpoint and Trace Unit Registers/DWT_MASK2" =0x0
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reg "Data Watchpoint and Trace Unit Registers/DWT_MASK3" =0x0
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# clear ITM registers
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reg "Instrumentation Trace Macrocell Registers/ITM_LAR" =0xc5acce55
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reg "Instrumentation Trace Macrocell Registers/ITM_TER" =0x0
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reg "Instrumentation Trace Macrocell Registers/ITM_TPR" =0x0
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reg "Instrumentation Trace Macrocell Registers/ITM_TCR" =0x0
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reg "Instrumentation Trace Macrocell Registers/ITM_LAR" =0x1
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# reset Funnel registers
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reg "Embedded Trace Funnel Registers/ETF_FCR" =0x300
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# clear MCM registers
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reg "Core Platform Miscellaneous Control Module (MCM) Registers/MCM_ETBCC" =0x0
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reg "Core Platform Miscellaneous Control Module (MCM) Registers/MCM_ETBRL" =0x0
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# set SCB_VTOR register for RAM
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reg "System Control Registers/SCB_VTOR" =0x20000000
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}
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proc envsetup {} {
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# Environment Setup
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radix x
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config hexprefix 0x
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config MemIdentifier p
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config MemWidth 32
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config MemAccess 32
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config MemSwap off
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}
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#-------------------------------------------------------------------------------
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# Main
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#-------------------------------------------------------------------------------
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envsetup
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init_debug_modules
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init_trace_modules
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31
kernel/FreeRTOS-Plus/ThirdParty/wolfSSL/mqx/wolfssl_client/Debugger/mass_erase_kinetis.tcl
vendored
Executable file
31
kernel/FreeRTOS-Plus/ThirdParty/wolfSSL/mqx/wolfssl_client/Debugger/mass_erase_kinetis.tcl
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# This script performs the mass erase operation for Kinetis targets
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# Command mass erase with system reset and core reset
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set mdmapControl [cmdwin::reg MDMAP_C -np]
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set mdmapControl [expr $mdmapControl | 0x19]
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cmdwin::reg MDMAP_C = $mdmapControl
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# Release system reset while still holding core reset
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set mdmapControl [expr $mdmapControl & 0xFFFFFFF7]
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cmdwin::reg MDMAP_C = $mdmapControl
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# Wait for the mass erase operation to complete
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set done 0
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for {set i 0} {$i < 10} {incr i} {
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refresh
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set mdmapControl [cmdwin::reg MDMAP_C -np]
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if {($mdmapControl & 1) == 0} {
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set done 1
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break;
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}
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wait 50
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}
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# Release the core reset
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set mdmapControl [expr $mdmapControl & 0xFFFFFFEF]
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cmdwin::reg MDMAP_C = $mdmapControl
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if {$done} {
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puts "OK: Mass erase succeeded"
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} else {
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puts "Error: Timeout"
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}
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