[修改] 增加freeRTOS

1. 版本FreeRTOSv202212.01,命名为kernel;
This commit is contained in:
2023-05-06 16:43:01 +00:00
commit a345df017b
20944 changed files with 11094377 additions and 0 deletions

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// Memory Configuration File
//
// Description:
// A memory configuration file contains commands that define the legally accessible
// areas of memory for your specific board. Useful for example when the debugger
// tries to display the content of a "char *" variable, that has not yet been initialized.
// In this case the debugger may try to read from a bogus address, which could cause a
// bus error.
//
// Board:
// Kinetis K70FN1M0
//
// Reference:
// -
// All reserved ranges read back 0xBABA...
reservedchar 0xBA
usederivative "MK70F15"
// Memory Map:
// ----------------------------------------------------------------------
range 0x00000000 0x000FFFFF 4 ReadWrite // 1024KB Code Flash
reserved 0x00100000 0x13FFFFFF
range 0x14000000 0x14003FFF 4 ReadWrite // 16KB Programming acceleration RAM
reserved 0x14004000 0x1FFEFFFF
range 0x1FFF0000 0x1FFFFFFF 4 ReadWrite // 64KB On chip SRAM (TCML)
range 0x20000000 0x2000FFFF 4 ReadWrite // 64KB On chip SRAM (TCMU)
reserved 0x20010000 0x21FFFFFF
range 0x22000000 0x221FFFFF 4 ReadWrite // Aliased to TCMU SRAM bitband
reserved 0x22200000 0x3FFFFFFF
reserved 0x60000000 0x6FFFFFFF // Flexbus for external memory
range 0x70000000 0x7FFFFFFF 4 ReadWrite // DRAM Controller - Write-back
range 0x80000000 0x8FFFFFFF 4 ReadWrite // DRAM Controller - Write-through
reserved 0x90000000 0xDFFFFFFF // Flexbus for external memory
reserved 0xE0100000 0xFFFFFFFF
// Comment the following line for NFC-projects
reserved 0x400A8000 0x400ABEFF
// Uncomment the following line for NFC-projects
//range 0x400A8000 0x400ABEFF 4 ReadWrite

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# this method initializes debug modules which are not affected by software reset
# register names should be referenced including the register group name to improve performance
proc init_debug_modules {} {
# initialize LR to avoid invalid stack after reset
reg "User\\/System Mode Registers/LR" = 0xFFFFFFFF
# clear DWT function registers
reg "Core Debug Registers/DEMCR" = 0x1000001
reg "Data Watchpoint and Trace Unit Registers/DWT_FUNCTION0" = 0x0
reg "Data Watchpoint and Trace Unit Registers/DWT_FUNCTION1" = 0x0
reg "Data Watchpoint and Trace Unit Registers/DWT_FUNCTION2" = 0x0
reg "Data Watchpoint and Trace Unit Registers/DWT_FUNCTION3" = 0x0
# clear FPB comparators
reg "Flash Patch and Breakpoint Unit Registers/FP_COMP0" = 0x0
reg "Flash Patch and Breakpoint Unit Registers/FP_COMP1" = 0x0
reg "Flash Patch and Breakpoint Unit Registers/FP_COMP2" = 0x0
reg "Flash Patch and Breakpoint Unit Registers/FP_COMP3" = 0x0
reg "Flash Patch and Breakpoint Unit Registers/FP_COMP4" = 0x0
reg "Flash Patch and Breakpoint Unit Registers/FP_COMP5" = 0x0
}
proc init_trace_modules {} {
# clear DWT registers
reg "Data Watchpoint and Trace Unit Registers/DWT_CTRL" =0x40000000
reg "Data Watchpoint and Trace Unit Registers/DWT_CYCCNT" =0x0
reg "Data Watchpoint and Trace Unit Registers/DWT_CPICNT" =0x0
reg "Data Watchpoint and Trace Unit Registers/DWT_EXCCNT" =0x0
reg "Data Watchpoint and Trace Unit Registers/DWT_SLEEPCNT" =0x0
reg "Data Watchpoint and Trace Unit Registers/DWT_LSUCNT" =0x0
reg "Data Watchpoint and Trace Unit Registers/DWT_FOLDCNT" =0x0
reg "Data Watchpoint and Trace Unit Registers/DWT_COMP0" =0x0
reg "Data Watchpoint and Trace Unit Registers/DWT_COMP1" =0x0
reg "Data Watchpoint and Trace Unit Registers/DWT_COMP2" =0x0
reg "Data Watchpoint and Trace Unit Registers/DWT_COMP3" =0x0
reg "Data Watchpoint and Trace Unit Registers/DWT_MASK0" =0x0
reg "Data Watchpoint and Trace Unit Registers/DWT_MASK1" =0x0
reg "Data Watchpoint and Trace Unit Registers/DWT_MASK2" =0x0
reg "Data Watchpoint and Trace Unit Registers/DWT_MASK3" =0x0
# clear ITM registers
reg "Instrumentation Trace Macrocell Registers/ITM_LAR" =0xc5acce55
reg "Instrumentation Trace Macrocell Registers/ITM_TER" =0x0
reg "Instrumentation Trace Macrocell Registers/ITM_TPR" =0x0
reg "Instrumentation Trace Macrocell Registers/ITM_TCR" =0x0
reg "Instrumentation Trace Macrocell Registers/ITM_LAR" =0x1
# reset Funnel registers
reg "Embedded Trace Funnel Registers/ETF_FCR" =0x300
# clear MCM registers
reg "Core Platform Miscellaneous Control Module (MCM) Registers/MCM_ETBCC" =0x0
reg "Core Platform Miscellaneous Control Module (MCM) Registers/MCM_ETBRL" =0x0
# set SCB_VTOR register for RAM
reg "System Control Registers/SCB_VTOR" =0x20000000
}
proc envsetup {} {
# Environment Setup
radix x
config hexprefix 0x
config MemIdentifier p
config MemWidth 32
config MemAccess 32
config MemSwap off
}
#-------------------------------------------------------------------------------
# Main
#-------------------------------------------------------------------------------
envsetup
init_debug_modules
init_trace_modules

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# This script performs the mass erase operation for Kinetis targets
# Command mass erase with system reset and core reset
set mdmapControl [cmdwin::reg MDMAP_C -np]
set mdmapControl [expr $mdmapControl | 0x19]
cmdwin::reg MDMAP_C = $mdmapControl
# Release system reset while still holding core reset
set mdmapControl [expr $mdmapControl & 0xFFFFFFF7]
cmdwin::reg MDMAP_C = $mdmapControl
# Wait for the mass erase operation to complete
set done 0
for {set i 0} {$i < 10} {incr i} {
refresh
set mdmapControl [cmdwin::reg MDMAP_C -np]
if {($mdmapControl & 1) == 0} {
set done 1
break;
}
wait 50
}
# Release the core reset
set mdmapControl [expr $mdmapControl & 0xFFFFFFEF]
cmdwin::reg MDMAP_C = $mdmapControl
if {$done} {
puts "OK: Mass erase succeeded"
} else {
puts "Error: Timeout"
}