5 Commits

Author	SHA1	Message	Date
Rahul Pathak	a2429d7c9d	lib: sbi_illegal_insn: Fix FENCE.TSO emulation infinite trap loop ... In case of missing "FENCE.TSO" instruction implementation, opensbi can emulate the "FENCE.TSO" with "FENCE RW,RW", but mepc was not incremented to continue from the next instruction causing infinite trap. Fixes: cb8271c8 ("lib: sbi_illegal_insn: Add emulation for fence.tso") Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Xiang W <wxjstz@126.com> Reviewed-by: Samuel Holland <samuel@sholland.org>	2024-04-09 14:22:01 +08:00
Samuel Holland	d009644b1c	lib: sbi_illegal_insn: Add emulation for fence.tso ... While OpenC906 appears to properly decode `fence.tso` as a fence instruction[1], the version of the C906 taped out in the Allwinner D1 does not, and raises illegal instruction. Handle this errata by emulating `fence.tso` as `fence rw, rw`. [1]: https://github.com/T-head-Semi/openc906/blob/30827e7f/C906_RTL_FACTORY/gen_rtl/idu/rtl/aq_idu_id_decd.v#L2097 Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Anup Patel <anup@brainfault.org>	2024-04-09 14:21:28 +08:00
yue-xiaomin	3dad3aa6f0	fix fsbl and opensbi serial ports print baud --form https://community.milkv.io/t/set-the-baud-rate-to-115200-before-uboot/959	2023-12-24 15:13:30 +08:00
sam.xiang	2e8190643f	[opensbi] porting: adapt to CV180X / CV181X ... Change-Id: Id7b3c64d203eb2c9af6c66f195bf0d8a05f0164c	2023-03-10 20:30:36 +08:00
sam.xiang	93f81bd490	[opensbi] create opensbi from T-Head official: ... repo: https://github.com/T-head-Semi/opensbi commit: 89182b257c8798e15e4c685c1af0c2862d528d2a Change-Id: I7b39d66729e0108661a6f4c9e28acbdb303684ea	2023-03-10 20:30:16 +08:00