e38fbf739c
repo: https://github.com/buildroot/buildroot/tree/2021.05 commit: 69f79f2a2ee1417e19c1ead2c9226e11753c06cb Update for 2021.05 Change-Id: I77d6d14da04483c97cb172bf6732732012e538d9
31 lines
590 B
Plaintext
31 lines
590 B
Plaintext
#
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# Configure the GCC_TARGET_ARCH variable and append the
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# appropriate RISC-V ISA extensions.
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#
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ifeq ($(BR2_riscv),y)
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ifeq ($(BR2_RISCV_64),y)
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GCC_TARGET_ARCH := rv64i
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else
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GCC_TARGET_ARCH := rv32i
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endif
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ifeq ($(BR2_RISCV_ISA_RVM),y)
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GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)m
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endif
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ifeq ($(BR2_RISCV_ISA_RVA),y)
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GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)a
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endif
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ifeq ($(BR2_RISCV_ISA_RVF),y)
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GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)f
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endif
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ifeq ($(BR2_RISCV_ISA_RVD),y)
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GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)d
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endif
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ifeq ($(BR2_RISCV_ISA_RVC),y)
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GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)c
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endif
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endif
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