607778300c
1. add cv181x functions 2. Delete some useless files and add .gitignore Change-Id: Iea2b2fa43b5a1152e5e99fb32b88f8d2c249251a
100 lines
3.1 KiB
C
100 lines
3.1 KiB
C
/*
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* Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved.
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*
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*/
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#include <common.h>
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#include <clk.h>
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#include <asm/gpio.h>
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//#include <asm/hardware.h>
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#include <asm/io.h>
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//#include <dm/uclass-internal.h>
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#include <linux/kernel.h>
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#include "reg.h"
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#include "vip_common.h"
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#include "scaler.h"
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#include "dsi_phy.h"
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#include <cvi_lvds.h>
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static void _fill_disp_timing(struct sclr_disp_timing *timing, struct sync_info_s *sync_info)
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{
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timing->vtotal = sync_info->vid_vsa_lines + sync_info->vid_vbp_lines
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+ sync_info->vid_active_lines + sync_info->vid_vfp_lines - 1;
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timing->htotal = sync_info->vid_hsa_pixels + sync_info->vid_hbp_pixels
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+ sync_info->vid_hline_pixels + sync_info->vid_hfp_pixels - 1;
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timing->vsync_start = 1;
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timing->vsync_end = timing->vsync_start + sync_info->vid_vsa_lines - 1;
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timing->vfde_start = timing->vsync_start + sync_info->vid_vsa_lines + sync_info->vid_vbp_lines;
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timing->vfde_end = timing->vfde_start + sync_info->vid_active_lines - 1;
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timing->hsync_start = 1;
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timing->hsync_end = timing->hsync_start + sync_info->vid_hsa_pixels - 1;
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timing->hfde_start = timing->hsync_start + sync_info->vid_hsa_pixels + sync_info->vid_hbp_pixels;
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timing->hfde_end = timing->hfde_start + sync_info->vid_hline_pixels - 1;
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timing->vsync_pol = sync_info->vid_vsa_pos_polarity;
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timing->hsync_pol = sync_info->vid_hsa_pos_polarity;
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timing->vmde_start = timing->vfde_start;
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timing->vmde_end = timing->vfde_end;
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timing->hmde_start = timing->hfde_start;
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timing->hmde_end = timing->hfde_end;
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}
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int lvds_init(struct cvi_lvds_cfg_s *lvds_cfg)
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{
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union sclr_lvdstx lvds_reg;
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bool data_en[LANE_MAX_NUM] = {false, false, false, false, false};
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struct sclr_disp_timing timing;
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struct disp_ctrl_gpios ctrl_gpios;
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int i = 0, ret = 0;
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for (i = 0; i < LANE_MAX_NUM; i++) {
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if (lvds_cfg->lane_id[i] < 0 || lvds_cfg->lane_id[i] >= LANE_MAX_NUM) {
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dphy_dsi_set_lane(i, VO_LVDS_LANE_MAX, false, false);
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continue;
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}
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dphy_dsi_set_lane(i, lvds_cfg->lane_id[i], lvds_cfg->lane_pn_swap[i], false);
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if (lvds_cfg->lane_id[i] != VO_LVDS_LANE_CLK) {
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data_en[lvds_cfg->lane_id[i] - 1] = true;
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}
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}
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dphy_dsi_lane_en(true, data_en, false);
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sclr_disp_set_intf(SCLR_VO_INTF_LVDS);
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lvds_reg.b.out_bit = lvds_cfg->out_bits;
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lvds_reg.b.vesa_mode = lvds_cfg->mode;
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if (lvds_cfg->chn_num == 1)
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lvds_reg.b.dual_ch = 0;
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else if (lvds_cfg->chn_num == 2)
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lvds_reg.b.dual_ch = 1;
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else {
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lvds_reg.b.dual_ch = 0;
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printf("invalid lvds chn_num(%d). Use 1 instead.", lvds_cfg->chn_num);
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}
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lvds_reg.b.vs_out_en = 1;
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lvds_reg.b.hs_out_en = 1;
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lvds_reg.b.hs_blk_en = 1;
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lvds_reg.b.ml_swap = 1;
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lvds_reg.b.ctrl_rev = 0;
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lvds_reg.b.oe_swap = 0;
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lvds_reg.b.en = 1;
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dphy_lvds_set_pll(lvds_cfg->pixelclock, lvds_cfg->chn_num);
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dphy_dsi_analog_setting(true);
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sclr_lvdstx_set(lvds_reg);
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_fill_disp_timing(&timing, &lvds_cfg->sync_info);
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sclr_disp_set_timing(&timing);
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sclr_disp_tgen_enable(true);
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get_disp_ctrl_gpios(&ctrl_gpios);
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ret = dm_gpio_set_value(&ctrl_gpios.disp_pwm_gpio,
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ctrl_gpios.disp_pwm_gpio.flags & GPIOD_ACTIVE_LOW ? 0 : 1);
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if (ret < 0)
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printf("dm_gpio_set_value(disp_pwm_gpio, deassert) failed: %d", ret);
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return ret;
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}
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