bf2d6014f8
[Audio][Feature]Remove log for VQE config function [Audio][Feature]Add VQE config function Change-Id: Ib0c06db87375b17429bb125fbcee73018bdb6910
484 lines
13 KiB
C
484 lines
13 KiB
C
/*
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* Copyright (C) Cvitek Co., Ltd. 2019-2021. All rights reserved.
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*
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* File Name: include/cvi_common_3a.h
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* Description:
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*/
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#ifndef __CVI_COMM_3A_H__
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#define __CVI_COMM_3A_H__
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#ifdef __cplusplus
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#if __cplusplus
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extern "C" {
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#endif
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#endif /* End of #ifdef __cplusplus */
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#include <stdbool.h>
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#include "cvi_comm_isp.h"
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#include "cvi_comm_sns.h"
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#define ALG_LIB_NAME_SIZE_MAX (20)
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#define MAX_REGISTER_ALG_LIB_NUM 4
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#define HIST_THRESH_NUM (4)
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#define MAX_AE_W (32)
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#define MAX_AE_H (24)
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#define MAX_AE_SIZE (MAX_AE_W * MAX_AE_H)
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#define MAX_AE_WIN (2)
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#define ENABLE_AF_LIB (0)
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typedef enum _ISP_FSWDR_MODE_E {
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ISP_FSWDR_NORMAL_MODE = 0x0,
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ISP_FSWDR_LONG_FRAME_MODE = 0x1,
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ISP_FSWDR_AUTO_LONG_FRAME_MODE = 0x2,
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ISP_FSWDR_MODE_BUTT
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} ISP_FSWDR_MODE_E;
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typedef struct _ISP_AE_RANGE_S {
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CVI_U32 u32Max; /*RW; Range:[0x0, 0x7FFFFFFF]*/
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CVI_U32 u32Min; /*RW; Range:[0x0, 0x7FFFFFFF]*/
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} ISP_AE_RANGE_S;
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typedef enum _ISP_AE_STRATEGY_E {
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AE_EXP_HIGHLIGHT_PRIOR = 0,
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AE_EXP_LOWLIGHT_PRIOR = 1,
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AE_STRATEGY_MODE_BUTT
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} ISP_AE_STRATEGY_E;
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typedef enum _ISP_AE_MODE_E {
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AE_MODE_SLOW_SHUTTER = 0,
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AE_MODE_FIX_FRAME_RATE = 1,
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AE_MODE_BUTT
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} ISP_AE_MODE_E;
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typedef enum _ISP_ANTIFLICKER_MODE_E {
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ISP_ANTIFLICKER_NORMAL_MODE = 0,
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ISP_ANTIFLICKER_AUTO_MODE = 1,
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ISP_ANTIFLICKER_MODE_BUTT
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} ISP_ANTIFLICKER_MODE_E;
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typedef struct _ISP_ANTIFLICKER_S {
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CVI_BOOL bEnable;
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ISP_AE_ANTIFLICKER_FREQUENCE_E enFrequency;
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ISP_ANTIFLICKER_MODE_E enMode;
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} ISP_ANTIFLICKER_S;
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typedef struct _ISP_SUBFLICKER_S {
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CVI_BOOL bEnable;
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CVI_U8 u8LumaDiff; /*RW; Range:[0x0, 0x64]*/
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} ISP_SUBFLICKER_S;
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typedef struct _ISP_AE_DELAY_S {
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CVI_U16 u16BlackDelayFrame;
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CVI_U16 u16WhiteDelayFrame;
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} ISP_AE_DELAY_S;
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typedef struct _ISP_ME_ATTR_S {
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ISP_OP_TYPE_E enExpTimeOpType;
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ISP_OP_TYPE_E enAGainOpType;
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ISP_OP_TYPE_E enDGainOpType;
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ISP_OP_TYPE_E enISPDGainOpType;
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CVI_U32 u32ExpTime; /*RW; Range:[0x0, 0x7FFFFFFF]*/
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CVI_U32 u32AGain; /*RW; Range:[0x400, 0x7FFFFFFF]*/
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CVI_U32 u32DGain; /*RW; Range:[0x400, 0x7FFFFFFF]*/
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CVI_U32 u32ISPDGain; /*RW; Range:[0x400, 0x40000]*/
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ISP_OP_TYPE_E enISONumOpType;
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ISP_AE_GAIN_TYPE_E enGainType;
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CVI_U32 u32ISONum; /*RW; Range:[0x64, 0x7FFFFFFF]*/
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} ISP_ME_ATTR_S;
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#define RESERVE_SIZE 10
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typedef struct _ISP_AE_ATTR_S {
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ISP_AE_RANGE_S stExpTimeRange;
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ISP_AE_RANGE_S stAGainRange; /*RW; Range:[0x400, 0x7FFFFFFF]*/
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ISP_AE_RANGE_S stDGainRange; /*RW; Range:[0x400, 0x7FFFFFFF]*/
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ISP_AE_RANGE_S stISPDGainRange; /*RW; Range:[0x400, 0x40000]*/
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ISP_AE_RANGE_S stSysGainRange; /*RW; Range:[0x400, 0x7FFFFFFF]*/
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CVI_U32 u32GainThreshold; /*RW; Range:[0x400, 0x7FFFFFFF]*/
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CVI_U8 u8Speed; // 1 means 0.1 ev
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CVI_U16 u16BlackSpeedBias;
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CVI_U8 u8Tolerance;
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CVI_U8 u8Compensation;
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CVI_U16 u16EVBias;
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ISP_AE_STRATEGY_E enAEStrategyMode;
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CVI_U16 u16HistRatioSlope;
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CVI_U8 u8MaxHistOffset;
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ISP_AE_MODE_E enAEMode;
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ISP_ANTIFLICKER_S stAntiflicker;
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ISP_SUBFLICKER_S stSubflicker;
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ISP_AE_DELAY_S stAEDelayAttr;
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CVI_BOOL bManualExpValue;
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CVI_U32 u32ExpValue; /*RW; Range:[0x0, 0x7FFFFFFF]*/
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ISP_FSWDR_MODE_E enFSWDRMode;
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CVI_BOOL bWDRQuick;
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CVI_U16 u16ISOCalCoef;
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ISP_AE_GAIN_TYPE_E enGainType;
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ISP_AE_RANGE_S stISONumRange; /*RW; Range:[0x64, 0x7FFFFFFF]*/
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CVI_S16 s16IRCutOnLv;
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CVI_S16 s16IRCutOffLv;
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ISP_AE_IR_CUT_FORCE_STATUS enIRCutStatus;
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CVI_U8 au8AdjustTargetMin[LV_TOTAL_NUM];
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CVI_U8 au8AdjustTargetMax[LV_TOTAL_NUM];
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CVI_U16 u16LowBinThr; /*RW; Range:[0x0, 0x100]*/
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CVI_U16 u16HighBinThr; /*RW; Range:[0x0, 0x100]*/
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CVI_BOOL bEnableFaceAE;
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CVI_U8 u8FaceTargetLuma; /*RW; Range:[0x1, 0xFF]*/
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CVI_U8 u8FaceWeight; /*RW; Range:[0x0, 0x64]*/
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CVI_U8 u8GridBvWeight; /*RW; Range:[0x0, 0x64]*/
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CVI_U32 au32Reserve[RESERVE_SIZE]; /*RW; Range:[0x0, 0x7FFFFFFF]*/
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CVI_U8 u8HighLightLumaThr;
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CVI_U8 u8HighLightBufLumaThr;
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CVI_U8 u8LowLightLumaThr;
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CVI_U8 u8LowLightBufLumaThr;
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CVI_BOOL bHistogramAssist;
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} ISP_AE_ATTR_S;
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typedef struct _ISP_EXPOSURE_ATTR_S {
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CVI_BOOL bByPass;
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ISP_OP_TYPE_E enOpType;
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CVI_U8 u8AERunInterval; /*RW; Range:[0x1, 0xFF]*/
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CVI_BOOL bHistStatAdjust;
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CVI_BOOL bAERouteExValid;
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ISP_ME_ATTR_S stManual;
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ISP_AE_ATTR_S stAuto;
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CVI_U8 u8DebugMode;
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ISP_AE_METER_MODE_E enMeterMode;
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CVI_BOOL bAEGainSepCfg;
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} ISP_EXPOSURE_ATTR_S;
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typedef struct ISP_STITCH_ATTR_T {
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CVI_BOOL enable;
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} ISP_STITCH_ATTR_S;
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typedef struct _ALG_LIB_S {
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CVI_S32 s32Id;
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CVI_CHAR acLibName[ALG_LIB_NAME_SIZE_MAX];
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} ALG_LIB_S;
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/* the init param of awb alg */
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typedef struct _ISP_AE_PARAM_S {
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SENSOR_ID SensorId;
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CVI_U8 u8WDRMode;
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CVI_U8 u8HDRMode;
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CVI_U16 u16BlackLevel;
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CVI_FLOAT f32Fps;
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ISP_BAYER_FORMAT_E enBayer;
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ISP_STITCH_ATTR_S stStitchAttr;
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CVI_S32 s32Rsv;
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ISP_3AWIN_CONFIG_S aeLEWinConfig[AE_MAX_NUM];
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ISP_3AWIN_CONFIG_S aeSEWinConfig;
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} ISP_AE_PARAM_S;
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typedef struct _ISP_FE_AE_STAT_1_S {
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CVI_U32 u32PixelCount[ISP_CHANNEL_MAX_NUM];
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CVI_U32 u32PixelWeight[ISP_CHANNEL_MAX_NUM];
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CVI_U32 au32HistogramMemArray[ISP_CHANNEL_MAX_NUM][MAX_HIST_BINS];
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} ISP_FE_AE_STAT_1_S;
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typedef struct _ISP_FE_AE_STAT_2_S {
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CVI_U16 u16GlobalAvgR[ISP_CHANNEL_MAX_NUM];
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CVI_U16 u16GlobalAvgGr[ISP_CHANNEL_MAX_NUM];
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CVI_U16 u16GlobalAvgGb[ISP_CHANNEL_MAX_NUM];
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CVI_U16 u16GlobalAvgB[ISP_CHANNEL_MAX_NUM];
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} ISP_FE_AE_STAT_2_S;
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typedef struct _ISP_FE_AE_STAT_3_S {
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CVI_U16 au16ZoneAvg[ISP_CHANNEL_MAX_NUM][AE_ZONE_ROW][AE_ZONE_COLUMN][4];
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} ISP_FE_AE_STAT_3_S;
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typedef struct _ISP_FE_AE_STITCH_STAT_3_S {
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CVI_U16 au16ZoneAvg[ISP_CHANNEL_MAX_NUM][ISP_CHANNEL_MAX_NUM][AE_ZONE_ROW][AE_ZONE_COLUMN][4];
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} ISP_FE_AE_STITCH_STAT_3_S;
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typedef struct _ISP_AE_STAT_ATTR_S {
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CVI_BOOL bChange;
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CVI_BOOL bHistAdjust;
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CVI_U8 u8AEBESel;
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CVI_U8 u8FourPlaneMode;
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CVI_U8 u8HistOffsetX;
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CVI_U8 u8HistOffsetY;
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CVI_U8 u8HistSkipX;
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CVI_U8 u8HistSkipY;
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CVI_BOOL bModeUpdate;
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CVI_U8 u8HistMode;
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CVI_U8 u8AverMode;
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CVI_U8 u8MaxGainMode;
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CVI_BOOL bWightTableUpdate;
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CVI_U8 au8WeightTable[VI_MAX_PIPE_NUM][AE_WEIGHT_ZONE_ROW][AE_WEIGHT_ZONE_COLUMN];
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} ISP_AE_STAT_ATTR_S;
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typedef struct _ISP_AE_STAT_RESULT_S {
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CVI_U32 u32IntTime[VI_MAX_PIPE_NUM];
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CVI_U32 u32IspDgain;
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CVI_U32 u32Again;
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CVI_U32 u32Dgain;
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CVI_U32 u32Iso;
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CVI_U8 u8AERunInterval;
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CVI_BOOL bPirisValid;
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CVI_S32 s32PirisPos;
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CVI_U32 u32PirisGain;
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ISP_FSWDR_MODE_E enFSWDRMode;
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CVI_U32 au32WDRGain[4];
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CVI_U32 u32HmaxTimes; /* unit is ns */
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ISP_AE_STAT_ATTR_S stStatAttr;
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ISP_DCF_UPDATE_INFO_S stUpdateInfo;
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CVI_U32 u32ExpRatio;
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CVI_S16 s16CurrentLV;
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CVI_U32 u32AvgLuma;
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CVI_U8 u8MeterFramePeriod;
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CVI_BOOL bStable;
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CVI_FLOAT fBvStep;
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CVI_U32 u32BlcIso;
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CVI_U32 u32IspDgainSF;
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CVI_U32 u32AgainSF;
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CVI_U32 u32DgainSF;
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CVI_U32 u32IsoSF;
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CVI_U32 u32BlcIsoSF;
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CVI_FLOAT fEvRatio[2];
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} ISP_AE_RESULT_S;
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typedef struct _ISP_BE_AE_STAT_1_S {
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CVI_BOOL bStable;
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} ISP_BE_AE_STAT_1_S;
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typedef struct _ISP_BE_AE_STAT_2_S {
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CVI_BOOL bStable;
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} ISP_BE_AE_STAT_2_S;
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typedef struct _ISP_BE_AE_STAT_3_S {
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CVI_BOOL bStable;
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} ISP_BE_AE_STAT_3_S;
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typedef struct _ISP_BE_AE_STITCH_STAT_3_S {
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CVI_BOOL bStable;
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} ISP_BE_AE_STITCH_STAT_3_S;
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typedef struct _ISP_AE_INFO_S {
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CVI_U32 u32FrameCnt; /* the counting of frame */
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ISP_SMART_ROI_S stSmartInfo;
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ISP_FE_AE_STAT_1_S * pstFEAeStat1[AE_MAX_NUM];
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ISP_FE_AE_STAT_2_S * pstFEAeStat2[AE_MAX_NUM];
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ISP_FE_AE_STAT_3_S * pstFEAeStat3[AE_MAX_NUM];
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ISP_FE_AE_STITCH_STAT_3_S *pstFEAeStiStat;
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ISP_BE_AE_STAT_1_S *pstBEAeStat1;
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ISP_BE_AE_STAT_2_S *pstBEAeStat2;
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ISP_BE_AE_STAT_3_S *pstBEAeStat3;
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ISP_BE_AE_STITCH_STAT_3_S *pstBEAeStiStat;
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ISP_3AWIN_CONFIG_S aeLEWinConfig[AE_MAX_NUM];
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ISP_3AWIN_CONFIG_S aeSEWinConfig;
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} ISP_AE_INFO_S;
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typedef struct bmISP_DCI_INFO_S {
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CVI_U32 u32FrameCnt; /* the counting of frame */
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CVI_U16 pStat[DCI_BINS_NUM];
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} ISP_DCI_INFO_S;
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/* the init param of awb alg */
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typedef struct _ISP_AWB_PARAM_S {
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SENSOR_ID SensorId;
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CVI_U8 u8WDRMode;
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CVI_U8 u8AWBZoneRow;
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CVI_U8 u8AWBZoneCol;
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CVI_U8 u8AWBZoneBin;
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ISP_STITCH_ATTR_S stStitchAttr;
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CVI_U16 u16AWBWidth;
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CVI_U16 u16AWBHeight;
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CVI_S8 s8Rsv;
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} ISP_AWB_PARAM_S;
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typedef struct _ISP_AWB_RAW_STAT_ATTR_S {
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bool bStatCfgUpdate;
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CVI_U16 u16MeteringWhiteLevelAwb;
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CVI_U16 u16MeteringBlackLevelAwb;
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CVI_U16 u16MeteringCrRefMaxAwb;
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CVI_U16 u16MeteringCbRefMaxAwb;
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CVI_U16 u16MeteringCrRefMinAwb;
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CVI_U16 u16MeteringCbRefMinAwb;
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} ISP_AWB_RAW_STAT_ATTR_S;
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typedef struct _ISP_AWB_RESULT_S {
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CVI_U32 au32WhiteBalanceGain[ISP_BAYER_CHN_NUM];
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CVI_U16 au16ColorMatrix[CCM_MATRIX_SIZE];
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CVI_U32 u32ColorTemp;
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CVI_U8 u8Saturation[4];
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ISP_AWB_RAW_STAT_ATTR_S stRawStatAttr;
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CVI_BOOL bStable;
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CVI_U8 u8AdjCASaturation;
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CVI_U8 u8AdjCASatLuma;
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} ISP_AWB_RESULT_S;
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typedef struct _ISP_AWB_STAT_1_S {
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CVI_U16 u16MeteringAwbAvgR;
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CVI_U16 u16MeteringAwbAvgG;
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CVI_U16 u16MeteringAwbAvgB;
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CVI_U16 u16MeteringAwbCountAll;
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} ISP_AWB_STAT_1_S;
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typedef struct _ISP_AWB_STAT_RESULT_S {
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CVI_U16 *pau16ZoneAvgR;
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CVI_U16 *pau16ZoneAvgG;
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CVI_U16 *pau16ZoneAvgB;
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CVI_U16 *pau16ZoneCount;
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} ISP_AWB_STAT_RESULT_S;
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typedef struct _ISP_AWB_INFO_S {
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CVI_U32 u32FrameCnt;
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ISP_SMART_ROI_S stSmartInfo;
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ISP_AWB_STAT_1_S * pstAwbStat1[ISP_CHANNEL_MAX_NUM];
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ISP_AWB_STAT_RESULT_S stAwbStat2[ISP_CHANNEL_MAX_NUM];
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CVI_U8 u8AwbGainSwitch;
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CVI_U32 au32WDRWBGain[ISP_BAYER_CHN_NUM];
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CVI_U32 u32IsoNum;
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CVI_S16 s16LVx100;
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CVI_FLOAT fBVstep;
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} ISP_AWB_INFO_S;
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// AF related structure
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typedef struct _ISP_AF_PARAM_S {
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SENSOR_ID SensorId;
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CVI_U8 u8WDRMode;
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CVI_S32 s32Rsv;
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} ISP_AF_PARAM_S;
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typedef struct _ISP_AF_INFO_S {
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CVI_U32 u32FrameCnt;
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ISP_AF_STATISTICS_S *pstAfStat;
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} ISP_AF_INFO_S;
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typedef struct _ISP_AF_RESULT_S {
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CVI_S32 s32Rsv;
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} ISP_AF_RESULT_S;
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typedef struct _ISP_AE_STITCH_STATISTICS_S {
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CVI_U32 enable;
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} ISP_AE_STITCH_STATISTICS_S;
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typedef struct _ISP_BIND_ATTR_S {
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SENSOR_ID sensorId;
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ALG_LIB_S stAeLib;
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ALG_LIB_S stAfLib;
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ALG_LIB_S stAwbLib;
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} ISP_BIND_ATTR_S;
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typedef struct _ISP_AE_EXP_FUNC_S {
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CVI_S32 (*pfn_ae_init)(VI_PIPE ViPipe, const ISP_AE_PARAM_S *pstAeParam);
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CVI_S32 (*pfn_ae_run)(VI_PIPE ViPipe, const ISP_AE_INFO_S *pstAeInfo,
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ISP_AE_RESULT_S *pstAeResult, CVI_S32 s32Rsv);
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CVI_S32 (*pfn_ae_ctrl)(VI_PIPE ViPipe, CVI_U32 u32Cmd, void *pValue);
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CVI_S32 (*pfn_ae_exit)(VI_PIPE ViPipe);
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} ISP_AE_EXP_FUNC_S;
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typedef struct _ISP_AWB_EXP_FUNC_S {
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CVI_S32 (*pfn_awb_init)(VI_PIPE ViPipe, const ISP_AWB_PARAM_S *pstAwbParam);
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CVI_S32 (*pfn_awb_run)(VI_PIPE ViPipe, const ISP_AWB_INFO_S *pstAwbInfo, ISP_AWB_RESULT_S *pstAwbResult,
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CVI_S32 s32Rsv);
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CVI_S32 (*pfn_awb_ctrl)(VI_PIPE ViPipe, CVI_U32 u32Cmd, CVI_VOID *pValue);
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CVI_S32 (*pfn_awb_exit)(VI_PIPE ViPipe);
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} ISP_AWB_EXP_FUNC_S;
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typedef struct _ISP_AF_EXP_FUNC_S {
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CVI_S32 (*pfn_af_init)(VI_PIPE ViPipe, const ISP_AF_PARAM_S *pstAfParam);
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CVI_S32 (*pfn_af_run)(VI_PIPE ViPipe, const ISP_AF_INFO_S *pstAfInfo, ISP_AF_RESULT_S *pstAfResult,
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CVI_S32 s32Rsv);
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CVI_S32 (*pfn_af_ctrl)(VI_PIPE ViPipe, CVI_U32 u32Cmd, CVI_VOID *pValue);
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CVI_S32 (*pfn_af_exit)(VI_PIPE ViPipe);
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} ISP_AF_EXP_FUNC_S;
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typedef struct _ISP_AE_REGISTER_S {
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ISP_AE_EXP_FUNC_S stAeExpFunc;
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} ISP_AE_REGISTER_S;
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typedef struct _ISP_AWB_REGISTER_S {
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ISP_AWB_EXP_FUNC_S stAwbExpFunc;
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} ISP_AWB_REGISTER_S;
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typedef struct _ISP_AF_REGISTER_S {
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ISP_AF_EXP_FUNC_S stAfExpFunc;
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} ISP_AF_REGISTER_S;
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typedef enum _ISP_CTRL_CMD_E {
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ISP_WDR_MODE_SET = 0,
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ISP_CTRL_CMD_BUTT_MAX,
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} ISP_CTRL_CMD_E;
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|
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#define AWB_DBG_VER (11)
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#define AWB_SENSOR_NUM (2)
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#define AWB_DBG_W (64)
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#define AWB_DBG_H (32)
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#define AWB_SHIFT_REGION_NUM (4)
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typedef struct _AWB_DBG_S {
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|
//Don't modify ==>
|
|
CVI_U32 u32Date;
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|
CVI_U16 u16AlgoVer;
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|
CVI_U16 u16DbgVer;
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|
CVI_U16 u16MaxFrameNum;
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|
CVI_U16 u16SensorId;
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|
CVI_U32 u32BinSize;
|
|
CVI_U16 u16WinWnum;
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|
CVI_U16 u16WinHnum;
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|
CVI_U16 u16WinOffX;
|
|
CVI_U16 u16WinOffY;
|
|
CVI_U16 u16WinWsize;
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|
CVI_U16 u16WinHsize;
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|
CVI_U16 u16P_R[2][AWB_DBG_W*AWB_DBG_H];//keep Max Size
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|
CVI_U16 u16P_G[2][AWB_DBG_W*AWB_DBG_H];//keep Max Size
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|
CVI_U16 u16P_B[2][AWB_DBG_W*AWB_DBG_H];//keep Max Size
|
|
CVI_U16 u16P_type[2][AWB_DBG_W*AWB_DBG_H];//keep Max Size
|
|
CVI_U16 u16GrayCnt;
|
|
CVI_U16 u16BalanceR;
|
|
CVI_U16 u16BalanceB;
|
|
CVI_U16 u16FinalR;
|
|
CVI_U16 u16FinalB;
|
|
CVI_U16 u16CurrentR;
|
|
CVI_U16 u16CurrentB;
|
|
CVI_U16 u16IdealR;
|
|
CVI_U16 u16IdealB;
|
|
CVI_U16 CalibRgain[AWB_CALIB_PTS_NUM];
|
|
CVI_U16 CalibBgain[AWB_CALIB_PTS_NUM];
|
|
CVI_U16 CalibTemp[AWB_CALIB_PTS_NUM];
|
|
CVI_U16 u16CurveR[256];//4096/16
|
|
CVI_U16 u16CurveB[256];
|
|
CVI_U16 u16CurveB_Top[256];
|
|
CVI_U16 u16CurveB_Bot[256];
|
|
CVI_S16 s16LvX100;
|
|
CVI_U32 u32ISONum;
|
|
ISP_WB_ATTR_S dbgMPIAttr[AWB_SENSOR_NUM];
|
|
ISP_WB_ATTR_S dbgInfoAttr[AWB_SENSOR_NUM];
|
|
ISP_AWB_ATTR_EX_S dbgMPIAttrEx[AWB_SENSOR_NUM];
|
|
ISP_AWB_ATTR_EX_S dbgInfoAttrEx[AWB_SENSOR_NUM];
|
|
//Don't modify <==
|
|
CVI_U8 calib_sts;
|
|
ISP_AWB_Calibration_Gain_S_EX calib_ex;
|
|
ISP_SMART_ROI_S stFace;
|
|
|
|
// fix size to 128 byte from here
|
|
CVI_U16 u16Region_R[AWB_SHIFT_REGION_NUM];
|
|
CVI_U8 u8Reserve[120];
|
|
} s_AWB_DBG_S;
|
|
|
|
|
|
#ifdef __cplusplus
|
|
#if __cplusplus
|
|
}
|
|
#endif
|
|
#endif /* End of #ifdef __cplusplus */
|
|
|
|
#endif /* __CVI_COMM_3A_H__ */
|