generated from gaoyang3513/SDK_RK3288
328 lines
9.1 KiB
C
328 lines
9.1 KiB
C
/*
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* Copyright 2014-2016 Freescale Semiconductor, Inc.
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*
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* Configuration settings for the Freescale i.MX6SX Sabresd board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include "mx6_common.h"
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#define CONFIG_DBG_MONITOR
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#ifdef CONFIG_SPL
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_MMC_SUPPORT
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#include "imx6_spl.h"
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#endif
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/* uncomment for PLUGIN mode support */
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/* #define CONFIG_USE_PLUGIN */
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/* uncomment for SECURE mode support */
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/* #define CONFIG_SECURE_BOOT */
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#ifdef CONFIG_SECURE_BOOT
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#ifndef CONFIG_CSF_SIZE
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#define CONFIG_CSF_SIZE 0x4000
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#endif
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#endif
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_BOARD_LATE_INIT
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_BASE
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#define CONFIG_SYS_AUXCORE_BOOTDATA 0x78000000 /* Set to QSPI2 B flash at default */
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#define CONFIG_IMX_BOOTAUX
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/* When using M4 fastup demo, no need these M4 env, since QSPI is used by M4 */
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#ifndef CONFIG_SYS_AUXCORE_FASTUP
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#define UPDATE_M4_ENV \
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"m4image=m4_qspi.bin\0" \
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"loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
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"update_m4_from_sd=" \
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"if sf probe 1:0; then " \
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"if run loadm4image; then " \
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"setexpr fw_sz ${filesize} + 0xffff; " \
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"setexpr fw_sz ${fw_sz} / 0x10000; " \
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"setexpr fw_sz ${fw_sz} * 0x10000; " \
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"sf erase 0x0 ${fw_sz}; " \
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"sf write ${loadaddr} 0x0 ${filesize}; " \
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"fi; " \
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"fi\0" \
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"m4boot=sf probe 1:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
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#else
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#define UPDATE_M4_ENV ""
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#endif
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#define CONFIG_MFG_ENV_SETTINGS \
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"mfgtool_args=setenv bootargs console=${console},${baudrate} " \
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"rdinit=/linuxrc " \
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"g_mass_storage.stall=0 g_mass_storage.removable=1 " \
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"g_mass_storage.file=/fat g_mass_storage.ro=1 " \
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"g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
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"g_mass_storage.iSerialNumber=\"\" "\
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"\0" \
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"initrd_addr=0x83800000\0" \
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"initrd_high=0xffffffff\0" \
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"bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
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#define CONFIG_EXTRA_ENV_SETTINGS \
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CONFIG_MFG_ENV_SETTINGS \
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UPDATE_M4_ENV \
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"script=boot.scr\0" \
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"image=zImage\0" \
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"console=ttymxc0\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"fdt_file=imx6sx-sdb.dtb\0" \
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"fdt_addr=0x83000000\0" \
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"boot_fdt=try\0" \
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"ip_dyn=yes\0" \
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"panel=Hannstar-XGA\0" \
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"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
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"mmcpart=1\0" \
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"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
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"mmcautodetect=yes\0" \
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"mmcargs=setenv bootargs console=${console},${baudrate} " \
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"root=${mmcroot}\0" \
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"loadbootscript=" \
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"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source\0" \
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"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
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"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if run loadfdt; then " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootz; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootz; " \
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"fi;\0" \
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"netargs=setenv bootargs console=${console},${baudrate} " \
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"root=/dev/nfs " \
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"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
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"netboot=echo Booting from net ...; " \
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"run netargs; " \
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"if test ${ip_dyn} = yes; then " \
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"setenv get_cmd dhcp; " \
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"else " \
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"setenv get_cmd tftp; " \
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"fi; " \
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"${get_cmd} ${image}; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootz; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootz; " \
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"fi;\0"
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#define CONFIG_BOOTCOMMAND \
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"mmc dev ${mmcdev};" \
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"mmc dev ${mmcdev}; if mmc rescan; then " \
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"if run loadbootscript; then " \
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"run bootscript; " \
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"else " \
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"if run loadimage; then " \
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"run mmcboot; " \
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"else run netboot; " \
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"fi; " \
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"fi; " \
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"else run netboot; fi"
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/* Miscellaneous configurable options */
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#define CONFIG_CMD_MEMTEST
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#define CONFIG_SYS_MEMTEST_START 0x80000000
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000)
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#define CONFIG_STACKSIZE SZ_128K
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define PHYS_SDRAM_SIZE SZ_1G
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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#ifdef CONFIG_SYS_AUXCORE_FASTUP
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/* #define CONFIG_IMX_RDC */ /* Disable the RDC temporarily, will enable it in future */
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#define CONFIG_ENV_IS_IN_MMC /* Must disable QSPI driver, because M4 run on QSPI */
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#elif defined CONFIG_SYS_BOOT_QSPI
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#define CONFIG_FSL_QSPI
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#define CONFIG_ENV_IS_IN_SPI_FLASH
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#else
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#define CONFIG_FSL_QSPI /* Enable the QSPI flash at default */
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#define CONFIG_ENV_IS_IN_MMC
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#endif
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#ifdef CONFIG_FSL_QSPI
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#define CONFIG_QSPI_BASE QSPI1_BASE_ADDR
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#define CONFIG_QSPI_MEMMAP_BASE QSPI1_AMBA_BASE
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#define CONFIG_CMD_SF
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_BAR
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#define CONFIG_SPI_FLASH_SPANSION
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#define CONFIG_SPI_FLASH_STMICRO
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#define CONFIG_SF_DEFAULT_BUS 0
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#define CONFIG_SF_DEFAULT_CS 0
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#define CONFIG_SF_DEFAULT_SPEED 40000000
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
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#endif
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/* MMC Configuration */
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#define CONFIG_SYS_FSL_USDHC_NUM 3
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#define CONFIG_SYS_MMC_ENV_DEV 2 /*USDHC4*/
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#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
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#define CONFIG_MMCROOT "/dev/mmcblk3p2" /* USDHC4 */
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#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR
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/* I2C Configs */
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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/* PMIC */
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#define CONFIG_POWER
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#define CONFIG_POWER_I2C
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#define CONFIG_POWER_PFUZE100
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#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
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/* Network */
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_MII
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#define CONFIG_FEC_MXC
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#define CONFIG_MII
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#define CONFIG_FEC_ENET_DEV 0
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#if (CONFIG_FEC_ENET_DEV == 0)
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#define IMX_FEC_BASE ENET_BASE_ADDR
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#define CONFIG_FEC_MXC_PHYADDR 0x1
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#elif (CONFIG_FEC_ENET_DEV == 1)
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#define IMX_FEC_BASE ENET2_BASE_ADDR
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#define CONFIG_FEC_MXC_PHYADDR 0x2
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#endif
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#define CONFIG_FEC_XCV_TYPE RGMII
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#define CONFIG_ETHPRIME "FEC"
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_ATHEROS
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#define CONFIG_CMD_USB
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_USB_STORAGE
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#endif
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/*
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* The PCIe support in uboot would bring failures in i.MX6SX PCIe
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* EP/RC validations. Disable PCIe support in uboot here.
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* RootCause: The bit10(ltssm_en) of GPR12 would be set in uboot,
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* thus the i.MX6SX PCIe EP would be cheated that the other i.MX6SX
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* PCIe RC had been configured and trying to setup PCIe link directly,
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* although the i.MX6SX RC is not properly configured at that time.
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* PCIe can be supported in uboot, if the i.MX6SX PCIe EP/RC validation
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* is not running.
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*/
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/* #define CONFIG_CMD_PCI */
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#ifdef CONFIG_CMD_PCI
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#define CONFIG_PCI
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#define CONFIG_PCI_PNP
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#define CONFIG_PCI_SCAN_SHOW
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#define CONFIG_PCIE_IMX
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#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0)
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#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1)
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#endif
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#define CONFIG_IMX_THERMAL
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#define CONFIG_CMD_TIME
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#define CONFIG_CMD_BMODE
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_VIDEO
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#ifdef CONFIG_VIDEO
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#define CONFIG_CFB_CONSOLE
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#define CONFIG_VIDEO_MXS
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#define CONFIG_VIDEO_LOGO
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#define CONFIG_VIDEO_SW_CURSOR
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#define CONFIG_VGA_AS_SINGLE_DEVICE
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_SPLASH_SCREEN_ALIGN
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#define CONFIG_CMD_BMP
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#define CONFIG_BMP_16BPP
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#define CONFIG_VIDEO_BMP_RLE8
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#define CONFIG_VIDEO_BMP_LOGO
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#define CONFIG_IMX_VIDEO_SKIP
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#endif
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#endif
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#define CONFIG_ENV_SIZE SZ_8K
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#if defined(CONFIG_ENV_IS_IN_MMC)
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#define CONFIG_ENV_OFFSET (12 * SZ_64K)
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#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
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#define CONFIG_ENV_OFFSET (768 * 1024)
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#define CONFIG_ENV_SECT_SIZE (64 * 1024)
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#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
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#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
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#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
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#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
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#endif
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#define CONFIG_SYS_FSL_USDHC_NUM 3
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#if defined(CONFIG_ANDROID_SUPPORT)
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#include "mx6sxsabresdandroid.h"
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#endif
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#endif /* __CONFIG_H */
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