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phy: rockchip: naneng-combphy: Force detect Rx for RK356X SoCs

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Follow internal design requirement.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I1b304cfab4a65c88cfdab6f59922f297fa35e742
This commit is contained in:
Shawn Lin
2021-12-14 08:20:25 +08:00
committed by Tao Huang
parent c9992a6573
commit 2f06afaaa8
1 changed files with 9 additions and 0 deletions
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9
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
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@ -68,6 +68,7 @@ struct rockchip_combphy_cfg {
const int num_clks;
const struct clk_bulk_data *clks;
const struct rockchip_combphy_grfcfg *grfcfg;
bool force_det_out; /* Tx detect Rx errata */
int (*combphy_cfg)(struct rockchip_combphy_priv *priv);
};
@ -130,6 +131,7 @@ static u32 rockchip_combphy_is_ready(struct rockchip_combphy_priv *priv)
static int rockchip_combphy_pcie_init(struct rockchip_combphy_priv *priv)
{
int ret = 0;
u32 val;
if (priv->cfg->combphy_cfg) {
ret = priv->cfg->combphy_cfg(priv);
@ -139,6 +141,12 @@ static int rockchip_combphy_pcie_init(struct rockchip_combphy_priv *priv)
}
}
if (priv->cfg->force_det_out) {
val = readl(priv->mmio + (0xd << 2));
val |= BIT(5);
writel(val, priv->mmio + (0xd << 2));
}
return ret;
}
@ -622,6 +630,7 @@ static const struct rockchip_combphy_cfg rk3568_combphy_cfgs = {
.clks = rk3568_clks,
.grfcfg = &rk3568_combphy_grfcfgs,
.combphy_cfg = rk3568_combphy_cfg,
.force_det_out = true,
};
static const struct of_device_id rockchip_combphy_of_match[] = {