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dts 调整MIPI DSI设备树插件

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This commit is contained in:
hejiawencc
2023-07-05 10:58:19 +08:00
parent 9359851b8e
commit 4255f2878e
21 changed files with 1369 additions and 2176 deletions
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12
arch/arm64/boot/dts/rockchip/overlay/Makefile
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@ -50,18 +50,14 @@ dtbo-$(CONFIG_CPU_RK3568) += \
rk3566-lubancat-dsi0-1080p-overlay.dtbo \
rk3566-lubancat-dsi0-rpi-overlay.dtbo \
rk3566-lubancat-msata-overlay.dtbo \
rk3568-lubancat-2-dsi0-in-vp1-7.0-1024x600-overlay.dtbo \
rk3568-lubancat-2-dsi0-in-vp1-10.1-800x1280-overlay.dtbo \
rk3568-lubancat-2-dsi0-in-vp1-1080p-overlay.dtbo \
rk3568-lubancat-2-dsi0-in-vp1-rpi-overlay.dtbo \
rk3568-lubancat-2-dsi1-in-vp0-7.0-1024x600-overlay.dtbo \
rk3568-lubancat-2-dsi1-in-vp0-10.1-800x1280-overlay.dtbo \
rk3568-lubancat-2-dsi1-in-vp0-1080p-overlay.dtbo \
rk3568-lubancat-2-dsi1-in-vp0-rpi-overlay.dtbo \
rk3568-lubancat-2io-dsi0-in-vp0-7.0-1024x600-overlay.dtbo \
rk3568-lubancat-2io-dsi0-in-vp0-10.1-800x1280-overlay.dtbo \
rk3568-lubancat-2io-dsi0-in-vp0-1080p-overlay.dtbo \
rk3568-lubancat-2io-dsi0-in-vp0-rpi-overlay.dtbo \
rk3568-lubancat-2io-dsi1-in-vp1-7.0-1024x600-overlay.dtbo \
rk3568-lubancat-2io-dsi1-in-vp1-10.1-800x1280-overlay.dtbo \
rk3568-lubancat-2io-dsi1-in-vp1-1080p-overlay.dtbo \
rk3568-lubancat-2io-dsi1-in-vp1-rpi-overlay.dtbo \
rk3568-lubancat-2io-edp-in-vp1-overlay.dtbo \
rk3568-lubancat-can1-m0-overlay.dtbo \
rk3568-lubancat-can1-m1-overlay.dtbo \

308
arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-2-dsi0-in-vp1-10.1-800x1280-overlay.dts Normal file
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@ -0,0 +1,308 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
fragment@0 {
target = <&route_dsi0>;
__overlay__ {
status = "okay";
connect = <&vp1_out_dsi0>;
};
};
fragment@1 {
target = <&video_phy0>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&dsi0_in_vp0>;
__overlay__ {
status = "disabled";
};
};
fragment@3 {
target = <&dsi0_in_vp1>;
__overlay__ {
status = "okay";
};
};
fragment@4 {
target = <&dsi0>;
__overlay__ {
status = "okay";
};
};
fragment@5 {
target = <&dsi0_panel>;
__overlay__ {
status = "okay";
enable-delay-ms = <35>;
prepare-delay-ms = <6>;
reset-delay-ms = <0>;
init-delay-ms = <20>;
unprepare-delay-ms = <0>;
disable-delay-ms = <20>;
size,width = <74>;
size,height = <133>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
39 05 04 FF 98 81 03
15 05 02 01 00
15 05 02 02 00
15 05 02 03 53
15 05 02 04 D3
15 05 02 05 00
15 05 02 06 0D
15 05 02 07 08
15 05 02 08 00
15 05 02 09 00
15 05 02 0a 00
15 05 02 0b 00
15 05 02 0c 00
15 05 02 0d 00
15 05 02 0e 00
15 05 02 0f 28
15 05 02 10 28
15 05 02 11 00
15 05 02 12 00
15 05 02 13 00
15 05 02 14 00
15 05 02 15 00
15 05 02 16 00
15 05 02 17 00
15 05 02 18 00
15 05 02 19 00
15 05 02 1a 00
15 05 02 1b 00
15 05 02 1d 00
15 05 02 1e 40
15 05 02 1f 80
15 05 02 20 06
15 05 02 21 01
15 05 02 22 00
15 05 02 23 00
15 05 02 24 00
15 05 02 25 00
15 05 02 26 00
15 05 02 27 00
15 05 02 28 33
15 05 02 29 33
15 05 02 2a 00
15 05 02 2b 00
15 05 02 2c 00
15 05 02 2d 00
15 05 02 2e 00
15 05 02 2f 00
15 05 02 30 00
15 05 02 31 00
15 05 02 32 00
15 05 02 33 00
15 05 02 34 03
15 05 02 35 00
15 05 02 36 00
15 05 02 37 00
15 05 02 38 96
15 05 02 39 00
15 05 02 3a 00
15 05 02 3b 00
15 05 02 3c 00
15 05 02 3d 00
15 05 02 3e 00
15 05 02 3f 00
15 05 02 40 00
15 05 02 41 00
15 05 02 42 00
15 05 02 43 00
15 05 02 44 00
15 05 02 50 00
15 05 02 51 23
15 05 02 52 45
15 05 02 53 67
15 05 02 54 89
15 05 02 55 AB
15 05 02 56 01
15 05 02 57 23
15 05 02 58 45
15 05 02 59 67
15 05 02 5a 89
15 05 02 5b AB
15 05 02 5c CD
15 05 02 5d EF
15 05 02 5e 00
15 05 02 5f 08
15 05 02 60 08
15 05 02 61 06
15 05 02 62 06
15 05 02 63 01
15 05 02 64 01
15 05 02 65 00
15 05 02 66 00
15 05 02 67 02
15 05 02 68 15
15 05 02 69 15
15 05 02 6a 14
15 05 02 6b 14
15 05 02 6c 0D
15 05 02 6d 0D
15 05 02 6e 0C
15 05 02 6f 0C
15 05 02 70 0F
15 05 02 71 0F
15 05 02 72 0E
15 05 02 73 0E
15 05 02 74 02
15 05 02 75 08
15 05 02 76 08
15 05 02 77 06
15 05 02 78 06
15 05 02 79 01
15 05 02 7a 01
15 05 02 7b 00
15 05 02 7c 00
15 05 02 7d 02
15 05 02 7e 15
15 05 02 7f 15
15 05 02 80 14
15 05 02 81 14
15 05 02 82 0D
15 05 02 83 0D
15 05 02 84 0C
15 05 02 85 0C
15 05 02 86 0F
15 05 02 87 0F
15 05 02 88 0E
15 05 02 89 0E
15 05 02 8A 02
39 05 04 FF 98 81 04
15 05 02 6E 2B
15 05 02 6F 37
15 05 02 3A 24
15 05 02 8D 1A
15 05 02 87 BA
15 05 02 B2 D1
15 05 02 88 0B
15 05 02 38 01
15 05 02 39 00
15 05 02 B5 02
15 05 02 31 25
15 05 02 3B 98
39 05 04 FF 98 81 01
15 05 02 22 0A
15 05 02 31 00
15 05 02 53 3D
15 05 02 55 3D
15 05 02 50 B5
15 05 02 51 AD
15 05 02 60 06
15 05 02 62 20
15 05 02 A0 00
15 05 02 A1 21
15 05 02 A2 35
15 05 02 A3 19
15 05 02 A4 1E
15 05 02 A5 33
15 05 02 A6 27
15 05 02 A7 26
15 05 02 A8 AF
15 05 02 A9 1B
15 05 02 AA 27
15 05 02 AB 8D
15 05 02 AC 1A
15 05 02 AD 1B
15 05 02 AE 50
15 05 02 AF 26
15 05 02 B0 2B
15 05 02 B1 54
15 05 02 B2 5E
15 05 02 B3 23
15 05 02 C0 00
15 05 02 C1 21
15 05 02 C2 35
15 05 02 C3 19
15 05 02 C4 1E
15 05 02 C5 33
15 05 02 C6 27
15 05 02 C7 26
15 05 02 C8 AF
15 05 02 C9 1B
15 05 02 CA 27
15 05 02 CB 8D
15 05 02 CC 1A
15 05 02 CD 1B
15 05 02 CE 50
15 05 02 CF 26
15 05 02 D0 2B
15 05 02 D1 54
15 05 02 D2 5E
15 05 02 D3 23
39 05 04 FF 98 81 00
15 78 02 11 00
15 05 02 29 00
];
panel-exit-sequence = [
05 78 01 28
05 00 01 10
];
disp_timing: display-timings {
native-mode = <&dsi0_timing>;
dsi0_timing: timing {
clock-frequency = <67000000>;
hactive = <800>;
vactive = <1280>;
hsync-len = <24>;
hback-porch = <24>;
hfront-porch = <12>;
vsync-len = <2>;
vback-porch = <9>;
vfront-porch = <7>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
};
};
fragment@6 {
target = <&i2c1>;
__overlay__ {
status = "okay";
};
};
fragment@7 {
target = <&gt928_dsi0>;
__overlay__ {
status = "okay";
};
};
};

135
arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-2-dsi0-in-vp1-1080p-overlay.dts Normal file
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@ -0,0 +1,135 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
fragment@0 {
target = <&route_dsi0>;
__overlay__ {
status = "okay";
connect = <&vp1_out_dsi0>;
};
};
fragment@1 {
target = <&video_phy0>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&dsi0_in_vp0>;
__overlay__ {
status = "disabled";
};
};
fragment@3 {
target = <&dsi0_in_vp1>;
__overlay__ {
status = "okay";
};
};
fragment@4 {
target = <&dsi0>;
__overlay__ {
status = "okay";
};
};
fragment@5 {
target = <&dsi0_panel>;
__overlay__ {
status = "okay";
enable-delay-ms = <35>;
prepare-delay-ms = <6>;
reset-delay-ms = <0>;
init-delay-ms = <20>;
unprepare-delay-ms = <0>;
disable-delay-ms = <20>;
size,width = <74>;
size,height = <133>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
39 00 04 B9 FF 83 99
15 00 02 D2 77
39 00 10 B1 02 04 74 94 01 32 33 11 11 AB 4D 56 73 02 02
39 00 10 B2 00 80 80 AE 05 07 5A 11 00 00 10 1E 70 03 D4
15 00 02 36 02
39 00 2D B4 00 FF 02 C0 02 C0 00 00 08 00 04 06 00 32 04 0A 08 21 03 01 00 0F B8 8B 02 C0 02 C0 00 00 08 00 04 06 00 32 04 0A 08 01 00 0F B8 01
39 05 22 D3 00 00 00 00 00 00 06 00 00 10 04 00 04 00 00 00 00 00 00 00 00 00 00 01 00 05 05 07 00 00 00 05 40
39 05 21 D5 18 18 19 19 18 18 21 20 01 00 07 06 05 04 03 02 18 18 18 18 18 18 2F 2F 30 30 31 31 18 18 18 18
39 05 21 D6 18 18 19 19 40 40 20 21 06 07 00 01 02 03 04 05 40 40 40 40 40 40 2F 2F 30 30 31 31 40 40 40 40
39 00 11 D8 A2 AA 02 A0 A2 A8 02 A0 B0 00 00 00 B0 00 00 00
15 00 02 BD 01
39 00 11 D8 B0 00 00 00 B0 00 00 00 E2 AA 03 F0 E2 AA 03 F0
15 00 02 BD 02
39 00 09 D8 E2 AA 03 F0 E2 AA 03 F0
15 00 02 BD 00
39 00 03 B6 8D 8D
39 05 37 E0 00 0E 19 13 2E 39 48 44 4D 57 5F 66 6C 76 7F 85 8A 95 9A A4 9B AB B0 5C 58 64 77 00 0E 19 13 2E 39 48 44 4D 57 5F 66 6C 76 7F 85 8A 95 9A A4 9B AB B0 5C 58 64 77
05 C8 01 11
05 C8 01 29
];
panel-exit-sequence = [
05 78 01 28
05 00 01 10
];
disp_timing: display-timings {
native-mode = <&dsi0_timing>;
dsi0_timing: timing {
clock-frequency = <131376000>;
hactive = <1080>;
vactive = <1920>;
hsync-len = <10>;
hback-porch = <20>;
hfront-porch = <10>;
vsync-len = <5>;
vback-porch = <20>;
vfront-porch = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
};
};
fragment@6 {
target = <&i2c1>;
__overlay__ {
status = "okay";
};
};
fragment@7 {
target = <&gt911_dsi0>;
__overlay__ {
status = "okay";
};
};
};

123
arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-2-dsi0-in-vp1-7.0-1024x600-overlay.dts Normal file
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@ -0,0 +1,123 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
fragment@0 {
target = <&route_dsi0>;
__overlay__ {
status = "okay";
connect = <&vp1_out_dsi0>;
};
};
fragment@1 {
target = <&video_phy0>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&dsi0_in_vp0>;
__overlay__ {
status = "disabled";
};
};
fragment@3 {
target = <&dsi0_in_vp1>;
__overlay__ {
status = "okay";
};
};
fragment@4 {
target = <&dsi0>;
__overlay__ {
status = "okay";
};
};
fragment@5 {
target = <&dsi0_panel>;
__overlay__ {
status = "okay";
enable-delay-ms = <35>;
prepare-delay-ms = <6>;
reset-delay-ms = <0>;
init-delay-ms = <20>;
unprepare-delay-ms = <0>;
disable-delay-ms = <20>;
size,width = <74>;
size,height = <133>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
15 00 02 80 AC
15 00 02 81 B8
15 00 02 82 09
15 00 02 83 78
15 00 02 84 7f
15 00 02 85 bb
15 00 02 86 70
];
panel-exit-sequence = [
05 78 01 28
05 00 01 10
];
disp_timing: display-timings {
native-mode = <&dsi0_timing>;
dsi0_timing: timing {
clock-frequency = <51669000>;
hactive = <1024>;
vactive = <600>;
hsync-len = <10>;
hback-porch = <160>;
hfront-porch = <160>;
vsync-len = <1>;
vback-porch = <23>;
vfront-porch = <12>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
};
};
fragment@6 {
target = <&i2c1>;
__overlay__ {
status = "okay";
};
};
fragment@7 {
target = <&gt911_dsi0>;
__overlay__ {
status = "okay";
};
};
};

84
arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-2-dsi0-in-vp1-rpi-overlay.dts Normal file
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@ -0,0 +1,84 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
fragment@0 {
target = <&route_dsi0>;
__overlay__ {
status = "okay";
connect = <&vp1_out_dsi0>;
};
};
fragment@1 {
target = <&video_phy0>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&dsi0_in_vp0>;
__overlay__ {
status = "disabled";
};
};
fragment@3 {
target = <&dsi0_in_vp1>;
__overlay__ {
status = "okay";
};
};
fragment@4 {
target = <&dsi0>;
__overlay__ {
status = "okay";
};
};
fragment@5 {
target = <&dsi0_panel>;
__overlay__ {
compatible = "rockpi,tc358762";
status = "okay";
};
};
fragment@6 {
target = <&i2c1>;
__overlay__ {
status = "okay";
};
};
fragment@7 {
target = <&rockpi_mcu_0>;
__overlay__ {
status = "okay";
};
};
fragment@8 {
target = <&rockpi_ft5406_0>;
__overlay__ {
status = "okay";
};
};
};

536
arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-2-dsi1-in-vp0-10.1-800x1280-overlay.dts
View File

@ -46,301 +46,267 @@
__overlay__ {
status = "okay";
power-supply = <&mipi_dsi1_power>;
#address-cells = <1>;
#size-cells = <0>;
dsi1_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
backlight = <&backlight1>;
reset-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
enable-delay-ms = <35>;
prepare-delay-ms = <6>;
reset-delay-ms = <0>;
init-delay-ms = <20>;
unprepare-delay-ms = <0>;
disable-delay-ms = <20>;
size,width = <74>;
size,height = <133>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
39 05 04 FF 98 81 03
15 05 02 01 00
15 05 02 02 00
15 05 02 03 53
15 05 02 04 D3
15 05 02 05 00
15 05 02 06 0D
15 05 02 07 08
15 05 02 08 00
15 05 02 09 00
15 05 02 0a 00
15 05 02 0b 00
15 05 02 0c 00
15 05 02 0d 00
15 05 02 0e 00
15 05 02 0f 28
15 05 02 10 28
15 05 02 11 00
15 05 02 12 00
15 05 02 13 00
15 05 02 14 00
15 05 02 15 00
15 05 02 16 00
15 05 02 17 00
15 05 02 18 00
15 05 02 19 00
15 05 02 1a 00
15 05 02 1b 00
15 05 02 1d 00
15 05 02 1e 40
15 05 02 1f 80
15 05 02 20 06
15 05 02 21 01
15 05 02 22 00
15 05 02 23 00
15 05 02 24 00
15 05 02 25 00
15 05 02 26 00
15 05 02 27 00
15 05 02 28 33
15 05 02 29 33
15 05 02 2a 00
15 05 02 2b 00
15 05 02 2c 00
15 05 02 2d 00
15 05 02 2e 00
15 05 02 2f 00
15 05 02 30 00
15 05 02 31 00
15 05 02 32 00
15 05 02 33 00
15 05 02 34 03
15 05 02 35 00
15 05 02 36 00
15 05 02 37 00
15 05 02 38 96
15 05 02 39 00
15 05 02 3a 00
15 05 02 3b 00
15 05 02 3c 00
15 05 02 3d 00
15 05 02 3e 00
15 05 02 3f 00
15 05 02 40 00
15 05 02 41 00
15 05 02 42 00
15 05 02 43 00
15 05 02 44 00
15 05 02 50 00
15 05 02 51 23
15 05 02 52 45
15 05 02 53 67
15 05 02 54 89
15 05 02 55 AB
15 05 02 56 01
15 05 02 57 23
15 05 02 58 45
15 05 02 59 67
15 05 02 5a 89
15 05 02 5b AB
15 05 02 5c CD
15 05 02 5d EF
15 05 02 5e 00
15 05 02 5f 08
15 05 02 60 08
15 05 02 61 06
15 05 02 62 06
15 05 02 63 01
15 05 02 64 01
15 05 02 65 00
15 05 02 66 00
15 05 02 67 02
15 05 02 68 15
15 05 02 69 15
15 05 02 6a 14
15 05 02 6b 14
15 05 02 6c 0D
15 05 02 6d 0D
15 05 02 6e 0C
15 05 02 6f 0C
15 05 02 70 0F
15 05 02 71 0F
15 05 02 72 0E
15 05 02 73 0E
15 05 02 74 02
15 05 02 75 08
15 05 02 76 08
15 05 02 77 06
15 05 02 78 06
15 05 02 79 01
15 05 02 7a 01
15 05 02 7b 00
15 05 02 7c 00
15 05 02 7d 02
15 05 02 7e 15
15 05 02 7f 15
15 05 02 80 14
15 05 02 81 14
15 05 02 82 0D
15 05 02 83 0D
15 05 02 84 0C
15 05 02 85 0C
15 05 02 86 0F
15 05 02 87 0F
15 05 02 88 0E
15 05 02 89 0E
15 05 02 8A 02
39 05 04 FF 98 81 04
15 05 02 6E 2B
15 05 02 6F 37
15 05 02 3A 24
15 05 02 8D 1A
15 05 02 87 BA
15 05 02 B2 D1
15 05 02 88 0B
15 05 02 38 01
15 05 02 39 00
15 05 02 B5 02
15 05 02 31 25
15 05 02 3B 98
39 05 04 FF 98 81 01
15 05 02 22 0A
15 05 02 31 00
15 05 02 53 3D
15 05 02 55 3D
15 05 02 50 B5
15 05 02 51 AD
15 05 02 60 06
15 05 02 62 20
15 05 02 A0 00
15 05 02 A1 21
15 05 02 A2 35
15 05 02 A3 19
15 05 02 A4 1E
15 05 02 A5 33
15 05 02 A6 27
15 05 02 A7 26
15 05 02 A8 AF
15 05 02 A9 1B
15 05 02 AA 27
15 05 02 AB 8D
15 05 02 AC 1A
15 05 02 AD 1B
15 05 02 AE 50
15 05 02 AF 26
15 05 02 B0 2B
15 05 02 B1 54
15 05 02 B2 5E
15 05 02 B3 23
15 05 02 C0 00
15 05 02 C1 21
15 05 02 C2 35
15 05 02 C3 19
15 05 02 C4 1E
15 05 02 C5 33
15 05 02 C6 27
15 05 02 C7 26
15 05 02 C8 AF
15 05 02 C9 1B
15 05 02 CA 27
15 05 02 CB 8D
15 05 02 CC 1A
15 05 02 CD 1B
15 05 02 CE 50
15 05 02 CF 26
15 05 02 D0 2B
15 05 02 D1 54
15 05 02 D2 5E
15 05 02 D3 23
39 05 04 FF 98 81 00
15 78 02 11 00
15 05 02 29 00
];
panel-exit-sequence = [
05 78 01 28
05 00 01 10
];
disp_timings: display-timings {
native-mode = <&dsi1_timing>;
dsi1_timing: timing {
clock-frequency = <67000000>;
hactive = <800>;
vactive = <1280>;
hsync-len = <24>;
hback-porch = <24>;
hfront-porch = <12>;
vsync-len = <2>;
vback-porch = <9>;
vfront-porch = <7>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi1: endpoint {
remote-endpoint = <&dsi1_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi1_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi1>;
};
};
};
};
};
fragment@5 {
target = <&i2c3>;
target = <&dsi1_panel>;
__overlay__ {
status = "okay";
clock-frequency = <100000>;
#address-cells = <1>;
#size-cells = <0>;
gt928: gt928@5d {
status = "okay";
compatible = "goodix,gt928";
reg = <0x5d>;
interrupt-parent = <&gpio3>;
interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
irq-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipi_dsi1_irq>;
touchscreen-inverted-y;
enable-delay-ms = <35>;
prepare-delay-ms = <6>;
reset-delay-ms = <0>;
init-delay-ms = <20>;
unprepare-delay-ms = <0>;
disable-delay-ms = <20>;
size,width = <74>;
size,height = <133>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
39 05 04 FF 98 81 03
15 05 02 01 00
15 05 02 02 00
15 05 02 03 53
15 05 02 04 D3
15 05 02 05 00
15 05 02 06 0D
15 05 02 07 08
15 05 02 08 00
15 05 02 09 00
15 05 02 0a 00
15 05 02 0b 00
15 05 02 0c 00
15 05 02 0d 00
15 05 02 0e 00
15 05 02 0f 28
15 05 02 10 28
15 05 02 11 00
15 05 02 12 00
15 05 02 13 00
15 05 02 14 00
15 05 02 15 00
15 05 02 16 00
15 05 02 17 00
15 05 02 18 00
15 05 02 19 00
15 05 02 1a 00
15 05 02 1b 00
15 05 02 1d 00
15 05 02 1e 40
15 05 02 1f 80
15 05 02 20 06
15 05 02 21 01
15 05 02 22 00
15 05 02 23 00
15 05 02 24 00
15 05 02 25 00
15 05 02 26 00
15 05 02 27 00
15 05 02 28 33
15 05 02 29 33
15 05 02 2a 00
15 05 02 2b 00
15 05 02 2c 00
15 05 02 2d 00
15 05 02 2e 00
15 05 02 2f 00
15 05 02 30 00
15 05 02 31 00
15 05 02 32 00
15 05 02 33 00
15 05 02 34 03
15 05 02 35 00
15 05 02 36 00
15 05 02 37 00
15 05 02 38 96
15 05 02 39 00
15 05 02 3a 00
15 05 02 3b 00
15 05 02 3c 00
15 05 02 3d 00
15 05 02 3e 00
15 05 02 3f 00
15 05 02 40 00
15 05 02 41 00
15 05 02 42 00
15 05 02 43 00
15 05 02 44 00
15 05 02 50 00
15 05 02 51 23
15 05 02 52 45
15 05 02 53 67
15 05 02 54 89
15 05 02 55 AB
15 05 02 56 01
15 05 02 57 23
15 05 02 58 45
15 05 02 59 67
15 05 02 5a 89
15 05 02 5b AB
15 05 02 5c CD
15 05 02 5d EF
15 05 02 5e 00
15 05 02 5f 08
15 05 02 60 08
15 05 02 61 06
15 05 02 62 06
15 05 02 63 01
15 05 02 64 01
15 05 02 65 00
15 05 02 66 00
15 05 02 67 02
15 05 02 68 15
15 05 02 69 15
15 05 02 6a 14
15 05 02 6b 14
15 05 02 6c 0D
15 05 02 6d 0D
15 05 02 6e 0C
15 05 02 6f 0C
15 05 02 70 0F
15 05 02 71 0F
15 05 02 72 0E
15 05 02 73 0E
15 05 02 74 02
15 05 02 75 08
15 05 02 76 08
15 05 02 77 06
15 05 02 78 06
15 05 02 79 01
15 05 02 7a 01
15 05 02 7b 00
15 05 02 7c 00
15 05 02 7d 02
15 05 02 7e 15
15 05 02 7f 15
15 05 02 80 14
15 05 02 81 14
15 05 02 82 0D
15 05 02 83 0D
15 05 02 84 0C
15 05 02 85 0C
15 05 02 86 0F
15 05 02 87 0F
15 05 02 88 0E
15 05 02 89 0E
15 05 02 8A 02
39 05 04 FF 98 81 04
15 05 02 6E 2B
15 05 02 6F 37
15 05 02 3A 24
15 05 02 8D 1A
15 05 02 87 BA
15 05 02 B2 D1
15 05 02 88 0B
15 05 02 38 01
15 05 02 39 00
15 05 02 B5 02
15 05 02 31 25
15 05 02 3B 98
39 05 04 FF 98 81 01
15 05 02 22 0A
15 05 02 31 00
15 05 02 53 3D
15 05 02 55 3D
15 05 02 50 B5
15 05 02 51 AD
15 05 02 60 06
15 05 02 62 20
15 05 02 A0 00
15 05 02 A1 21
15 05 02 A2 35
15 05 02 A3 19
15 05 02 A4 1E
15 05 02 A5 33
15 05 02 A6 27
15 05 02 A7 26
15 05 02 A8 AF
15 05 02 A9 1B
15 05 02 AA 27
15 05 02 AB 8D
15 05 02 AC 1A
15 05 02 AD 1B
15 05 02 AE 50
15 05 02 AF 26
15 05 02 B0 2B
15 05 02 B1 54
15 05 02 B2 5E
15 05 02 B3 23
15 05 02 C0 00
15 05 02 C1 21
15 05 02 C2 35
15 05 02 C3 19
15 05 02 C4 1E
15 05 02 C5 33
15 05 02 C6 27
15 05 02 C7 26
15 05 02 C8 AF
15 05 02 C9 1B
15 05 02 CA 27
15 05 02 CB 8D
15 05 02 CC 1A
15 05 02 CD 1B
15 05 02 CE 50
15 05 02 CF 26
15 05 02 D0 2B
15 05 02 D1 54
15 05 02 D2 5E
15 05 02 D3 23
39 05 04 FF 98 81 00
15 78 02 11 00
15 05 02 29 00
];
panel-exit-sequence = [
05 78 01 28
05 00 01 10
];
disp_timings: display-timings {
native-mode = <&dsi1_timing>;
dsi1_timing: timing {
clock-frequency = <67000000>;
hactive = <800>;
vactive = <1280>;
hsync-len = <24>;
hback-porch = <24>;
hfront-porch = <12>;
vsync-len = <2>;
vback-porch = <9>;
vfront-porch = <7>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
};
};
fragment@6 {
target = <&i2c5>;
__overlay__ {
status = "okay";
};
};
fragment@7 {
target = <&gt928_dsi1>;
__overlay__ {
status = "okay";
};
};
fragment@8 {
target = <&route_hdmi>;
__overlay__ {
@ -348,7 +314,7 @@
};
};
fragment@7 {
fragment@9 {
target = <&hdmi_in_vp0>;
__overlay__ {
@ -356,7 +322,7 @@
};
};
fragment@8 {
fragment@10 {
target = <&hdmi_in_vp1>;
__overlay__ {
@ -364,7 +330,7 @@
};
};
fragment@9 {
fragment@11 {
target = <&hdmi>;
__overlay__ {

189
arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-2-dsi1-in-vp0-1080p-overlay.dts
View File

@ -46,127 +46,94 @@
__overlay__ {
status = "okay";
power-supply = <&mipi_dsi1_power>;
#address-cells = <1>;
#size-cells = <0>;
dsi1_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
backlight = <&backlight1>;
reset-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
enable-delay-ms = <35>;
prepare-delay-ms = <6>;
reset-delay-ms = <0>;
init-delay-ms = <20>;
unprepare-delay-ms = <0>;
disable-delay-ms = <20>;
size,width = <74>;
size,height = <133>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
39 00 04 B9 FF 83 99
15 00 02 D2 77
39 00 10 B1 02 04 74 94 01 32 33 11 11 AB 4D 56 73 02 02
39 00 10 B2 00 80 80 AE 05 07 5A 11 00 00 10 1E 70 03 D4
15 00 02 36 02
39 00 2D B4 00 FF 02 C0 02 C0 00 00 08 00 04 06 00 32 04 0A 08 21 03 01 00 0F B8 8B 02 C0 02 C0 00 00 08 00 04 06 00 32 04 0A 08 01 00 0F B8 01
39 05 22 D3 00 00 00 00 00 00 06 00 00 10 04 00 04 00 00 00 00 00 00 00 00 00 00 01 00 05 05 07 00 00 00 05 40
39 05 21 D5 18 18 19 19 18 18 21 20 01 00 07 06 05 04 03 02 18 18 18 18 18 18 2F 2F 30 30 31 31 18 18 18 18
39 05 21 D6 18 18 19 19 40 40 20 21 06 07 00 01 02 03 04 05 40 40 40 40 40 40 2F 2F 30 30 31 31 40 40 40 40
39 00 11 D8 A2 AA 02 A0 A2 A8 02 A0 B0 00 00 00 B0 00 00 00
15 00 02 BD 01
39 00 11 D8 B0 00 00 00 B0 00 00 00 E2 AA 03 F0 E2 AA 03 F0
15 00 02 BD 02
39 00 09 D8 E2 AA 03 F0 E2 AA 03 F0
15 00 02 BD 00
39 00 03 B6 8D 8D
39 05 37 E0 00 0E 19 13 2E 39 48 44 4D 57 5F 66 6C 76 7F 85 8A 95 9A A4 9B AB B0 5C 58 64 77 00 0E 19 13 2E 39 48 44 4D 57 5F 66 6C 76 7F 85 8A 95 9A A4 9B AB B0 5C 58 64 77
05 C8 01 11
05 C8 01 29
];
panel-exit-sequence = [
05 78 01 28
05 00 01 10
];
disp_timings: display-timings {
native-mode = <&dsi1_timing>;
dsi1_timing: timing {
clock-frequency = <131376000>;
hactive = <1080>;
vactive = <1920>;
hsync-len = <10>;
hback-porch = <20>;
hfront-porch = <10>;
vsync-len = <5>;
vback-porch = <20>;
vfront-porch = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi1: endpoint {
remote-endpoint = <&dsi1_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi1_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi1>;
};
};
};
};
};
fragment@5 {
target = <&i2c3>;
target = <&dsi1_panel>;
__overlay__ {
status = "okay";
clock-frequency = <100000>;
#address-cells = <1>;
#size-cells = <0>;
gt911: gt911@5d {
status = "okay";
compatible = "goodix,gt911";
reg = <0x5d>;
interrupt-parent = <&gpio3>;
interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
irq-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
touchscreen-inverted-x = <1>;
touchscreen-inverted-y = <1>;
enable-delay-ms = <35>;
prepare-delay-ms = <6>;
reset-delay-ms = <0>;
init-delay-ms = <20>;
unprepare-delay-ms = <0>;
disable-delay-ms = <20>;
size,width = <74>;
size,height = <133>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
39 00 04 B9 FF 83 99
15 00 02 D2 77
39 00 10 B1 02 04 74 94 01 32 33 11 11 AB 4D 56 73 02 02
39 00 10 B2 00 80 80 AE 05 07 5A 11 00 00 10 1E 70 03 D4
15 00 02 36 02
39 00 2D B4 00 FF 02 C0 02 C0 00 00 08 00 04 06 00 32 04 0A 08 21 03 01 00 0F B8 8B 02 C0 02 C0 00 00 08 00 04 06 00 32 04 0A 08 01 00 0F B8 01
39 05 22 D3 00 00 00 00 00 00 06 00 00 10 04 00 04 00 00 00 00 00 00 00 00 00 00 01 00 05 05 07 00 00 00 05 40
39 05 21 D5 18 18 19 19 18 18 21 20 01 00 07 06 05 04 03 02 18 18 18 18 18 18 2F 2F 30 30 31 31 18 18 18 18
39 05 21 D6 18 18 19 19 40 40 20 21 06 07 00 01 02 03 04 05 40 40 40 40 40 40 2F 2F 30 30 31 31 40 40 40 40
39 00 11 D8 A2 AA 02 A0 A2 A8 02 A0 B0 00 00 00 B0 00 00 00
15 00 02 BD 01
39 00 11 D8 B0 00 00 00 B0 00 00 00 E2 AA 03 F0 E2 AA 03 F0
15 00 02 BD 02
39 00 09 D8 E2 AA 03 F0 E2 AA 03 F0
15 00 02 BD 00
39 00 03 B6 8D 8D
39 05 37 E0 00 0E 19 13 2E 39 48 44 4D 57 5F 66 6C 76 7F 85 8A 95 9A A4 9B AB B0 5C 58 64 77 00 0E 19 13 2E 39 48 44 4D 57 5F 66 6C 76 7F 85 8A 95 9A A4 9B AB B0 5C 58 64 77
05 C8 01 11
05 C8 01 29
];
panel-exit-sequence = [
05 78 01 28
05 00 01 10
];
disp_timings: display-timings {
native-mode = <&dsi1_timing>;
dsi1_timing: timing {
clock-frequency = <131376000>;
hactive = <1080>;
vactive = <1920>;
hsync-len = <10>;
hback-porch = <20>;
hfront-porch = <10>;
vsync-len = <5>;
vback-porch = <20>;
vfront-porch = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
};
};
fragment@6 {
target = <&i2c5>;
__overlay__ {
status = "okay";
};
};
fragment@7 {
target = <&gt911_dsi1>;
__overlay__ {
status = "okay";
};
};
fragment@8 {
target = <&route_hdmi>;
__overlay__ {
@ -174,7 +141,7 @@
};
};
fragment@7 {
fragment@9 {
target = <&hdmi_in_vp0>;
__overlay__ {
@ -182,7 +149,7 @@
};
};
fragment@8 {
fragment@10 {
target = <&hdmi_in_vp1>;
__overlay__ {
@ -190,7 +157,7 @@
};
};
fragment@9 {
fragment@11 {
target = <&hdmi>;
__overlay__ {

165
arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-2-dsi1-in-vp0-7.0-1024x600-overlay.dts
View File

@ -46,115 +46,82 @@
__overlay__ {
status = "okay";
power-supply = <&mipi_dsi1_power>;
#address-cells = <1>;
#size-cells = <0>;
dsi1_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
backlight = <&backlight1>;
reset-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
enable-delay-ms = <35>;
prepare-delay-ms = <6>;
reset-delay-ms = <0>;
init-delay-ms = <20>;
unprepare-delay-ms = <0>;
disable-delay-ms = <20>;
size,width = <74>;
size,height = <133>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
15 00 02 80 AC
15 00 02 81 B8
15 00 02 82 09
15 00 02 83 78
15 00 02 84 7f
15 00 02 85 bb
15 00 02 86 70
];
panel-exit-sequence = [
05 78 01 28
05 00 01 10
];
disp_timings: display-timings {
native-mode = <&dsi1_timing>;
dsi1_timing: timing {
clock-frequency = <51669000>;
hactive = <1024>;
vactive = <600>;
hsync-len = <10>;
hback-porch = <160>;
hfront-porch = <160>;
vsync-len = <1>;
vback-porch = <23>;
vfront-porch = <12>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi1: endpoint {
remote-endpoint = <&dsi1_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi1_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi1>;
};
};
};
};
};
fragment@5 {
target = <&i2c3>;
target = <&dsi1_panel>;
__overlay__ {
status = "okay";
clock-frequency = <100000>;
#address-cells = <1>;
#size-cells = <0>;
gt911: gt911@5d {
status = "okay";
compatible = "goodix,gt911";
reg = <0x5d>;
interrupt-parent = <&gpio3>;
interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
irq-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
touchscreen-inverted-x = <1>;
touchscreen-inverted-y = <1>;
enable-delay-ms = <35>;
prepare-delay-ms = <6>;
reset-delay-ms = <0>;
init-delay-ms = <20>;
unprepare-delay-ms = <0>;
disable-delay-ms = <20>;
size,width = <74>;
size,height = <133>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
15 00 02 80 AC
15 00 02 81 B8
15 00 02 82 09
15 00 02 83 78
15 00 02 84 7f
15 00 02 85 bb
15 00 02 86 70
];
panel-exit-sequence = [
05 78 01 28
05 00 01 10
];
disp_timings: display-timings {
native-mode = <&dsi1_timing>;
dsi1_timing: timing {
clock-frequency = <51669000>;
hactive = <1024>;
vactive = <600>;
hsync-len = <10>;
hback-porch = <160>;
hfront-porch = <160>;
vsync-len = <1>;
vback-porch = <23>;
vfront-porch = <12>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
};
};
fragment@6 {
target = <&i2c5>;
__overlay__ {
status = "okay";
};
};
fragment@7 {
target = <&gt911_dsi1>;
__overlay__ {
status = "okay";
};
};
fragment@8 {
target = <&route_hdmi>;
__overlay__ {
@ -162,7 +129,7 @@
};
};
fragment@7 {
fragment@9 {
target = <&hdmi_in_vp0>;
__overlay__ {
@ -170,7 +137,7 @@
};
};
fragment@8 {
fragment@10 {
target = <&hdmi_in_vp1>;
__overlay__ {
@ -178,7 +145,7 @@
};
};
fragment@9 {
fragment@11 {
target = <&hdmi>;
__overlay__ {

80
arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-2-dsi1-in-vp0-rpi-overlay.dts
View File

@ -46,65 +46,43 @@
__overlay__ {
status = "okay";
power-supply = <&mipi_dsi1_power>;
#address-cells = <1>;
#size-cells = <0>;
dsi1_panel: panel@0 {
compatible = "rockpi,tc358762";
reg = <0x0>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi1: endpoint {
remote-endpoint = <&dsi1_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi1_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi1>;
};
};
};
};
};
fragment@5 {
target = <&i2c3>;
target = <&dsi1_panel>;
__overlay__ {
compatible = "rockpi,tc358762";
status = "okay";
clock-frequency = <100000>;
#address-cells = <1>;
#size-cells = <0>;
rockpi_mcu_1: rockpi-mcu@45 {
compatible = "rockpi_mcu";
reg = <0x45>;
status = "okay";
};
rockpi_ft5406_1: rockpi_ft5406@38 {
compatible = "rockpi_ft5406";
reg = <0x38>;
status = "okay";
};
};
};
fragment@6 {
target = <&i2c1>;
__overlay__ {
status = "okay";
};
};
fragment@7 {
target = <&rockpi_mcu_1>;
__overlay__ {
status = "okay";
};
};
fragment@8 {
target = <&rockpi_ft5406_1>;
__overlay__ {
status = "okay";
};
};
fragment@9 {
target = <&route_hdmi>;
__overlay__ {
@ -112,7 +90,7 @@
};
};
fragment@7 {
fragment@10 {
target = <&hdmi_in_vp0>;
__overlay__ {
@ -120,7 +98,7 @@
};
};
fragment@8 {
fragment@11 {
target = <&hdmi_in_vp1>;
__overlay__ {
@ -128,7 +106,7 @@
};
};
fragment@9 {
fragment@12 {
target = <&hdmi>;
__overlay__ {

340
arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-2io-dsi0-in-vp0-10.1-800x1280-overlay.dts
View File

@ -1,340 +0,0 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
fragment@0 {
target = <&route_dis0>;
__overlay__ {
status = "okay";
connect = <&vp0_out_dis0>;
};
};
fragment@1 {
target = <&video_phy0>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&dis0_in_vp0>;
__overlay__ {
status = "okay";
};
};
fragment@3 {
target = <&dis0_in_vp1>;
__overlay__ {
status = "disabled";
};
};
fragment@4 {
target = <&dis0>;
__overlay__ {
status = "okay";
power-supply = <&mipi_dis0_power>;
#address-cells = <1>;
#size-cells = <0>;
dis0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
backlight = <&backlight0>;
reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
enable-delay-ms = <35>;
prepare-delay-ms = <6>;
reset-delay-ms = <0>;
init-delay-ms = <20>;
unprepare-delay-ms = <0>;
disable-delay-ms = <20>;
size,width = <74>;
size,height = <133>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
39 05 04 FF 98 81 03
15 05 02 01 00
15 05 02 02 00
15 05 02 03 53
15 05 02 04 D3
15 05 02 05 00
15 05 02 06 0D
15 05 02 07 08
15 05 02 08 00
15 05 02 09 00
15 05 02 0a 00
15 05 02 0b 00
15 05 02 0c 00
15 05 02 0d 00
15 05 02 0e 00
15 05 02 0f 28
15 05 02 10 28
15 05 02 11 00
15 05 02 12 00
15 05 02 13 00
15 05 02 14 00
15 05 02 15 00
15 05 02 16 00
15 05 02 17 00
15 05 02 18 00
15 05 02 19 00
15 05 02 1a 00
15 05 02 1b 00
15 05 02 1d 00
15 05 02 1e 40
15 05 02 1f 80
15 05 02 20 06
15 05 02 21 01
15 05 02 22 00
15 05 02 23 00
15 05 02 24 00
15 05 02 25 00
15 05 02 26 00
15 05 02 27 00
15 05 02 28 33
15 05 02 29 33
15 05 02 2a 00
15 05 02 2b 00
15 05 02 2c 00
15 05 02 2d 00
15 05 02 2e 00
15 05 02 2f 00
15 05 02 30 00
15 05 02 31 00
15 05 02 32 00
15 05 02 33 00
15 05 02 34 03
15 05 02 35 00
15 05 02 36 00
15 05 02 37 00
15 05 02 38 96
15 05 02 39 00
15 05 02 3a 00
15 05 02 3b 00
15 05 02 3c 00
15 05 02 3d 00
15 05 02 3e 00
15 05 02 3f 00
15 05 02 40 00
15 05 02 41 00
15 05 02 42 00
15 05 02 43 00
15 05 02 44 00
15 05 02 50 00
15 05 02 51 23
15 05 02 52 45
15 05 02 53 67
15 05 02 54 89
15 05 02 55 AB
15 05 02 56 01
15 05 02 57 23
15 05 02 58 45
15 05 02 59 67
15 05 02 5a 89
15 05 02 5b AB
15 05 02 5c CD
15 05 02 5d EF
15 05 02 5e 00
15 05 02 5f 08
15 05 02 60 08
15 05 02 61 06
15 05 02 62 06
15 05 02 63 01
15 05 02 64 01
15 05 02 65 00
15 05 02 66 00
15 05 02 67 02
15 05 02 68 15
15 05 02 69 15
15 05 02 6a 14
15 05 02 6b 14
15 05 02 6c 0D
15 05 02 6d 0D
15 05 02 6e 0C
15 05 02 6f 0C
15 05 02 70 0F
15 05 02 71 0F
15 05 02 72 0E
15 05 02 73 0E
15 05 02 74 02
15 05 02 75 08
15 05 02 76 08
15 05 02 77 06
15 05 02 78 06
15 05 02 79 01
15 05 02 7a 01
15 05 02 7b 00
15 05 02 7c 00
15 05 02 7d 02
15 05 02 7e 15
15 05 02 7f 15
15 05 02 80 14
15 05 02 81 14
15 05 02 82 0D
15 05 02 83 0D
15 05 02 84 0C
15 05 02 85 0C
15 05 02 86 0F
15 05 02 87 0F
15 05 02 88 0E
15 05 02 89 0E
15 05 02 8A 02
39 05 04 FF 98 81 04
15 05 02 6E 2B
15 05 02 6F 37
15 05 02 3A 24
15 05 02 8D 1A
15 05 02 87 BA
15 05 02 B2 D1
15 05 02 88 0B
15 05 02 38 01
15 05 02 39 00
15 05 02 B5 02
15 05 02 31 25
15 05 02 3B 98
39 05 04 FF 98 81 01
15 05 02 22 0A
15 05 02 31 00
15 05 02 53 3D
15 05 02 55 3D
15 05 02 50 B5
15 05 02 51 AD
15 05 02 60 06
15 05 02 62 20
15 05 02 A0 00
15 05 02 A1 21
15 05 02 A2 35
15 05 02 A3 19
15 05 02 A4 1E
15 05 02 A5 33
15 05 02 A6 27
15 05 02 A7 26
15 05 02 A8 AF
15 05 02 A9 1B
15 05 02 AA 27
15 05 02 AB 8D
15 05 02 AC 1A
15 05 02 AD 1B
15 05 02 AE 50
15 05 02 AF 26
15 05 02 B0 2B
15 05 02 B1 54
15 05 02 B2 5E
15 05 02 B3 23
15 05 02 C0 00
15 05 02 C1 21
15 05 02 C2 35
15 05 02 C3 19
15 05 02 C4 1E
15 05 02 C5 33
15 05 02 C6 27
15 05 02 C7 26
15 05 02 C8 AF
15 05 02 C9 1B
15 05 02 CA 27
15 05 02 CB 8D
15 05 02 CC 1A
15 05 02 CD 1B
15 05 02 CE 50
15 05 02 CF 26
15 05 02 D0 2B
15 05 02 D1 54
15 05 02 D2 5E
15 05 02 D3 23
39 05 04 FF 98 81 00
15 78 02 11 00
15 05 02 29 00
];
panel-exit-sequence = [
05 78 01 28
05 00 01 10
];
disp_timings: display-timings {
native-mode = <&dis0_timing>;
dis0_timing: timing {
clock-frequency = <67000000>;
hactive = <800>;
vactive = <1280>;
hsync-len = <24>;
hback-porch = <24>;
hfront-porch = <12>;
vsync-len = <2>;
vback-porch = <9>;
vfront-porch = <7>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dis0: endpoint {
remote-endpoint = <&dis0_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dis0_out_panel: endpoint {
remote-endpoint = <&panel_in_dis0>;
};
};
};
};
};
fragment@5 {
target = <&i2c1>;
__overlay__ {
status = "okay";
clock-frequency = <100000>;
#address-cells = <1>;
#size-cells = <0>;
gt928: gt928@5d {
status = "okay";
compatible = "goodix,gt928";
reg = <0x5d>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PA0 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
irq-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
touchscreen-inverted-y;
};
};
};
};

198
arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-2io-dsi0-in-vp0-1080p-overlay.dts
View File

@ -1,198 +0,0 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
fragment@0 {
target = <&route_dsi0>;
__overlay__ {
status = "okay";
connect = <&vp0_out_dsi0>;
};
};
fragment@1 {
target = <&video_phy0>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&dsi0_in_vp0>;
__overlay__ {
status = "okay";
};
};
fragment@3 {
target = <&dsi0_in_vp1>;
__overlay__ {
status = "disabled";
};
};
fragment@4 {
target = <&dsi0>;
__overlay__ {
status = "okay";
power-supply = <&mipi_dsi0_power>;
#address-cells = <1>;
#size-cells = <0>;
dsi0_panel: panel@0 {
compatible = "simple-panel-dsi";
reg = <0>;
backlight = <&backlight0>;
reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
enable-delay-ms = <35>;
prepare-delay-ms = <6>;
reset-delay-ms = <0>;
init-delay-ms = <20>;
unprepare-delay-ms = <0>;
disable-delay-ms = <20>;
size,width = <74>;
size,height = <133>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
39 00 04 B9 FF 83 99
15 00 02 D2 77
39 00 10 B1 02 04 74 94 01 32 33 11 11 AB 4D 56 73 02 02
39 00 10 B2 00 80 80 AE 05 07 5A 11 00 00 10 1E 70 03 D4
15 00 02 36 02
39 00 2D B4 00 FF 02 C0 02 C0 00 00 08 00 04 06 00 32 04 0A 08 21 03 01 00 0F B8 8B 02 C0 02 C0 00 00 08 00 04 06 00 32 04 0A 08 01 00 0F B8 01
39 05 22 D3 00 00 00 00 00 00 06 00 00 10 04 00 04 00 00 00 00 00 00 00 00 00 00 01 00 05 05 07 00 00 00 05 40
39 05 21 D5 18 18 19 19 18 18 21 20 01 00 07 06 05 04 03 02 18 18 18 18 18 18 2F 2F 30 30 31 31 18 18 18 18
39 05 21 D6 18 18 19 19 40 40 20 21 06 07 00 01 02 03 04 05 40 40 40 40 40 40 2F 2F 30 30 31 31 40 40 40 40
39 00 11 D8 A2 AA 02 A0 A2 A8 02 A0 B0 00 00 00 B0 00 00 00
15 00 02 BD 01
39 00 11 D8 B0 00 00 00 B0 00 00 00 E2 AA 03 F0 E2 AA 03 F0
15 00 02 BD 02
39 00 09 D8 E2 AA 03 F0 E2 AA 03 F0
15 00 02 BD 00
39 00 03 B6 8D 8D
39 05 37 E0 00 0E 19 13 2E 39 48 44 4D 57 5F 66 6C 76 7F 85 8A 95 9A A4 9B AB B0 5C 58 64 77 00 0E 19 13 2E 39 48 44 4D 57 5F 66 6C 76 7F 85 8A 95 9A A4 9B AB B0 5C 58 64 77
05 C8 01 11
05 C8 01 29
];
panel-exit-sequence = [
05 78 01 28
05 00 01 10
];
disp_timing: display-timings {
native-mode = <&dsi0_timing>;
dsi0_timing: dsi0_timing {
clock-frequency = <131376000>;
hactive = <1080>;
vactive = <1920>;
hsync-len = <10>;
hback-porch = <20>;
hfront-porch = <10>;
vsync-len = <5>;
vback-porch = <20>;
vfront-porch = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi0: endpoint {
remote-endpoint = <&dsi0_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi0_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi0>;
};
};
};
};
};
fragment@5 {
target = <&i2c1>;
__overlay__ {
status = "okay";
clock-frequency = <100000>;
#address-cells = <1>;
#size-cells = <0>;
gt911: gt911@5d {
status = "okay";
compatible = "goodix,gt911";
reg = <0x5d>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PA0 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
irq-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
touchscreen-inverted-x = <1>;
touchscreen-inverted-y = <1>;
};
};
};
fragment@6 {
target = <&route_hdmi>;
__overlay__ {
status = "disabled";
};
};
fragment@7 {
target = <&hdmi_in_vp0>;
__overlay__ {
status = "disabled";
};
};
fragment@8 {
target = <&hdmi_in_vp1>;
__overlay__ {
status = "disabled";
};
};
fragment@9 {
target = <&hdmi>;
__overlay__ {
status = "disabled";
};
};
};

156
arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-2io-dsi0-in-vp0-7.0-1024x600-overlay.dts
View File

@ -1,156 +0,0 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
fragment@0 {
target = <&route_dsi0>;
__overlay__ {
status = "okay";
connect = <&vp0_out_dsi0>;
};
};
fragment@1 {
target = <&video_phy0>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&dis0_in_vp0>;
__overlay__ {
status = "okay";
};
};
fragment@3 {
target = <&dis0_in_vp1>;
__overlay__ {
status = "disabled";
};
};
fragment@4 {
target = <&dis0>;
__overlay__ {
status = "okay";
power-supply = <&mipi_dis0_power>;
#address-cells = <1>;
#size-cells = <0>;
dis0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
backlight = <&backlight0>;
reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
enable-delay-ms = <35>;
prepare-delay-ms = <6>;
reset-delay-ms = <0>;
init-delay-ms = <20>;
unprepare-delay-ms = <0>;
disable-delay-ms = <20>;
size,width = <74>;
size,height = <133>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
15 00 02 80 AC
15 00 02 81 B8
15 00 02 82 09
15 00 02 83 78
15 00 02 84 7f
15 00 02 85 bb
15 00 02 86 70
];
panel-exit-sequence = [
05 78 01 28
05 00 01 10
];
disp_timings: display-timings {
native-mode = <&dis0_timing>;
dis0_timing: timing {
clock-frequency = <51669000>;
hactive = <1024>;
vactive = <600>;
hsync-len = <10>;
hback-porch = <160>;
hfront-porch = <160>;
vsync-len = <1>;
vback-porch = <23>;
vfront-porch = <12>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dis0: endpoint {
remote-endpoint = <&dis0_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dis0_out_panel: endpoint {
remote-endpoint = <&panel_in_dis0>;
};
};
};
};
};
fragment@5 {
target = <&i2c1>;
__overlay__ {
status = "okay";
clock-frequency = <100000>;
#address-cells = <1>;
#size-cells = <0>;
gt911: gt911@5d {
status = "okay";
compatible = "goodix,gt911";
reg = <0x5d>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PA0 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
irq-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
touchscreen-inverted-x = <1>;
touchscreen-inverted-y = <1>;
};
};
};
};

138
arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-2io-dsi0-in-vp0-rpi-overlay.dts
View File

@ -1,138 +0,0 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
fragment@0 {
target = <&route_dsi0>;
__overlay__ {
status = "okay";
connect = <&vp0_out_dsi0>;
};
};
fragment@1 {
target = <&video_phy0>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&dsi0_in_vp0>;
__overlay__ {
status = "okay";
};
};
fragment@3 {
target = <&dsi0_in_vp1>;
__overlay__ {
status = "disabled";
};
};
fragment@4 {
target = <&dsi0>;
__overlay__ {
status = "okay";
power-supply = <&mipi_dsi0_power>;
#address-cells = <1>;
#size-cells = <0>;
dsi0_panel: panel@0 {
compatible = "rockpi,tc358762";
reg = <0x0>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi0: endpoint {
remote-endpoint = <&dsi0_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi0_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi0>;
};
};
};
};
};
fragment@5 {
target = <&i2c1>;
__overlay__ {
status = "okay";
clock-frequency = <100000>;
#address-cells = <1>;
#size-cells = <0>;
rockpi_mcu_0: rockpi-mcu@45 {
compatible = "rockpi_mcu";
reg = <0x45>;
status = "okay";
};
rockpi_ft5406_0: rockpi_ft5406@38 {
compatible = "rockpi_ft5406";
reg = <0x38>;
status = "okay";
};
};
};
fragment@6 {
target = <&route_hdmi>;
__overlay__ {
status = "disabled";
};
};
fragment@7 {
target = <&hdmi_in_vp0>;
__overlay__ {
status = "disabled";
};
};
fragment@8 {
target = <&hdmi_in_vp1>;
__overlay__ {
status = "disabled";
};
};
fragment@9 {
target = <&hdmi>;
__overlay__ {
status = "disabled";
};
};
};

340
arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-2io-dsi1-in-vp1-10.1-800x1280-overlay.dts
View File

@ -1,340 +0,0 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
fragment@0 {
target = <&route_dsi1>;
__overlay__ {
status = "okay";
connect = <&vp1_out_dsi1>;
};
};
fragment@1 {
target = <&video_phy1>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&dsi1_in_vp0>;
__overlay__ {
status = "disabled";
};
};
fragment@3 {
target = <&dsi1_in_vp1>;
__overlay__ {
status = "okay";
};
};
fragment@4 {
target = <&dsi1>;
__overlay__ {
status = "okay";
power-supply = <&mipi_dsi1_power>;
#address-cells = <1>;
#size-cells = <0>;
dsi1_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
backlight = <&backlight1>;
reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
enable-delay-ms = <35>;
prepare-delay-ms = <6>;
reset-delay-ms = <0>;
init-delay-ms = <20>;
unprepare-delay-ms = <0>;
disable-delay-ms = <20>;
size,width = <74>;
size,height = <133>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
39 05 04 FF 98 81 03
15 05 02 01 00
15 05 02 02 00
15 05 02 03 53
15 05 02 04 D3
15 05 02 05 00
15 05 02 06 0D
15 05 02 07 08
15 05 02 08 00
15 05 02 09 00
15 05 02 0a 00
15 05 02 0b 00
15 05 02 0c 00
15 05 02 0d 00
15 05 02 0e 00
15 05 02 0f 28
15 05 02 10 28
15 05 02 11 00
15 05 02 12 00
15 05 02 13 00
15 05 02 14 00
15 05 02 15 00
15 05 02 16 00
15 05 02 17 00
15 05 02 18 00
15 05 02 19 00
15 05 02 1a 00
15 05 02 1b 00
15 05 02 1d 00
15 05 02 1e 40
15 05 02 1f 80
15 05 02 20 06
15 05 02 21 01
15 05 02 22 00
15 05 02 23 00
15 05 02 24 00
15 05 02 25 00
15 05 02 26 00
15 05 02 27 00
15 05 02 28 33
15 05 02 29 33
15 05 02 2a 00
15 05 02 2b 00
15 05 02 2c 00
15 05 02 2d 00
15 05 02 2e 00
15 05 02 2f 00
15 05 02 30 00
15 05 02 31 00
15 05 02 32 00
15 05 02 33 00
15 05 02 34 03
15 05 02 35 00
15 05 02 36 00
15 05 02 37 00
15 05 02 38 96
15 05 02 39 00
15 05 02 3a 00
15 05 02 3b 00
15 05 02 3c 00
15 05 02 3d 00
15 05 02 3e 00
15 05 02 3f 00
15 05 02 40 00
15 05 02 41 00
15 05 02 42 00
15 05 02 43 00
15 05 02 44 00
15 05 02 50 00
15 05 02 51 23
15 05 02 52 45
15 05 02 53 67
15 05 02 54 89
15 05 02 55 AB
15 05 02 56 01
15 05 02 57 23
15 05 02 58 45
15 05 02 59 67
15 05 02 5a 89
15 05 02 5b AB
15 05 02 5c CD
15 05 02 5d EF
15 05 02 5e 00
15 05 02 5f 08
15 05 02 60 08
15 05 02 61 06
15 05 02 62 06
15 05 02 63 01
15 05 02 64 01
15 05 02 65 00
15 05 02 66 00
15 05 02 67 02
15 05 02 68 15
15 05 02 69 15
15 05 02 6a 14
15 05 02 6b 14
15 05 02 6c 0D
15 05 02 6d 0D
15 05 02 6e 0C
15 05 02 6f 0C
15 05 02 70 0F
15 05 02 71 0F
15 05 02 72 0E
15 05 02 73 0E
15 05 02 74 02
15 05 02 75 08
15 05 02 76 08
15 05 02 77 06
15 05 02 78 06
15 05 02 79 01
15 05 02 7a 01
15 05 02 7b 00
15 05 02 7c 00
15 05 02 7d 02
15 05 02 7e 15
15 05 02 7f 15
15 05 02 80 14
15 05 02 81 14
15 05 02 82 0D
15 05 02 83 0D
15 05 02 84 0C
15 05 02 85 0C
15 05 02 86 0F
15 05 02 87 0F
15 05 02 88 0E
15 05 02 89 0E
15 05 02 8A 02
39 05 04 FF 98 81 04
15 05 02 6E 2B
15 05 02 6F 37
15 05 02 3A 24
15 05 02 8D 1A
15 05 02 87 BA
15 05 02 B2 D1
15 05 02 88 0B
15 05 02 38 01
15 05 02 39 00
15 05 02 B5 02
15 05 02 31 25
15 05 02 3B 98
39 05 04 FF 98 81 01
15 05 02 22 0A
15 05 02 31 00
15 05 02 53 3D
15 05 02 55 3D
15 05 02 50 B5
15 05 02 51 AD
15 05 02 60 06
15 05 02 62 20
15 05 02 A0 00
15 05 02 A1 21
15 05 02 A2 35
15 05 02 A3 19
15 05 02 A4 1E
15 05 02 A5 33
15 05 02 A6 27
15 05 02 A7 26
15 05 02 A8 AF
15 05 02 A9 1B
15 05 02 AA 27
15 05 02 AB 8D
15 05 02 AC 1A
15 05 02 AD 1B
15 05 02 AE 50
15 05 02 AF 26
15 05 02 B0 2B
15 05 02 B1 54
15 05 02 B2 5E
15 05 02 B3 23
15 05 02 C0 00
15 05 02 C1 21
15 05 02 C2 35
15 05 02 C3 19
15 05 02 C4 1E
15 05 02 C5 33
15 05 02 C6 27
15 05 02 C7 26
15 05 02 C8 AF
15 05 02 C9 1B
15 05 02 CA 27
15 05 02 CB 8D
15 05 02 CC 1A
15 05 02 CD 1B
15 05 02 CE 50
15 05 02 CF 26
15 05 02 D0 2B
15 05 02 D1 54
15 05 02 D2 5E
15 05 02 D3 23
39 05 04 FF 98 81 00
15 78 02 11 00
15 05 02 29 00
];
panel-exit-sequence = [
05 78 01 28
05 00 01 10
];
disp_timings: display-timings {
native-mode = <&dsi1_timing>;
dsi1_timing: timing {
clock-frequency = <67000000>;
hactive = <800>;
vactive = <1280>;
hsync-len = <24>;
hback-porch = <24>;
hfront-porch = <12>;
vsync-len = <2>;
vback-porch = <9>;
vfront-porch = <7>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi1: endpoint {
remote-endpoint = <&dsi1_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi1_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi1>;
};
};
};
};
};
fragment@5 {
target = <&i2c5>;
__overlay__ {
status = "okay";
clock-frequency = <100000>;
#address-cells = <1>;
#size-cells = <0>;
gt928: gt928@5d {
status = "okay";
compatible = "goodix,gt928";
reg = <0x5d>;
interrupt-parent = <&gpio3>;
interrupts = <RK_PA1 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
irq-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
touchscreen-inverted-y;
};
};
};
};

168
arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-2io-dsi1-in-vp1-1080p-overlay.dts
View File

@ -1,168 +0,0 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
fragment@0 {
target = <&route_dsi1>;
__overlay__ {
status = "okay";
connect = <&vp1_out_dsi1>;
};
};
fragment@1 {
target = <&video_phy1>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&dsi1_in_vp0>;
__overlay__ {
status = "disabled";
};
};
fragment@3 {
target = <&dsi1_in_vp1>;
__overlay__ {
status = "okay";
};
};
fragment@4 {
target = <&dsi1>;
__overlay__ {
status = "okay";
power-supply = <&mipi_dsi1_power>;
#address-cells = <1>;
#size-cells = <0>;
dsi1_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
backlight = <&backlight1>;
reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
enable-delay-ms = <35>;
prepare-delay-ms = <6>;
reset-delay-ms = <0>;
init-delay-ms = <20>;
unprepare-delay-ms = <0>;
disable-delay-ms = <20>;
size,width = <74>;
size,height = <133>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
39 00 04 B9 FF 83 99
15 00 02 D2 77
39 00 10 B1 02 04 74 94 01 32 33 11 11 AB 4D 56 73 02 02
39 00 10 B2 00 80 80 AE 05 07 5A 11 00 00 10 1E 70 03 D4
15 00 02 36 02
39 00 2D B4 00 FF 02 C0 02 C0 00 00 08 00 04 06 00 32 04 0A 08 21 03 01 00 0F B8 8B 02 C0 02 C0 00 00 08 00 04 06 00 32 04 0A 08 01 00 0F B8 01
39 05 22 D3 00 00 00 00 00 00 06 00 00 10 04 00 04 00 00 00 00 00 00 00 00 00 00 01 00 05 05 07 00 00 00 05 40
39 05 21 D5 18 18 19 19 18 18 21 20 01 00 07 06 05 04 03 02 18 18 18 18 18 18 2F 2F 30 30 31 31 18 18 18 18
39 05 21 D6 18 18 19 19 40 40 20 21 06 07 00 01 02 03 04 05 40 40 40 40 40 40 2F 2F 30 30 31 31 40 40 40 40
39 00 11 D8 A2 AA 02 A0 A2 A8 02 A0 B0 00 00 00 B0 00 00 00
15 00 02 BD 01
39 00 11 D8 B0 00 00 00 B0 00 00 00 E2 AA 03 F0 E2 AA 03 F0
15 00 02 BD 02
39 00 09 D8 E2 AA 03 F0 E2 AA 03 F0
15 00 02 BD 00
39 00 03 B6 8D 8D
39 05 37 E0 00 0E 19 13 2E 39 48 44 4D 57 5F 66 6C 76 7F 85 8A 95 9A A4 9B AB B0 5C 58 64 77 00 0E 19 13 2E 39 48 44 4D 57 5F 66 6C 76 7F 85 8A 95 9A A4 9B AB B0 5C 58 64 77
05 C8 01 11
05 C8 01 29
];
panel-exit-sequence = [
05 78 01 28
05 00 01 10
];
disp_timings: display-timings {
native-mode = <&dsi1_timing>;
dsi1_timing: timing {
clock-frequency = <131376000>;
hactive = <1080>;
vactive = <1920>;
hsync-len = <10>;
hback-porch = <20>;
hfront-porch = <10>;
vsync-len = <5>;
vback-porch = <20>;
vfront-porch = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi1: endpoint {
remote-endpoint = <&dsi1_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi1_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi1>;
};
};
};
};
};
fragment@5 {
target = <&i2c5>;
__overlay__ {
status = "okay";
clock-frequency = <100000>;
#address-cells = <1>;
#size-cells = <0>;
gt911: gt911@5d {
status = "okay";
compatible = "goodix,gt911";
reg = <0x5d>;
interrupt-parent = <&gpio3>;
interrupts = <RK_PA1 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
irq-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
touchscreen-inverted-x = <1>;
touchscreen-inverted-y = <1>;
};
};
};
};

156
arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-2io-dsi1-in-vp1-7.0-1024x600-overlay.dts
View File

@ -1,156 +0,0 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
fragment@0 {
target = <&route_dsi1>;
__overlay__ {
status = "okay";
connect = <&vp1_out_dsi1>;
};
};
fragment@1 {
target = <&video_phy1>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&dsi1_in_vp0>;
__overlay__ {
status = "disabled";
};
};
fragment@3 {
target = <&dsi1_in_vp1>;
__overlay__ {
status = "okay";
};
};
fragment@4 {
target = <&dsi1>;
__overlay__ {
status = "okay";
power-supply = <&mipi_dsi1_power>;
#address-cells = <1>;
#size-cells = <0>;
dsi1_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
backlight = <&backlight1>;
reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
enable-delay-ms = <35>;
prepare-delay-ms = <6>;
reset-delay-ms = <0>;
init-delay-ms = <20>;
unprepare-delay-ms = <0>;
disable-delay-ms = <20>;
size,width = <74>;
size,height = <133>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
15 00 02 80 AC
15 00 02 81 B8
15 00 02 82 09
15 00 02 83 78
15 00 02 84 7f
15 00 02 85 bb
15 00 02 86 70
];
panel-exit-sequence = [
05 78 01 28
05 00 01 10
];
disp_timings: display-timings {
native-mode = <&dsi1_timing>;
dsi1_timing: timing {
clock-frequency = <51669000>;
hactive = <1024>;
vactive = <600>;
hsync-len = <10>;
hback-porch = <160>;
hfront-porch = <160>;
vsync-len = <1>;
vback-porch = <23>;
vfront-porch = <12>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi1: endpoint {
remote-endpoint = <&dsi1_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi1_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi1>;
};
};
};
};
};
fragment@5 {
target = <&i2c5>;
__overlay__ {
status = "okay";
clock-frequency = <100000>;
#address-cells = <1>;
#size-cells = <0>;
gt911: gt911@5d {
status = "okay";
compatible = "goodix,gt911";
reg = <0x5d>;
interrupt-parent = <&gpio3>;
interrupts = <RK_PA1 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
irq-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
touchscreen-inverted-x = <1>;
touchscreen-inverted-y = <1>;
};
};
};
};

106
arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-2io-dsi1-in-vp1-rpi-overlay.dts
View File

@ -1,106 +0,0 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
fragment@0 {
target = <&route_dsi1>;
__overlay__ {
status = "okay";
connect = <&vp1_out_dsi1>;
};
};
fragment@1 {
target = <&video_phy1>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&dsi1_in_vp0>;
__overlay__ {
status = "disabled";
};
};
fragment@3 {
target = <&dsi1_in_vp1>;
__overlay__ {
status = "okay";
};
};
fragment@4 {
target = <&dsi1>;
__overlay__ {
status = "okay";
power-supply = <&mipi_dsi1_power>;
#address-cells = <1>;
#size-cells = <0>;
dsi1_panel: panel@0 {
compatible = "rockpi,tc358762";
reg = <0x0>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi1: endpoint {
remote-endpoint = <&dsi1_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi1_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi1>;
};
};
};
};
};
fragment@5 {
target = <&i2c5>;
__overlay__ {
status = "okay";
clock-frequency = <100000>;
#address-cells = <1>;
#size-cells = <0>;
rockpi_mcu_1: rockpi-mcu@45 {
compatible = "rockpi_mcu";
reg = <0x45>;
status = "okay";
};
rockpi_ft5406_1: rockpi_ft5406@38 {
compatible = "rockpi_ft5406";
reg = <0x38>;
status = "okay";
};
};
};
};

44
arch/arm64/boot/dts/rockchip/rk3568-lubancat-2io.dts
View File

@ -11,12 +11,8 @@
//MIPI摄像头配置
#include "rk3568-lubancat-csi2-double.dtsi"
// 屏幕设置，通用镜像使用设备树插件
// 以下屏幕配置同时只能使用一个
//开启dsi屏幕时要将本文件中hdmi相关节点全部disabled
// #include "rk3568-lubancat-2io-dsi-1080p.dtsi" //野火5.5寸 1080P
// #include "rk3568-lubancat-2io-dsi-rpi.dtsi" //树莓派 5寸 800x480
// #include "rk3568-lubancat-2io-edp.dtsi" // edp接口屏幕
// MIPI-DSI屏幕
#include "rk3568-lubancat-dsi.dtsi"
/ {
model = "LubanCat-2IO";
@ -674,7 +670,43 @@
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
};
// mipi dsi0 gpio set
&dsi0_panel {
reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
};
&gt911_dsi0 {
interrupt-parent = <&gpio0>;
interrupts = <RK_PA0 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
irq-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
};
&gt928_dsi0 {
interrupt-parent = <&gpio0>;
interrupts = <RK_PA0 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
irq-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
};
// mipi dsi1 gpio set
&dsi1_panel {
reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
};
&gt911_dsi1 {
interrupt-parent = <&gpio3>;
interrupts = <RK_PA1 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
irq-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
};
&gt928_dsi1 {
interrupt-parent = <&gpio3>;
interrupts = <RK_PA1 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
irq-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
};
&i2c0 {
rx8010: rx8010@32 {

239
arch/arm64/boot/dts/rockchip/rk3568-lubancat-dsi.dtsi Normal file
View File

@ -0,0 +1,239 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
&dsi0 {
status = "disabled";
power-supply = <&mipi_dsi0_power>;
dsi0_panel: panel@0 {
status = "disabled";
compatible = "simple-panel-dsi";
reg = <0x0>;
backlight = <&backlight0>;
// reset-gpios = < >;
// enable-delay-ms = <35>;
// prepare-delay-ms = <6>;
// reset-delay-ms = <0>;
// init-delay-ms = <20>;
// unprepare-delay-ms = <0>;
// disable-delay-ms = <20>;
// size,width = <74>;
// size,height = <133>;
// dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
// dsi,format = <MIPI_DSI_FMT_RGB888>;
// dsi,lanes = <4>;
// panel-init-sequence = [
// ];
// panel-exit-sequence = [
// ];
// disp_timings0: display-timings {
// native-mode = <&dsi0_timing0>;
// dsi0_timing0: timing0 {
// clock-frequency = <131376000>;
// hactive = <1080>;
// vactive = <1920>;
// hsync-len = <10>;
// hback-porch = <20>;
// hfront-porch = <10>;
// vsync-len = <5>;
// vback-porch = <20>;
// vfront-porch = <10>;
// hsync-active = <0>;
// vsync-active = <0>;
// de-active = <0>;
// pixelclk-active = <0>;
// };
// };
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi0: endpoint {
remote-endpoint = <&dsi0_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi0_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi0>;
};
};
};
};
&i2c1 {
status = "okay";
clock-frequency = <100000>;
gt911_dsi0: gt911@5d {
status = "disabled";
compatible = "goodix,gt911";
reg = <0x5d>;
// interrupt-parent = < >;
// interrupts = < >;
// reset-gpios = < >;
// irq-gpios = < >;
touchscreen-inverted-x = <1>;
touchscreen-inverted-y = <1>;
};
gt928_dsi0: gt928@5d {
status = "disabled";
compatible = "goodix,gt928";
reg = <0x5d>;
// interrupt-parent = < >;
// interrupts = < >;
// reset-gpios = < >;
// irq-gpios = < >;
touchscreen-inverted-y;
};
rockpi_mcu_0: rockpi-mcu-0@45 {
compatible = "rockpi_mcu";
reg = <0x45>;
status = "disabled";
};
rockpi_ft5406_0: rockpi_ft5406-0@38 {
compatible = "rockpi_ft5406";
reg = <0x38>;
status = "disabled";
};
};
&dsi1 {
status = "disabled";
power-supply = <&mipi_dsi1_power>;
#address-cells = <1>;
#size-cells = <0>;
dsi1_panel: panel@0 {
status = "disabled";
compatible = "simple-panel-dsi";
reg = <0x0>;
backlight = <&backlight1>;
// reset-gpios = < >;
// enable-delay-ms = <35>;
// prepare-delay-ms = <6>;
// reset-delay-ms = <0>;
// init-delay-ms = <20>;
// unprepare-delay-ms = <0>;
// disable-delay-ms = <20>;
// size,width = <74>;
// size,height = <133>;
// dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
// dsi,format = <MIPI_DSI_FMT_RGB888>;
// dsi,lanes = <4>;
// panel-init-sequence = [
// ];
// panel-exit-sequence = [
// ];
// disp_timings: display-timings {
// native-mode = <&dsi1_timing>;
// dsi1_timing: timing {
// clock-frequency = <131376000>;
// hactive = <1080>;
// vactive = <1920>;
// hsync-len = <10>;
// hback-porch = <20>;
// hfront-porch = <10>;
// vsync-len = <5>;
// vback-porch = <20>;
// vfront-porch = <10>;
// hsync-active = <0>;
// vsync-active = <0>;
// de-active = <0>;
// pixelclk-active = <0>;
// };
// };
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi1: endpoint {
remote-endpoint = <&dsi1_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi1_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi1>;
};
};
};
};
&i2c5 {
status = "okay";
clock-frequency = <100000>;
#address-cells = <1>;
#size-cells = <0>;
gt911_dsi1: gt911@5d {
status = "disabled";
compatible = "goodix,gt911";
reg = <0x5d>;
// interrupt-parent = < >;
// interrupts = < >;
// reset-gpios = < >;
// irq-gpios = < >;
touchscreen-inverted-x = <1>;
touchscreen-inverted-y = <1>;
};
gt928_dsi1: gt928@5d {
status = "disabled";
compatible = "goodix,gt928";
reg = <0x5d>;
// interrupt-parent = < >;
// interrupts = < >;
// reset-gpios = < >;
// irq-gpios = < >;
touchscreen-inverted-y;
};
rockpi_mcu_1: rockpi-mcu-1@45 {
compatible = "rockpi_mcu";
reg = <0x45>;
status = "disabled";
};
rockpi_ft5406_1: rockpi_ft5406-1@38 {
compatible = "rockpi_ft5406";
reg = <0x38>;
status = "disabled";
};
};

8
arch/arm64/boot/dts/rockchip/uEnv/uEnvLubanCat2-V2.txt
View File

@ -38,10 +38,10 @@ enable_uboot_overlays=1
#display
#dtoverlay=/dtb/overlay/rk3568-lubancat-hdmi-disabled-overlay.dtbo
#dsi0-vp1
#dtoverlay=/dtb/overlay/rk3568-lubancat-dsi0-1080p-overlay.dtbo
#dtoverlay=/dtb/overlay/rk3568-lubancat-dsi0-rpi-overlay.dtbo
#dtoverlay=/dtb/overlay/rk3568-lubancat-dsi0-7.0-1024x600-overlay.dtbo
#dtoverlay=/dtb/overlay/rk3568-lubancat-dsi0-10.1-800x1280-overlay.dtbo
#dtoverlay=/dtb/overlay/rk3568-lubancat-2-dsi0-in-vp1-1080p-overlay.dtbo
#dtoverlay=/dtb/overlay/rk3568-lubancat-2-dsi0-in-vp1-rpi-overlay.dtbo
#dtoverlay=/dtb/overlay/rk3568-lubancat-2-dsi0-in-vp1-7.0-1024x600-overlay.dtbo
#dtoverlay=/dtb/overlay/rk3568-lubancat-2-dsi0-in-vp1-10.1-800x1280-overlay.dtbo
#dsi1-vp0
#dtoverlay=/dtb/overlay/rk3568-lubancat-2-dsi1-in-vp0-1080p-overlay.dtbo
#dtoverlay=/dtb/overlay/rk3568-lubancat-2-dsi1-in-vp0-rpi-overlay.dtbo

20
arch/arm64/boot/dts/rockchip/uEnv/uEnvLubanCat2IO.txt
View File

@ -18,16 +18,16 @@ enable_uboot_overlays=1
#dtoverlay=/dtb/overlay/rk3568-lubancat-edp-touch-overlay.dtbo
#display
#dtoverlay=/dtb/overlay/rk3568-lubancat-hdmi-disabled-overlay.dtbo
#dsi0-vp0
#dtoverlay=/dtb/overlay/rk3568-lubancat-2io-dsi0-in-vp0-1080p-overlay.dtbo
#dtoverlay=/dtb/overlay/rk3568-lubancat-2io-dsi0-in-vp0-rpi-overlay.dtbo
#dtoverlay=/dtb/overlay/rk3568-lubancat-2io-dsi0-in-vp0-7.0-1024x600-overlay.dtbo
#dtoverlay=/dtb/overlay/rk3568-lubancat-2io-dsi0-in-vp0-10.1-800x1280-overlay.dtbo
#dsi1-vp1
#dtoverlay=/dtb/overlay/rk3568-lubancat-2io-dsi1-in-vp1-1080p-overlay.dtbo
#dtoverlay=/dtb/overlay/rk3568-lubancat-2io-dsi1-in-vp1-rpi-overlay.dtbo
#dtoverlay=/dtb/overlay/rk3568-lubancat-2io-dsi1-in-vp1-7.0-1024x600-overlay.dtbo
#dtoverlay=/dtb/overlay/rk3568-lubancat-2io-dsi1-in-vp1-10.1-800x1280-overlay.dtbo
#dsi0-vp1
#dtoverlay=/dtb/overlay/rk3568-lubancat-2-dsi0-in-vp1-1080p-overlay.dtbo
#dtoverlay=/dtb/overlay/rk3568-lubancat-2-dsi0-in-vp1-rpi-overlay.dtbo
#dtoverlay=/dtb/overlay/rk3568-lubancat-2-dsi0-in-vp1-7.0-1024x600-overlay.dtbo
#dtoverlay=/dtb/overlay/rk3568-lubancat-2-dsi0-in-vp1-10.1-800x1280-overlay.dtbo
#dsi1-vp0
#dtoverlay=/dtb/overlay/rk3568-lubancat-2-dsi1-in-vp0-1080p-overlay.dtbo
#dtoverlay=/dtb/overlay/rk3568-lubancat-2-dsi1-in-vp0-rpi-overlay.dtbo
#dtoverlay=/dtb/overlay/rk3568-lubancat-2-dsi1-in-vp0-7.0-1024x600-overlay.dtbo
#dtoverlay=/dtb/overlay/rk3568-lubancat-2-dsi1-in-vp0-10.1-800x1280-overlay.dtbo
#edp
#dtoverlay=/dtb/overlay/rk3568-lubancat-2io-edp-in-vp1-overlay.dtbo
#cam0(mipi-csi0)