soc: rockchip: sip: support get ddr map information

Change-Id: I3d96443d8cdfbd303d0b2dddaae04d508b2ce5f2
Signed-off-by: Simon Xue <xxm@rock-chips.com>

drivers/firmware/rockchip_sip.c

@@ -24,6 +24,7 @@
 #include <linux/ptrace.h>
 #include <linux/sched/clock.h>
 #include <linux/slab.h>
+#include <soc/rockchip/rockchip_sip.h>
 
 #ifdef CONFIG_64BIT
 #define PSCI_FN_NATIVE(version, name)	PSCI_##version##_FN64_##name
@@ -205,6 +206,35 @@ struct arm_smccc_res sip_smc_bus_config(u32 arg0, u32 arg1, u32 arg2)
 }
 EXPORT_SYMBOL_GPL(sip_smc_bus_config);
 
+struct dram_addrmap_info *sip_smc_get_dram_map(void)
+{
+	struct arm_smccc_res res;
+	static struct dram_addrmap_info *map;
+
+	if (map)
+		return map;
+
+	/* Request share memory size 4KB */
+	res = sip_smc_request_share_mem(1, SHARE_PAGE_TYPE_DDR_ADDRMAP);
+	if (res.a0 != 0) {
+		pr_err("no ATF memory for init\n");
+		return NULL;
+	}
+
+	map = (struct dram_addrmap_info *)res.a1;
+
+	res = sip_smc_dram(SHARE_PAGE_TYPE_DDR_ADDRMAP, 0,
+			   ROCKCHIP_SIP_CONFIG_DRAM_ADDRMAP_GET);
+	if (res.a0) {
+		pr_err("rockchip_sip_config_dram_init error:%lx\n", res.a0);
+		map = NULL;
+		return NULL;
+	}
+
+	return map;
+}
+EXPORT_SYMBOL_GPL(sip_smc_get_dram_map);
+
 struct arm_smccc_res sip_smc_lastlog_request(void)
 {
 	struct arm_smccc_res res;

include/linux/rockchip/rockchip_sip.h

@@ -122,6 +122,16 @@ enum {
 	RK_AMP_SUB_FUNC_END,
 };
 
+struct dram_addrmap_info {
+	u64 ch_mask[2];
+	u64 bk_mask[4];
+	u64 bg_mask[2];
+	u64 cs_mask[2];
+	u32 reserved[20];
+	u32 bank_bit_first;
+	u32 bank_bit_mask;
+};
+
 enum {
 	FIRMWARE_NONE,
 	FIRMWARE_TEE_32BIT,
@@ -138,6 +148,7 @@ typedef enum {
 	SHARE_PAGE_TYPE_DDRDBG,
 	SHARE_PAGE_TYPE_DDRECC,
 	SHARE_PAGE_TYPE_DDRFSP,
+	SHARE_PAGE_TYPE_DDR_ADDRMAP,
 	SHARE_PAGE_TYPE_LAST_LOG,
 	SHARE_PAGE_TYPE_MAX,
 } share_page_type_t;
@@ -168,6 +179,7 @@ u32 sip_smc_secure_reg_read(u32 addr_phy);
 struct arm_smccc_res sip_smc_bus_config(u32 arg0, u32 arg1, u32 arg2);
 int sip_smc_amp_config(u32 sub_func_id, u32 arg1, u32 arg2, u32 arg3);
 struct arm_smccc_res sip_smc_get_amp_info(u32 sub_func_id, u32 arg1);
+struct dram_addrmap_info *sip_smc_get_dram_map(void);
 
 /***************************fiq debugger **************************************/
 void sip_fiq_debugger_enable_fiq(bool enable, uint32_t tgt_cpu);
@@ -244,6 +256,10 @@ static inline int sip_smc_soc_bus_div(u32 arg0, u32 arg1, u32 arg2)
 {
 	return 0;
 }
+static inline struct dram_addrmap_info *sip_smc_get_dram_map(void)
+{
+	return NULL;
+}
 
 static inline int sip_smc_amp_config(u32 sub_func_id,
 				     u32 arg1,

include/soc/rockchip/rockchip_sip.h

@@ -29,5 +29,6 @@
 #define ROCKCHIP_SIP_CONFIG_DRAM_DEBUG		0x0b
 #define ROCKCHIP_SIP_CONFIG_MCU_START		0x0c
 #define ROCKCHIP_SIP_CONFIG_DRAM_GET_FREQ_INFO	0x0e
+#define ROCKCHIP_SIP_CONFIG_DRAM_ADDRMAP_GET	0x10
 
 #endif