93f81bd490
repo: https://github.com/T-head-Semi/opensbi commit: 89182b257c8798e15e4c685c1af0c2862d528d2a Change-Id: I7b39d66729e0108661a6f4c9e28acbdb303684ea
34 lines
1.1 KiB
Markdown
34 lines
1.1 KiB
Markdown
OpenPiton FPGA SoC Platform
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========================
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OpenPiton is the world's first open source, general purpose, multithreaded
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manycore processor. It is a tiled manycore framework scalable from one to
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1/2 billion cores. Currently, OpenPiton supports the 64bit Ariane RISC-V
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processor from ETH Zurich. To this end, Ariane has been equipped with a
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different L1 cache subsystem that follows a write-through protocol and that has
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support for cache invalidations and atomics.
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To build platform specific library and firmwares, provide the
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*PLATFORM=fpga/openpiton* parameter to the top level `make` command.
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Platform Options
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----------------
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The *OpenPiton* platform does not have any platform-specific options.
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Building Ariane FPGA Platform
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-----------------------------
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**Linux Kernel Payload**
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```
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make PLATFORM=fpga/openpiton FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
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```
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Booting Ariane FPGA Platform
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----------------------------
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**Linux Kernel Payload**
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As Linux kernel image is embedded in the OpenSBI firmware binary, Ariane will
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directly boot into Linux directly after powered on.
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