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[kernel] video: rockchip: hdmi: 3288/3368: set ddc clock to 50KHz.

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Change-Id: I00ba32eb9115fe63606b6ccb441ca3b7e3378880
Signed-off-by: Firefly <service@t-firefly.com>
(cherry picked from commit 9ce6f6b608392c4b3fce74146db071f23dd0f82f)
This commit is contained in:
Firefly
2015-09-18 16:58:52 +08:00
committed by djw
parent 2665c1f437
commit 342bcc86a3
1 changed files with 13 additions and 5 deletions
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18
kernel/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.c
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@ -167,7 +167,7 @@ static void rockchip_hdmiv2_i2cm_mask_int(struct hdmi_dev *hdmi_dev, int mask)
}
}
#define I2C_DIV_FACTOR 100000
#define I2C_DIV_FACTOR 1000000
static u16 i2c_count(u16 sfrclock, u16 sclmintime)
{
unsigned long tmp_scl_period = 0;
@ -183,16 +183,24 @@ static u16 i2c_count(u16 sfrclock, u16 sclmintime)
return (u16)(tmp_scl_period);
}
#define EDID_I2C_MIN_SS_SCL_HIGH_TIME 50000
#define EDID_I2C_MIN_SS_SCL_LOW_TIME 50000
#define EDID_I2C_MIN_SS_SCL_HIGH_TIME 9625
#define EDID_I2C_MIN_SS_SCL_LOW_TIME 10000
static void rockchip_hdmiv2_i2cm_clk_init(struct hdmi_dev *hdmi_dev)
{
int value;
/* Set DDC I2C CLK which devided from DDC_CLK. */
value = i2c_count(24000, EDID_I2C_MIN_SS_SCL_HIGH_TIME);
hdmi_writel(hdmi_dev, I2CM_SS_SCL_HCNT_0_ADDR,
i2c_count(24000, EDID_I2C_MIN_SS_SCL_HIGH_TIME));
value & 0xff);
hdmi_writel(hdmi_dev, I2CM_SS_SCL_HCNT_1_ADDR,
(value >> 8) & 0xff);
value = i2c_count(24000, EDID_I2C_MIN_SS_SCL_LOW_TIME);
hdmi_writel(hdmi_dev, I2CM_SS_SCL_LCNT_0_ADDR,
i2c_count(24000, EDID_I2C_MIN_SS_SCL_LOW_TIME));
value & 0xff);
hdmi_writel(hdmi_dev, I2CM_SS_SCL_LCNT_1_ADDR,
(value >> 8) & 0xff);
hdmi_msk_reg(hdmi_dev, I2CM_DIV, m_I2CM_FAST_STD_MODE,
v_I2CM_FAST_STD_MODE(STANDARD_MODE));
}