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[u-boot] rk33plat: irq: delete unused api.

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Change-Id: I7542f49fbed384236aaffb260b0c0808751c9142
Signed-off-by: Firefly <service@t-firefly.com>
(cherry picked from commit 094f1bee33ebe9343ff04fbbe40127b84d2c8e4d)
This commit is contained in:
Firefly
2016-03-16 09:54:32 +08:00
committed by cjp
parent a801a3bf70
commit 404e27d8f7
2 changed files with 2 additions and 91 deletions
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88
u-boot/arch/arm/cpu/armv8/rk33xx/irqs-gic.c
View File

@ -1,5 +1,5 @@
/* /*
* (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd * (C) Copyright 2008 Fuzhou Rockchip Electronics Co., Ltd
* Peter, Software Engineering, <superpeter.cai@gmail.com>. * Peter, Software Engineering, <superpeter.cai@gmail.com>.
* *
* SPDX-License-Identifier: GPL-2.0+ * SPDX-License-Identifier: GPL-2.0+
@ -25,61 +25,6 @@ typedef enum INT_SIGTYPE {
} eINT_SIGTYPE; } eINT_SIGTYPE;
static inline void int_set_prio_filt(uint32 nprio)
{
writel((nprio & 0xff), RKIO_GICC_PHYS + GICC_PMR);
}
/*
* Global enable of the Interrupt Distributor
* Enables forwarding of both Group1 and Group0 pending interrupts from the Distributor to the CPU interfaces
*/
static inline void int_enable_distributor(void)
{
writel(0x03, RKIO_GICD_PHYS + GICD_CTLR);
}
/*
* Global disable of the Interrupt Distributor
* Disables forwarding of both Group1 and Group0 pending interrupts from the Distributor to the CPU interfaces
*/
static inline void int_disable_distributor(void)
{
writel(0x00, RKIO_GICD_PHYS + GICD_CTLR);
}
static inline void int_enable_secure_signal(void)
{
uint32 reg;
reg = readl(RKIO_GICC_PHYS + GICC_CTLR);
writel(reg | 0x01, RKIO_GICC_PHYS + GICC_CTLR);
}
static inline void int_disable_secure_signal(void)
{
uint32 reg;
reg = readl(RKIO_GICC_PHYS + GICC_CTLR);
writel(reg & (~0x01), RKIO_GICC_PHYS + GICC_CTLR);
}
static inline void int_enable_nosecure_signal(void)
{
uint32 reg;
reg = readl(RKIO_GICC_PHYS + GICC_CTLR);
writel(reg | 0x02, RKIO_GICC_PHYS + GICC_CTLR);
}
static inline void int_disable_nosecure_signal(void)
{
uint32 reg;
reg = readl(RKIO_GICC_PHYS + GICC_CTLR);
writel(reg & (~0x02), RKIO_GICC_PHYS + GICC_CTLR);
}
/* get interrupt id */ /* get interrupt id */
static inline uint32 gic_irq_getid(void) static inline uint32 gic_irq_getid(void)
{ {
@ -251,37 +196,6 @@ static int gic_set_irq_type(int irq, unsigned int type)
} }
#if !defined(CONFIG_ARM64)
/**
* gic interrupt init
*/
static void gic_irq_init(void)
{
uint32 reg;
debug("gic_irq_init.\n");
/* end of interrupt */
writel(NR_GIC_IRQS, RKIO_GICC_PHYS + GICC_EOIR);
/* disable signalling the interrupt */
writel(0x00, RKIO_GICC_PHYS + GICC_CTLR);
writel(0x00, RKIO_GICD_PHYS + GICD_CTLR);
writel(0xFFFFFFFF, RKIO_GICD_PHYS + GICD_ICENABLER);
writel(0xFFFFFFFF, RKIO_GICD_PHYS + GICD_ICENABLER + 4);
writel(0xFFFFFFFF, RKIO_GICD_PHYS + GICD_ICENABLER + 8);
writel(0xFFFFFFFF, RKIO_GICD_PHYS + GICD_ICENABLER + 12);
reg = readl(RKIO_GICD_PHYS + GICD_ICFGR + 12);
writel(reg & (~(1 << 1)), RKIO_GICD_PHYS + GICD_ICFGR + 12);
int_set_prio_filt(0xff);
int_enable_secure_signal();
int_enable_nosecure_signal();
int_enable_distributor();
}
#endif
static struct irq_chip gic_irq_chip = { static struct irq_chip gic_irq_chip = {
.name = (const char *)"gic", .name = (const char *)"gic",

5
u-boot/arch/arm/cpu/armv8/rk33xx/irqs.c
View File

@ -81,10 +81,7 @@ static inline int irq_init(void)
gic_get_cpumask(); gic_get_cpumask();
/* gic irq init */ /* gic irq init */
#if !defined(CONFIG_ARM64) /* gic has been init in Start.S */
/* armv8 gic init has init when lowlevel_init done */
gic_irq_init();
#endif
/* gpio irq init */ /* gpio irq init */
#ifdef CONFIG_RK_GPIO #ifdef CONFIG_RK_GPIO