[Mod] 更新至版本:NxpNfcRdLib_Linux_v07.10.00_PUB

This commit is contained in:
yegaogang
2024-07-09 13:56:35 +08:00
parent e5bb0c1bb7
commit 99934328ca
27 changed files with 4124 additions and 0 deletions

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/*----------------------------------------------------------------------------*/
/* Copyright 2020 NXP */
/* */
/* NXP Confidential. This software is owned or controlled by NXP and may only */
/* be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that you */
/* have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable license */
/* terms, then you may not retain, install, activate or otherwise use the */
/* software. */
/*----------------------------------------------------------------------------*/
/** \file
* Example Source abstracting component data structure and code initialization and code specific to HW used in the examples
* This file shall be present in all examples. A customer does not need to touch/modify this file. This file
* purely depends on the phNxpBuild_Lpc.h or phNxpBuild_App.h
* The phAppInit.h externs the component data structures initialized here that is in turn included by the core examples.
* The core example shall not use any other variable defined here except the RdLib component data structures(as explained above)
* The RdLib component initialization requires some user defined data and function pointers.
* These are defined in the respective examples and externed here.
*
* Keystore and Crypto initialization needs to be handled by application.
*
* $Author$
* $Revision$ (v07.10.00)
* $Date$
*
*/
/* Status header */
#include <ph_Status.h>
#include "phApp_Init.h"
#ifdef NXPBUILD__PHHAL_HW_PN7462AU
#include <phOsal.h>
#include <phFlashBoot.h>
#include <phhalTimer.h>
/*******************************************************************************
** Function Declarations
*******************************************************************************/
void phApp_CPU_Init(void);
/*******************************************************************************
** Global Variable Declaration
*******************************************************************************/
phhalHw_PN7462AU_DataParams_t * pHal;
#ifdef NXPBUILD__PHHAL_HW_TARGET
/* Parameters for L3 activation during Autocoll */
extern uint8_t sens_res[2] ;
extern uint8_t nfc_id1[3] ;
extern uint8_t sel_res ;
extern uint8_t nfc_id3 ;
extern uint8_t poll_res[18] ;
#endif /* NXPBUILD__PHHAL_HW_TARGET */
/*******************************************************************************
** Function Definitions
*******************************************************************************/
/**
* This function will initialize NXP NFC Controller.
*/
void phApp_CPU_Init(void)
{
phFlashBoot_Main();
phhalTimer_Init();
}
/**
* This function will initialize Hal Target Config
*/
phStatus_t phApp_HALConfigAutoColl(void)
{
#ifdef NXPBUILD__PHHAL_HW_TARGET
phStatus_t wStatus;
uint8_t bSystemCode[] = {0xFF, 0xFF};
/* Set Listen Parameters in HAL Buffer used during Autocoll */
wStatus = phhalHw_PN7462AU_SetListenParam(
pHal,
&sens_res[0],
&nfc_id1[0],
sel_res,
(poll_res[0] == 0x02 ? PH_ON : PH_OFF),
&poll_res[2],
&poll_res[8],
bSystemCode);
CHECK_SUCCESS(wStatus);
#endif /* NXPBUILD__PHHAL_HW_TARGET */
return PH_ERR_SUCCESS;
}
/* Configure LPCD (for PN7462AU) */
phStatus_t phApp_ConfigureLPCD(void)
{
phStatus_t status;
uint16_t wLpcdValue;
wLpcdValue = 0;
status = phhalHw_GetConfig(pHal, PHHAL_HW_CONFIG_PN7462AU_LPCD_NEW_VALUE, &wLpcdValue);
CHECK_SUCCESS(status);
if (wLpcdValue != 0x00)
{
status = phhalHw_SetConfig(pHal, PHHAL_HW_CONFIG_PN7462AU_LPCD_REF_VALUE, wLpcdValue);
CHECK_SUCCESS(status);
}
return status;
}
#endif /* NXPBUILD__PHHAL_HW_PN7462AU */
/******************************************************************************
** End Of File
******************************************************************************/

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/*----------------------------------------------------------------------------*/
/* Copyright 2021-2023 NXP */
/* */
/* NXP Confidential. This software is owned or controlled by NXP and may only */
/* be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that you */
/* have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable license */
/* terms, then you may not retain, install, activate or otherwise use the */
/* software. */
/*----------------------------------------------------------------------------*/
/** \file
* Example Source abstracting component data structure and code initialization and code specific to HW used in the examples
* This file shall be present in all examples. A customer does not need to touch/modify this file. This file
* purely depends on the phNxpBuild_Lpc.h or phNxpBuild_App.h
* The phAppInit.h externs the component data structures initialized here that is in turn included by the core examples.
* The core example shall not use any other variable defined here except the RdLib component data structures(as explained above)
* The RdLib component initialization requires some user defined data and function pointers.
* These are defined in the respective examples and externed here.
*
* Keystore and Crypto initialization needs to be handled by application.
*
* $Author: NXP $
* $Revision: $ (v07.10.00)
* $Date: $
*
*/
#include <ph_Status.h>
#include "phApp_Init.h"
#ifdef NXPBUILD__PHHAL_HW_PN76XX
#include "phOsal.h"
#include "PN76xx.h"
#include "PN76_Eeprom.h"
#include "Clif.h"
/*********************************************************************************************************************/
/* LOCAL DEFINES */
/*********************************************************************************************************************/
/*******************************************************************************
** Function Declarations
*******************************************************************************/
void phApp_CPU_Init(void);
/*******************************************************************************
** Global Variable Declaration
*******************************************************************************/
phhalHw_Pn76xx_DataParams_t * pHal;
#ifdef NXPBUILD__PHHAL_HW_TARGET
/* Parameters for L3 activation during Autocoll */
extern uint8_t sens_res[2U] ;
extern uint8_t nfc_id1[3U] ;
extern uint8_t sel_res ;
extern uint8_t nfc_id3 ;
extern uint8_t poll_res[18U] ;
#endif /* NXPBUILD__PHHAL_HW_TARGET */
/*******************************************************************************
** Function Definitions
*******************************************************************************/
/**
* This function will initialize NXP NFC Controller.
*/
void phApp_CPU_Init(void)
{
#ifdef SEGGER_RTT_ENABLE
/* SEGGER RTT Init */
memset((uint8_t *)PN76_SEGGER_RTT_MEMORY_ALLOCATION_ADDRESS, 0, 0x4b8);
SEGGER_RTT_ConfigUpBuffer(0, NULL, NULL, 0, SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL);
#endif
/* To enable NS RF IRQ */
NVIC_EnableIRQ(CLIF_RF_IRQn);
/* To enable NS TIMER IRQ */
NVIC_EnableIRQ(TIMER_IRQn);
/* Initialize PMU */
PMU_Init();
/* Initialize SMU */
Smu_Init();
/* Initialize CLKGEN */
CLKGEN_Init();
}
/**
* This function will initialize Hal Target Config
*/
phStatus_t phApp_HALConfigAutoColl(void)
{
#ifdef NXPBUILD__PHHAL_HW_TARGET
phStatus_t wStatus;
uint8_t baDynamicUidConfig[1U] = { 1U }; /* Enable Dynamic UID feature on PN76XX. */
uint8_t baReadEepromConfig[24U] = { 0U };
/* Read Set Listen Parameters data from EEPROM */
wStatus = (PN76_Status_t)PN76_ReadEeprom(
baReadEepromConfig,
PHHAL_HW_PN76XX_SET_LISTEN_EEPROM_ADDR,
PHHAL_HW_PN76XX_SET_LISTEN_LEN
#ifdef NXPBUILD__PHHAL_HW_PN7642
, E_PN76_EEPROM_SECURE_LIB_CONFIG
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
);
CHECK_SUCCESS(wStatus);
/* Verify EEPROM data and configure Set Listen Parameters if EEPROM data is not correct. */
if ((memcmp(&baReadEepromConfig[0U], sens_res, 2U) != 0x00) ||
(memcmp(&baReadEepromConfig[2U], nfc_id1, 3U) != 0x00) ||
(memcmp(&baReadEepromConfig[5U], &sel_res, 1U) != 0x00) ||
(memcmp(&baReadEepromConfig[6U], poll_res, 18U) != 0x00))
{
/* Configure Set Listen Parameters. */
wStatus = phhalHw_Pn76xx_SetListenParameters(
pHal,
&sens_res[0],
&nfc_id1[0],
sel_res,
&poll_res[0],
nfc_id3);
CHECK_SUCCESS(wStatus);
}
/* Read Dynamic UID configuration from EEPROM */
wStatus = (PN76_Status_t)PN76_ReadEeprom(
baReadEepromConfig,
PHHAL_HW_PN76XX_DYNAMIC_UID_CONFG_ADDR,
0x01U
#ifdef NXPBUILD__PHHAL_HW_PN7642
, E_PN76_EEPROM_SECURE_LIB_CONFIG
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
);
CHECK_SUCCESS(wStatus);
/* Verify EEPROM data and perform Dynamic UID configuration if EEPROM data is not correct. */
if (baReadEepromConfig[0] != baDynamicUidConfig[0])
{
/* Configure Dynamic UID */
wStatus = PN76_WriteEeprom(
baDynamicUidConfig,
PHHAL_HW_PN76XX_DYNAMIC_UID_CONFG_ADDR,
0x01
#ifdef NXPBUILD__PHHAL_HW_PN7642
, E_PN76_EEPROM_SECURE_LIB_CONFIG
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
);
CHECK_SUCCESS(wStatus);
}
#endif /* NXPBUILD__PHHAL_HW_TARGET */
return PH_ERR_SUCCESS;
}
/* Configure LPCD (for PN76XX) */
phStatus_t phApp_ConfigureLPCD(void)
{
#ifdef NXPBUILD__PHHAL_HW_PN7642
phStatus_t status = PH_ERR_SUCCESS;
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_SET_LPCD_WAKEUPTIME_MS, 100U);
CHECK_SUCCESS(status);
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_LPCD_MODE, PHHAL_HW_PN76XX_LPCD_MODE_DEFAULT);
CHECK_SUCCESS(status);
status = phhalHw_Lpcd(pHal);
CHECK_SUCCESS(status);
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_SET_LPCD_WAKEUPTIME_MS, 330U);
CHECK_SUCCESS(status);
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_LPCD_MODE, PHHAL_HW_PN76XX_LPCD_MODE_POWERDOWN);
CHECK_SUCCESS(status);
return status;
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
#ifdef NXPBUILD__PHHAL_HW_PN7640
return PH_ERR_UNSUPPORTED_COMMAND;
#endif /* NXPBUILD__PHHAL_HW_PN7640 */
}
#endif /* NXPBUILD__PHHAL_HW_PN76XX */
/******************************************************************************
** End Of File
******************************************************************************/

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/*----------------------------------------------------------------------------*/
/* Copyright 2020 NXP */
/* */
/* NXP Confidential. This software is owned or controlled by NXP and may only */
/* be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that you */
/* have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable license */
/* terms, then you may not retain, install, activate or otherwise use the */
/* software. */
/*----------------------------------------------------------------------------*/
/** \file
* Example Source abstracting component data structure and code initialization and code specific to HW used in the examples
* This file shall be present in all examples. A customer does not need to touch/modify this file. This file
* purely depends on the phNxpBuild_Lpc.h or phNxpBuild_App.h
* The phAppInit.h externs the component data structures initialized here that is in turn included by the core examples.
* The core example shall not use any other variable defined here except the RdLib component data structures(as explained above)
* The RdLib component initialization requires some user defined data and function pointers.
* These are defined in the respective examples and externed here.
*
* Keystore and Crypto initialization needs to be handled by application.
*
* $Author$
* $Revision$ (v07.10.00)
* $Date$
*
*/
/* Status header */
#include <ph_Status.h>
#include "phApp_Init.h"
#ifdef NXPBUILD__PHHAL_HW_RC663
#include "BoardSelection.h"
/*******************************************************************************
** Function Declarations
*******************************************************************************/
#ifdef PH_PLATFORM_HAS_ICFRONTEND
void CLIF_IRQHandler(void);
#endif
/*******************************************************************************
** Global Variable Declaration
*******************************************************************************/
phbalReg_Type_t sBalParams;
phhalHw_Rc663_DataParams_t * pHal;
/*******************************************************************************
** Function Definitions
*******************************************************************************/
/* Configure LPCD (for CLRC663) */
phStatus_t phApp_ConfigureLPCD(void)
{
phStatus_t status;
uint8_t bValueI;
uint8_t bValueQ;
/* Configure LPCD calibration standby time (T4) and RF ON time (T3). */
status = phhalHw_Rc663_Cmd_Lpcd_SetConfig(
pHal,
PHHAL_HW_RC663_CMD_LPCD_MODE_DEFAULT,
0,
0,
PH_NFCRDLIB_EXAMPLE_LPCD_GUARDTIME,
PH_NFCRDLIB_EXAMPLE_LPCD_RFON_TIME);
/* Perform LPCD calibration to get I and Q values. */
status = phhalHw_Rc663_Cmd_Lpcd_GetConfig(pHal, &bValueI, &bValueQ);
CHECK_SUCCESS(status);
/* Configure I and Q values for LPCD detection cycle. */
status = phhalHw_Rc663_Cmd_Lpcd_SetConfig(
pHal,
PHHAL_HW_RC663_CMD_LPCD_MODE_POWERDOWN,
bValueI,
bValueQ,
PH_NFCRDLIB_EXAMPLE_LPCD_GUARDTIME,
PH_NFCRDLIB_EXAMPLE_LPCD_RFON_TIME);
return status;
}
void CLIF_IRQHandler(void)
{
/* Read the interrupt status of external interrupt attached to the reader IC IRQ pin */
if (phDriver_PinRead(PHDRIVER_PIN_IRQ, PH_DRIVER_PINFUNC_INTERRUPT))
{
phDriver_PinClearIntStatus(PHDRIVER_PIN_IRQ);
/* Call application registered callback. */
if (pHal->pRFISRCallback != NULL)
{
pHal->pRFISRCallback(pHal);
}
}
}
#endif /* NXPBUILD__PHHAL_HW_RC663 */
/******************************************************************************
** End Of File
******************************************************************************/

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/*----------------------------------------------------------------------------*/
/* Copyright 2020 NXP */
/* */
/* NXP Confidential. This software is owned or controlled by NXP and may only */
/* be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that you */
/* have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable license */
/* terms, then you may not retain, install, activate or otherwise use the */
/* software. */
/*----------------------------------------------------------------------------*/
/** \file
* Example Source abstracting component data structure and code initialization and code specific to HW used in the examples
* This file shall be present in all examples. A customer does not need to touch/modify this file. This file
* purely depends on the phNxpBuild_Lpc.h or phNxpBuild_App.h
* The phAppInit.h externs the component data structures initialized here that is in turn included by the core examples.
* The core example shall not use any other variable defined here except the RdLib component data structures(as explained above)
* The RdLib component initialization requires some user defined data and function pointers.
* These are defined in the respective examples and externed here.
*
* Keystore and Crypto initialization needs to be handled by application.
*
* $Author$
* $Revision$ (v07.10.00)
* $Date$
*
*/
/* Status header */
#include <ph_Status.h>
#include "phApp_Init.h"
#ifdef NXPBUILD__PHHAL_HW_PN7462AU
#include <phOsal.h>
#include <phFlashBoot.h>
#include <phhalTimer.h>
/*******************************************************************************
** Function Declarations
*******************************************************************************/
void phApp_CPU_Init(void);
/*******************************************************************************
** Global Variable Declaration
*******************************************************************************/
phhalHw_PN7462AU_DataParams_t * pHal;
#ifdef NXPBUILD__PHHAL_HW_TARGET
/* Parameters for L3 activation during Autocoll */
extern uint8_t sens_res[2] ;
extern uint8_t nfc_id1[3] ;
extern uint8_t sel_res ;
extern uint8_t nfc_id3 ;
extern uint8_t poll_res[18] ;
#endif /* NXPBUILD__PHHAL_HW_TARGET */
/*******************************************************************************
** Function Definitions
*******************************************************************************/
/**
* This function will initialize NXP NFC Controller.
*/
void phApp_CPU_Init(void)
{
phFlashBoot_Main();
phhalTimer_Init();
}
/**
* This function will initialize Hal Target Config
*/
phStatus_t phApp_HALConfigAutoColl(void)
{
#ifdef NXPBUILD__PHHAL_HW_TARGET
phStatus_t wStatus;
uint8_t bSystemCode[] = {0xFF, 0xFF};
/* Set Listen Parameters in HAL Buffer used during Autocoll */
wStatus = phhalHw_PN7462AU_SetListenParam(
pHal,
&sens_res[0],
&nfc_id1[0],
sel_res,
(poll_res[0] == 0x02 ? PH_ON : PH_OFF),
&poll_res[2],
&poll_res[8],
bSystemCode);
CHECK_SUCCESS(wStatus);
#endif /* NXPBUILD__PHHAL_HW_TARGET */
return PH_ERR_SUCCESS;
}
/* Configure LPCD (for PN7462AU) */
phStatus_t phApp_ConfigureLPCD(void)
{
phStatus_t status;
uint16_t wLpcdValue;
wLpcdValue = 0;
status = phhalHw_GetConfig(pHal, PHHAL_HW_CONFIG_PN7462AU_LPCD_NEW_VALUE, &wLpcdValue);
CHECK_SUCCESS(status);
if (wLpcdValue != 0x00)
{
status = phhalHw_SetConfig(pHal, PHHAL_HW_CONFIG_PN7462AU_LPCD_REF_VALUE, wLpcdValue);
CHECK_SUCCESS(status);
}
return status;
}
#endif /* NXPBUILD__PHHAL_HW_PN7462AU */
/******************************************************************************
** End Of File
******************************************************************************/

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/*----------------------------------------------------------------------------*/
/* Copyright 2021-2023 NXP */
/* */
/* NXP Confidential. This software is owned or controlled by NXP and may only */
/* be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that you */
/* have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable license */
/* terms, then you may not retain, install, activate or otherwise use the */
/* software. */
/*----------------------------------------------------------------------------*/
/** \file
* Example Source abstracting component data structure and code initialization and code specific to HW used in the examples
* This file shall be present in all examples. A customer does not need to touch/modify this file. This file
* purely depends on the phNxpBuild_Lpc.h or phNxpBuild_App.h
* The phAppInit.h externs the component data structures initialized here that is in turn included by the core examples.
* The core example shall not use any other variable defined here except the RdLib component data structures(as explained above)
* The RdLib component initialization requires some user defined data and function pointers.
* These are defined in the respective examples and externed here.
*
* Keystore and Crypto initialization needs to be handled by application.
*
* $Author: NXP $
* $Revision: $ (v07.10.00)
* $Date: $
*
*/
#include <ph_Status.h>
#include "phApp_Init.h"
#ifdef NXPBUILD__PHHAL_HW_PN76XX
#include "phOsal.h"
#include "PN76xx.h"
#include "PN76_Eeprom.h"
#include "Clif.h"
/*********************************************************************************************************************/
/* LOCAL DEFINES */
/*********************************************************************************************************************/
/*******************************************************************************
** Function Declarations
*******************************************************************************/
void phApp_CPU_Init(void);
/*******************************************************************************
** Global Variable Declaration
*******************************************************************************/
phhalHw_Pn76xx_DataParams_t * pHal;
#ifdef NXPBUILD__PHHAL_HW_TARGET
/* Parameters for L3 activation during Autocoll */
extern uint8_t sens_res[2U] ;
extern uint8_t nfc_id1[3U] ;
extern uint8_t sel_res ;
extern uint8_t nfc_id3 ;
extern uint8_t poll_res[18U] ;
#endif /* NXPBUILD__PHHAL_HW_TARGET */
/*******************************************************************************
** Function Definitions
*******************************************************************************/
/**
* This function will initialize NXP NFC Controller.
*/
void phApp_CPU_Init(void)
{
#ifdef SEGGER_RTT_ENABLE
/* SEGGER RTT Init */
memset((uint8_t *)PN76_SEGGER_RTT_MEMORY_ALLOCATION_ADDRESS, 0, 0x4b8);
SEGGER_RTT_ConfigUpBuffer(0, NULL, NULL, 0, SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL);
#endif
/* To enable NS RF IRQ */
NVIC_EnableIRQ(CLIF_RF_IRQn);
/* To enable NS TIMER IRQ */
NVIC_EnableIRQ(TIMER_IRQn);
/* Initialize PMU */
PMU_Init();
/* Initialize SMU */
Smu_Init();
/* Initialize CLKGEN */
CLKGEN_Init();
}
/**
* This function will initialize Hal Target Config
*/
phStatus_t phApp_HALConfigAutoColl(void)
{
#ifdef NXPBUILD__PHHAL_HW_TARGET
phStatus_t wStatus;
uint8_t baDynamicUidConfig[1U] = { 1U }; /* Enable Dynamic UID feature on PN76XX. */
uint8_t baReadEepromConfig[24U] = { 0U };
/* Read Set Listen Parameters data from EEPROM */
wStatus = (PN76_Status_t)PN76_ReadEeprom(
baReadEepromConfig,
PHHAL_HW_PN76XX_SET_LISTEN_EEPROM_ADDR,
PHHAL_HW_PN76XX_SET_LISTEN_LEN
#ifdef NXPBUILD__PHHAL_HW_PN7642
, E_PN76_EEPROM_SECURE_LIB_CONFIG
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
);
CHECK_SUCCESS(wStatus);
/* Verify EEPROM data and configure Set Listen Parameters if EEPROM data is not correct. */
if ((memcmp(&baReadEepromConfig[0U], sens_res, 2U) != 0x00) ||
(memcmp(&baReadEepromConfig[2U], nfc_id1, 3U) != 0x00) ||
(memcmp(&baReadEepromConfig[5U], &sel_res, 1U) != 0x00) ||
(memcmp(&baReadEepromConfig[6U], poll_res, 18U) != 0x00))
{
/* Configure Set Listen Parameters. */
wStatus = phhalHw_Pn76xx_SetListenParameters(
pHal,
&sens_res[0],
&nfc_id1[0],
sel_res,
&poll_res[0],
nfc_id3);
CHECK_SUCCESS(wStatus);
}
/* Read Dynamic UID configuration from EEPROM */
wStatus = (PN76_Status_t)PN76_ReadEeprom(
baReadEepromConfig,
PHHAL_HW_PN76XX_DYNAMIC_UID_CONFG_ADDR,
0x01U
#ifdef NXPBUILD__PHHAL_HW_PN7642
, E_PN76_EEPROM_SECURE_LIB_CONFIG
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
);
CHECK_SUCCESS(wStatus);
/* Verify EEPROM data and perform Dynamic UID configuration if EEPROM data is not correct. */
if (baReadEepromConfig[0] != baDynamicUidConfig[0])
{
/* Configure Dynamic UID */
wStatus = PN76_WriteEeprom(
baDynamicUidConfig,
PHHAL_HW_PN76XX_DYNAMIC_UID_CONFG_ADDR,
0x01
#ifdef NXPBUILD__PHHAL_HW_PN7642
, E_PN76_EEPROM_SECURE_LIB_CONFIG
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
);
CHECK_SUCCESS(wStatus);
}
#endif /* NXPBUILD__PHHAL_HW_TARGET */
return PH_ERR_SUCCESS;
}
/* Configure LPCD (for PN76XX) */
phStatus_t phApp_ConfigureLPCD(void)
{
#ifdef NXPBUILD__PHHAL_HW_PN7642
phStatus_t status = PH_ERR_SUCCESS;
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_SET_LPCD_WAKEUPTIME_MS, 100U);
CHECK_SUCCESS(status);
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_LPCD_MODE, PHHAL_HW_PN76XX_LPCD_MODE_DEFAULT);
CHECK_SUCCESS(status);
status = phhalHw_Lpcd(pHal);
CHECK_SUCCESS(status);
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_SET_LPCD_WAKEUPTIME_MS, 330U);
CHECK_SUCCESS(status);
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_LPCD_MODE, PHHAL_HW_PN76XX_LPCD_MODE_POWERDOWN);
CHECK_SUCCESS(status);
return status;
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
#ifdef NXPBUILD__PHHAL_HW_PN7640
return PH_ERR_UNSUPPORTED_COMMAND;
#endif /* NXPBUILD__PHHAL_HW_PN7640 */
}
#endif /* NXPBUILD__PHHAL_HW_PN76XX */
/******************************************************************************
** End Of File
******************************************************************************/

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/*----------------------------------------------------------------------------*/
/* Copyright 2020 NXP */
/* */
/* NXP Confidential. This software is owned or controlled by NXP and may only */
/* be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that you */
/* have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable license */
/* terms, then you may not retain, install, activate or otherwise use the */
/* software. */
/*----------------------------------------------------------------------------*/
/** \file
* Example Source abstracting component data structure and code initialization and code specific to HW used in the examples
* This file shall be present in all examples. A customer does not need to touch/modify this file. This file
* purely depends on the phNxpBuild_Lpc.h or phNxpBuild_App.h
* The phAppInit.h externs the component data structures initialized here that is in turn included by the core examples.
* The core example shall not use any other variable defined here except the RdLib component data structures(as explained above)
* The RdLib component initialization requires some user defined data and function pointers.
* These are defined in the respective examples and externed here.
*
* Keystore and Crypto initialization needs to be handled by application.
*
* $Author$
* $Revision$ (v07.10.00)
* $Date$
*
*/
/* Status header */
#include <ph_Status.h>
#include "phApp_Init.h"
#ifdef NXPBUILD__PHHAL_HW_RC663
#include "BoardSelection.h"
/*******************************************************************************
** Function Declarations
*******************************************************************************/
#ifdef PH_PLATFORM_HAS_ICFRONTEND
void CLIF_IRQHandler(void);
#endif
/*******************************************************************************
** Global Variable Declaration
*******************************************************************************/
phbalReg_Type_t sBalParams;
phhalHw_Rc663_DataParams_t * pHal;
/*******************************************************************************
** Function Definitions
*******************************************************************************/
/* Configure LPCD (for CLRC663) */
phStatus_t phApp_ConfigureLPCD(void)
{
phStatus_t status;
uint8_t bValueI;
uint8_t bValueQ;
/* Configure LPCD calibration standby time (T4) and RF ON time (T3). */
status = phhalHw_Rc663_Cmd_Lpcd_SetConfig(
pHal,
PHHAL_HW_RC663_CMD_LPCD_MODE_DEFAULT,
0,
0,
PH_NFCRDLIB_EXAMPLE_LPCD_GUARDTIME,
PH_NFCRDLIB_EXAMPLE_LPCD_RFON_TIME);
/* Perform LPCD calibration to get I and Q values. */
status = phhalHw_Rc663_Cmd_Lpcd_GetConfig(pHal, &bValueI, &bValueQ);
CHECK_SUCCESS(status);
/* Configure I and Q values for LPCD detection cycle. */
status = phhalHw_Rc663_Cmd_Lpcd_SetConfig(
pHal,
PHHAL_HW_RC663_CMD_LPCD_MODE_POWERDOWN,
bValueI,
bValueQ,
PH_NFCRDLIB_EXAMPLE_LPCD_GUARDTIME,
PH_NFCRDLIB_EXAMPLE_LPCD_RFON_TIME);
return status;
}
void CLIF_IRQHandler(void)
{
/* Read the interrupt status of external interrupt attached to the reader IC IRQ pin */
if (phDriver_PinRead(PHDRIVER_PIN_IRQ, PH_DRIVER_PINFUNC_INTERRUPT))
{
phDriver_PinClearIntStatus(PHDRIVER_PIN_IRQ);
/* Call application registered callback. */
if (pHal->pRFISRCallback != NULL)
{
pHal->pRFISRCallback(pHal);
}
}
}
#endif /* NXPBUILD__PHHAL_HW_RC663 */
/******************************************************************************
** End Of File
******************************************************************************/

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/*----------------------------------------------------------------------------*/
/* Copyright 2020 NXP */
/* */
/* NXP Confidential. This software is owned or controlled by NXP and may only */
/* be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that you */
/* have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable license */
/* terms, then you may not retain, install, activate or otherwise use the */
/* software. */
/*----------------------------------------------------------------------------*/
/** \file
* Example Source abstracting component data structure and code initialization and code specific to HW used in the examples
* This file shall be present in all examples. A customer does not need to touch/modify this file. This file
* purely depends on the phNxpBuild_Lpc.h or phNxpBuild_App.h
* The phAppInit.h externs the component data structures initialized here that is in turn included by the core examples.
* The core example shall not use any other variable defined here except the RdLib component data structures(as explained above)
* The RdLib component initialization requires some user defined data and function pointers.
* These are defined in the respective examples and externed here.
*
* Keystore and Crypto initialization needs to be handled by application.
*
* $Author$
* $Revision$ (v07.10.00)
* $Date$
*
*/
/* Status header */
#include <ph_Status.h>
#include "phApp_Init.h"
#ifdef NXPBUILD__PHHAL_HW_PN7462AU
#include <phOsal.h>
#include <phFlashBoot.h>
#include <phhalTimer.h>
/*******************************************************************************
** Function Declarations
*******************************************************************************/
void phApp_CPU_Init(void);
/*******************************************************************************
** Global Variable Declaration
*******************************************************************************/
phhalHw_PN7462AU_DataParams_t * pHal;
#ifdef NXPBUILD__PHHAL_HW_TARGET
/* Parameters for L3 activation during Autocoll */
extern uint8_t sens_res[2] ;
extern uint8_t nfc_id1[3] ;
extern uint8_t sel_res ;
extern uint8_t nfc_id3 ;
extern uint8_t poll_res[18] ;
#endif /* NXPBUILD__PHHAL_HW_TARGET */
/*******************************************************************************
** Function Definitions
*******************************************************************************/
/**
* This function will initialize NXP NFC Controller.
*/
void phApp_CPU_Init(void)
{
phFlashBoot_Main();
phhalTimer_Init();
}
/**
* This function will initialize Hal Target Config
*/
phStatus_t phApp_HALConfigAutoColl(void)
{
#ifdef NXPBUILD__PHHAL_HW_TARGET
phStatus_t wStatus;
uint8_t bSystemCode[] = {0xFF, 0xFF};
/* Set Listen Parameters in HAL Buffer used during Autocoll */
wStatus = phhalHw_PN7462AU_SetListenParam(
pHal,
&sens_res[0],
&nfc_id1[0],
sel_res,
(poll_res[0] == 0x02 ? PH_ON : PH_OFF),
&poll_res[2],
&poll_res[8],
bSystemCode);
CHECK_SUCCESS(wStatus);
#endif /* NXPBUILD__PHHAL_HW_TARGET */
return PH_ERR_SUCCESS;
}
/* Configure LPCD (for PN7462AU) */
phStatus_t phApp_ConfigureLPCD(void)
{
phStatus_t status;
uint16_t wLpcdValue;
wLpcdValue = 0;
status = phhalHw_GetConfig(pHal, PHHAL_HW_CONFIG_PN7462AU_LPCD_NEW_VALUE, &wLpcdValue);
CHECK_SUCCESS(status);
if (wLpcdValue != 0x00)
{
status = phhalHw_SetConfig(pHal, PHHAL_HW_CONFIG_PN7462AU_LPCD_REF_VALUE, wLpcdValue);
CHECK_SUCCESS(status);
}
return status;
}
#endif /* NXPBUILD__PHHAL_HW_PN7462AU */
/******************************************************************************
** End Of File
******************************************************************************/

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/*----------------------------------------------------------------------------*/
/* Copyright 2021-2023 NXP */
/* */
/* NXP Confidential. This software is owned or controlled by NXP and may only */
/* be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that you */
/* have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable license */
/* terms, then you may not retain, install, activate or otherwise use the */
/* software. */
/*----------------------------------------------------------------------------*/
/** \file
* Example Source abstracting component data structure and code initialization and code specific to HW used in the examples
* This file shall be present in all examples. A customer does not need to touch/modify this file. This file
* purely depends on the phNxpBuild_Lpc.h or phNxpBuild_App.h
* The phAppInit.h externs the component data structures initialized here that is in turn included by the core examples.
* The core example shall not use any other variable defined here except the RdLib component data structures(as explained above)
* The RdLib component initialization requires some user defined data and function pointers.
* These are defined in the respective examples and externed here.
*
* Keystore and Crypto initialization needs to be handled by application.
*
* $Author: NXP $
* $Revision: $ (v07.10.00)
* $Date: $
*
*/
#include <ph_Status.h>
#include "phApp_Init.h"
#ifdef NXPBUILD__PHHAL_HW_PN76XX
#include "phOsal.h"
#include "PN76xx.h"
#include "PN76_Eeprom.h"
#include "Clif.h"
/*********************************************************************************************************************/
/* LOCAL DEFINES */
/*********************************************************************************************************************/
/*******************************************************************************
** Function Declarations
*******************************************************************************/
void phApp_CPU_Init(void);
/*******************************************************************************
** Global Variable Declaration
*******************************************************************************/
phhalHw_Pn76xx_DataParams_t * pHal;
#ifdef NXPBUILD__PHHAL_HW_TARGET
/* Parameters for L3 activation during Autocoll */
extern uint8_t sens_res[2U] ;
extern uint8_t nfc_id1[3U] ;
extern uint8_t sel_res ;
extern uint8_t nfc_id3 ;
extern uint8_t poll_res[18U] ;
#endif /* NXPBUILD__PHHAL_HW_TARGET */
/*******************************************************************************
** Function Definitions
*******************************************************************************/
/**
* This function will initialize NXP NFC Controller.
*/
void phApp_CPU_Init(void)
{
#ifdef SEGGER_RTT_ENABLE
/* SEGGER RTT Init */
memset((uint8_t *)PN76_SEGGER_RTT_MEMORY_ALLOCATION_ADDRESS, 0, 0x4b8);
SEGGER_RTT_ConfigUpBuffer(0, NULL, NULL, 0, SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL);
#endif
/* To enable NS RF IRQ */
NVIC_EnableIRQ(CLIF_RF_IRQn);
/* To enable NS TIMER IRQ */
NVIC_EnableIRQ(TIMER_IRQn);
/* Initialize PMU */
PMU_Init();
/* Initialize SMU */
Smu_Init();
/* Initialize CLKGEN */
CLKGEN_Init();
}
/**
* This function will initialize Hal Target Config
*/
phStatus_t phApp_HALConfigAutoColl(void)
{
#ifdef NXPBUILD__PHHAL_HW_TARGET
phStatus_t wStatus;
uint8_t baDynamicUidConfig[1U] = { 1U }; /* Enable Dynamic UID feature on PN76XX. */
uint8_t baReadEepromConfig[24U] = { 0U };
/* Read Set Listen Parameters data from EEPROM */
wStatus = (PN76_Status_t)PN76_ReadEeprom(
baReadEepromConfig,
PHHAL_HW_PN76XX_SET_LISTEN_EEPROM_ADDR,
PHHAL_HW_PN76XX_SET_LISTEN_LEN
#ifdef NXPBUILD__PHHAL_HW_PN7642
, E_PN76_EEPROM_SECURE_LIB_CONFIG
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
);
CHECK_SUCCESS(wStatus);
/* Verify EEPROM data and configure Set Listen Parameters if EEPROM data is not correct. */
if ((memcmp(&baReadEepromConfig[0U], sens_res, 2U) != 0x00) ||
(memcmp(&baReadEepromConfig[2U], nfc_id1, 3U) != 0x00) ||
(memcmp(&baReadEepromConfig[5U], &sel_res, 1U) != 0x00) ||
(memcmp(&baReadEepromConfig[6U], poll_res, 18U) != 0x00))
{
/* Configure Set Listen Parameters. */
wStatus = phhalHw_Pn76xx_SetListenParameters(
pHal,
&sens_res[0],
&nfc_id1[0],
sel_res,
&poll_res[0],
nfc_id3);
CHECK_SUCCESS(wStatus);
}
/* Read Dynamic UID configuration from EEPROM */
wStatus = (PN76_Status_t)PN76_ReadEeprom(
baReadEepromConfig,
PHHAL_HW_PN76XX_DYNAMIC_UID_CONFG_ADDR,
0x01U
#ifdef NXPBUILD__PHHAL_HW_PN7642
, E_PN76_EEPROM_SECURE_LIB_CONFIG
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
);
CHECK_SUCCESS(wStatus);
/* Verify EEPROM data and perform Dynamic UID configuration if EEPROM data is not correct. */
if (baReadEepromConfig[0] != baDynamicUidConfig[0])
{
/* Configure Dynamic UID */
wStatus = PN76_WriteEeprom(
baDynamicUidConfig,
PHHAL_HW_PN76XX_DYNAMIC_UID_CONFG_ADDR,
0x01
#ifdef NXPBUILD__PHHAL_HW_PN7642
, E_PN76_EEPROM_SECURE_LIB_CONFIG
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
);
CHECK_SUCCESS(wStatus);
}
#endif /* NXPBUILD__PHHAL_HW_TARGET */
return PH_ERR_SUCCESS;
}
/* Configure LPCD (for PN76XX) */
phStatus_t phApp_ConfigureLPCD(void)
{
#ifdef NXPBUILD__PHHAL_HW_PN7642
phStatus_t status = PH_ERR_SUCCESS;
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_SET_LPCD_WAKEUPTIME_MS, 100U);
CHECK_SUCCESS(status);
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_LPCD_MODE, PHHAL_HW_PN76XX_LPCD_MODE_DEFAULT);
CHECK_SUCCESS(status);
status = phhalHw_Lpcd(pHal);
CHECK_SUCCESS(status);
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_SET_LPCD_WAKEUPTIME_MS, 330U);
CHECK_SUCCESS(status);
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_LPCD_MODE, PHHAL_HW_PN76XX_LPCD_MODE_POWERDOWN);
CHECK_SUCCESS(status);
return status;
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
#ifdef NXPBUILD__PHHAL_HW_PN7640
return PH_ERR_UNSUPPORTED_COMMAND;
#endif /* NXPBUILD__PHHAL_HW_PN7640 */
}
#endif /* NXPBUILD__PHHAL_HW_PN76XX */
/******************************************************************************
** End Of File
******************************************************************************/

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/*----------------------------------------------------------------------------*/
/* Copyright 2020 NXP */
/* */
/* NXP Confidential. This software is owned or controlled by NXP and may only */
/* be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that you */
/* have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable license */
/* terms, then you may not retain, install, activate or otherwise use the */
/* software. */
/*----------------------------------------------------------------------------*/
/** \file
* Example Source abstracting component data structure and code initialization and code specific to HW used in the examples
* This file shall be present in all examples. A customer does not need to touch/modify this file. This file
* purely depends on the phNxpBuild_Lpc.h or phNxpBuild_App.h
* The phAppInit.h externs the component data structures initialized here that is in turn included by the core examples.
* The core example shall not use any other variable defined here except the RdLib component data structures(as explained above)
* The RdLib component initialization requires some user defined data and function pointers.
* These are defined in the respective examples and externed here.
*
* Keystore and Crypto initialization needs to be handled by application.
*
* $Author$
* $Revision$ (v07.10.00)
* $Date$
*
*/
/* Status header */
#include <ph_Status.h>
#include "phApp_Init.h"
#ifdef NXPBUILD__PHHAL_HW_RC663
#include "BoardSelection.h"
/*******************************************************************************
** Function Declarations
*******************************************************************************/
#ifdef PH_PLATFORM_HAS_ICFRONTEND
void CLIF_IRQHandler(void);
#endif
/*******************************************************************************
** Global Variable Declaration
*******************************************************************************/
phbalReg_Type_t sBalParams;
phhalHw_Rc663_DataParams_t * pHal;
/*******************************************************************************
** Function Definitions
*******************************************************************************/
/* Configure LPCD (for CLRC663) */
phStatus_t phApp_ConfigureLPCD(void)
{
phStatus_t status;
uint8_t bValueI;
uint8_t bValueQ;
/* Configure LPCD calibration standby time (T4) and RF ON time (T3). */
status = phhalHw_Rc663_Cmd_Lpcd_SetConfig(
pHal,
PHHAL_HW_RC663_CMD_LPCD_MODE_DEFAULT,
0,
0,
PH_NFCRDLIB_EXAMPLE_LPCD_GUARDTIME,
PH_NFCRDLIB_EXAMPLE_LPCD_RFON_TIME);
/* Perform LPCD calibration to get I and Q values. */
status = phhalHw_Rc663_Cmd_Lpcd_GetConfig(pHal, &bValueI, &bValueQ);
CHECK_SUCCESS(status);
/* Configure I and Q values for LPCD detection cycle. */
status = phhalHw_Rc663_Cmd_Lpcd_SetConfig(
pHal,
PHHAL_HW_RC663_CMD_LPCD_MODE_POWERDOWN,
bValueI,
bValueQ,
PH_NFCRDLIB_EXAMPLE_LPCD_GUARDTIME,
PH_NFCRDLIB_EXAMPLE_LPCD_RFON_TIME);
return status;
}
void CLIF_IRQHandler(void)
{
/* Read the interrupt status of external interrupt attached to the reader IC IRQ pin */
if (phDriver_PinRead(PHDRIVER_PIN_IRQ, PH_DRIVER_PINFUNC_INTERRUPT))
{
phDriver_PinClearIntStatus(PHDRIVER_PIN_IRQ);
/* Call application registered callback. */
if (pHal->pRFISRCallback != NULL)
{
pHal->pRFISRCallback(pHal);
}
}
}
#endif /* NXPBUILD__PHHAL_HW_RC663 */
/******************************************************************************
** End Of File
******************************************************************************/

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/*----------------------------------------------------------------------------*/
/* Copyright 2020 NXP */
/* */
/* NXP Confidential. This software is owned or controlled by NXP and may only */
/* be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that you */
/* have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable license */
/* terms, then you may not retain, install, activate or otherwise use the */
/* software. */
/*----------------------------------------------------------------------------*/
/** \file
* Example Source abstracting component data structure and code initialization and code specific to HW used in the examples
* This file shall be present in all examples. A customer does not need to touch/modify this file. This file
* purely depends on the phNxpBuild_Lpc.h or phNxpBuild_App.h
* The phAppInit.h externs the component data structures initialized here that is in turn included by the core examples.
* The core example shall not use any other variable defined here except the RdLib component data structures(as explained above)
* The RdLib component initialization requires some user defined data and function pointers.
* These are defined in the respective examples and externed here.
*
* Keystore and Crypto initialization needs to be handled by application.
*
* $Author$
* $Revision$ (v07.10.00)
* $Date$
*
*/
/* Status header */
#include <ph_Status.h>
#include "phApp_Init.h"
#ifdef NXPBUILD__PHHAL_HW_PN7462AU
#include <phOsal.h>
#include <phFlashBoot.h>
#include <phhalTimer.h>
/*******************************************************************************
** Function Declarations
*******************************************************************************/
void phApp_CPU_Init(void);
/*******************************************************************************
** Global Variable Declaration
*******************************************************************************/
phhalHw_PN7462AU_DataParams_t * pHal;
#ifdef NXPBUILD__PHHAL_HW_TARGET
/* Parameters for L3 activation during Autocoll */
extern uint8_t sens_res[2] ;
extern uint8_t nfc_id1[3] ;
extern uint8_t sel_res ;
extern uint8_t nfc_id3 ;
extern uint8_t poll_res[18] ;
#endif /* NXPBUILD__PHHAL_HW_TARGET */
/*******************************************************************************
** Function Definitions
*******************************************************************************/
/**
* This function will initialize NXP NFC Controller.
*/
void phApp_CPU_Init(void)
{
phFlashBoot_Main();
phhalTimer_Init();
}
/**
* This function will initialize Hal Target Config
*/
phStatus_t phApp_HALConfigAutoColl(void)
{
#ifdef NXPBUILD__PHHAL_HW_TARGET
phStatus_t wStatus;
uint8_t bSystemCode[] = {0xFF, 0xFF};
/* Set Listen Parameters in HAL Buffer used during Autocoll */
wStatus = phhalHw_PN7462AU_SetListenParam(
pHal,
&sens_res[0],
&nfc_id1[0],
sel_res,
(poll_res[0] == 0x02 ? PH_ON : PH_OFF),
&poll_res[2],
&poll_res[8],
bSystemCode);
CHECK_SUCCESS(wStatus);
#endif /* NXPBUILD__PHHAL_HW_TARGET */
return PH_ERR_SUCCESS;
}
/* Configure LPCD (for PN7462AU) */
phStatus_t phApp_ConfigureLPCD(void)
{
phStatus_t status;
uint16_t wLpcdValue;
wLpcdValue = 0;
status = phhalHw_GetConfig(pHal, PHHAL_HW_CONFIG_PN7462AU_LPCD_NEW_VALUE, &wLpcdValue);
CHECK_SUCCESS(status);
if (wLpcdValue != 0x00)
{
status = phhalHw_SetConfig(pHal, PHHAL_HW_CONFIG_PN7462AU_LPCD_REF_VALUE, wLpcdValue);
CHECK_SUCCESS(status);
}
return status;
}
#endif /* NXPBUILD__PHHAL_HW_PN7462AU */
/******************************************************************************
** End Of File
******************************************************************************/

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@ -0,0 +1,195 @@
/*----------------------------------------------------------------------------*/
/* Copyright 2021-2023 NXP */
/* */
/* NXP Confidential. This software is owned or controlled by NXP and may only */
/* be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that you */
/* have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable license */
/* terms, then you may not retain, install, activate or otherwise use the */
/* software. */
/*----------------------------------------------------------------------------*/
/** \file
* Example Source abstracting component data structure and code initialization and code specific to HW used in the examples
* This file shall be present in all examples. A customer does not need to touch/modify this file. This file
* purely depends on the phNxpBuild_Lpc.h or phNxpBuild_App.h
* The phAppInit.h externs the component data structures initialized here that is in turn included by the core examples.
* The core example shall not use any other variable defined here except the RdLib component data structures(as explained above)
* The RdLib component initialization requires some user defined data and function pointers.
* These are defined in the respective examples and externed here.
*
* Keystore and Crypto initialization needs to be handled by application.
*
* $Author: NXP $
* $Revision: $ (v07.10.00)
* $Date: $
*
*/
#include <ph_Status.h>
#include "phApp_Init.h"
#ifdef NXPBUILD__PHHAL_HW_PN76XX
#include "phOsal.h"
#include "PN76xx.h"
#include "PN76_Eeprom.h"
#include "Clif.h"
/*********************************************************************************************************************/
/* LOCAL DEFINES */
/*********************************************************************************************************************/
/*******************************************************************************
** Function Declarations
*******************************************************************************/
void phApp_CPU_Init(void);
/*******************************************************************************
** Global Variable Declaration
*******************************************************************************/
phhalHw_Pn76xx_DataParams_t * pHal;
#ifdef NXPBUILD__PHHAL_HW_TARGET
/* Parameters for L3 activation during Autocoll */
extern uint8_t sens_res[2U] ;
extern uint8_t nfc_id1[3U] ;
extern uint8_t sel_res ;
extern uint8_t nfc_id3 ;
extern uint8_t poll_res[18U] ;
#endif /* NXPBUILD__PHHAL_HW_TARGET */
/*******************************************************************************
** Function Definitions
*******************************************************************************/
/**
* This function will initialize NXP NFC Controller.
*/
void phApp_CPU_Init(void)
{
#ifdef SEGGER_RTT_ENABLE
/* SEGGER RTT Init */
memset((uint8_t *)PN76_SEGGER_RTT_MEMORY_ALLOCATION_ADDRESS, 0, 0x4b8);
SEGGER_RTT_ConfigUpBuffer(0, NULL, NULL, 0, SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL);
#endif
/* To enable NS RF IRQ */
NVIC_EnableIRQ(CLIF_RF_IRQn);
/* To enable NS TIMER IRQ */
NVIC_EnableIRQ(TIMER_IRQn);
/* Initialize PMU */
PMU_Init();
/* Initialize SMU */
Smu_Init();
/* Initialize CLKGEN */
CLKGEN_Init();
}
/**
* This function will initialize Hal Target Config
*/
phStatus_t phApp_HALConfigAutoColl(void)
{
#ifdef NXPBUILD__PHHAL_HW_TARGET
phStatus_t wStatus;
uint8_t baDynamicUidConfig[1U] = { 1U }; /* Enable Dynamic UID feature on PN76XX. */
uint8_t baReadEepromConfig[24U] = { 0U };
/* Read Set Listen Parameters data from EEPROM */
wStatus = (PN76_Status_t)PN76_ReadEeprom(
baReadEepromConfig,
PHHAL_HW_PN76XX_SET_LISTEN_EEPROM_ADDR,
PHHAL_HW_PN76XX_SET_LISTEN_LEN
#ifdef NXPBUILD__PHHAL_HW_PN7642
, E_PN76_EEPROM_SECURE_LIB_CONFIG
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
);
CHECK_SUCCESS(wStatus);
/* Verify EEPROM data and configure Set Listen Parameters if EEPROM data is not correct. */
if ((memcmp(&baReadEepromConfig[0U], sens_res, 2U) != 0x00) ||
(memcmp(&baReadEepromConfig[2U], nfc_id1, 3U) != 0x00) ||
(memcmp(&baReadEepromConfig[5U], &sel_res, 1U) != 0x00) ||
(memcmp(&baReadEepromConfig[6U], poll_res, 18U) != 0x00))
{
/* Configure Set Listen Parameters. */
wStatus = phhalHw_Pn76xx_SetListenParameters(
pHal,
&sens_res[0],
&nfc_id1[0],
sel_res,
&poll_res[0],
nfc_id3);
CHECK_SUCCESS(wStatus);
}
/* Read Dynamic UID configuration from EEPROM */
wStatus = (PN76_Status_t)PN76_ReadEeprom(
baReadEepromConfig,
PHHAL_HW_PN76XX_DYNAMIC_UID_CONFG_ADDR,
0x01U
#ifdef NXPBUILD__PHHAL_HW_PN7642
, E_PN76_EEPROM_SECURE_LIB_CONFIG
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
);
CHECK_SUCCESS(wStatus);
/* Verify EEPROM data and perform Dynamic UID configuration if EEPROM data is not correct. */
if (baReadEepromConfig[0] != baDynamicUidConfig[0])
{
/* Configure Dynamic UID */
wStatus = PN76_WriteEeprom(
baDynamicUidConfig,
PHHAL_HW_PN76XX_DYNAMIC_UID_CONFG_ADDR,
0x01
#ifdef NXPBUILD__PHHAL_HW_PN7642
, E_PN76_EEPROM_SECURE_LIB_CONFIG
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
);
CHECK_SUCCESS(wStatus);
}
#endif /* NXPBUILD__PHHAL_HW_TARGET */
return PH_ERR_SUCCESS;
}
/* Configure LPCD (for PN76XX) */
phStatus_t phApp_ConfigureLPCD(void)
{
#ifdef NXPBUILD__PHHAL_HW_PN7642
phStatus_t status = PH_ERR_SUCCESS;
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_SET_LPCD_WAKEUPTIME_MS, 100U);
CHECK_SUCCESS(status);
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_LPCD_MODE, PHHAL_HW_PN76XX_LPCD_MODE_DEFAULT);
CHECK_SUCCESS(status);
status = phhalHw_Lpcd(pHal);
CHECK_SUCCESS(status);
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_SET_LPCD_WAKEUPTIME_MS, 330U);
CHECK_SUCCESS(status);
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_LPCD_MODE, PHHAL_HW_PN76XX_LPCD_MODE_POWERDOWN);
CHECK_SUCCESS(status);
return status;
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
#ifdef NXPBUILD__PHHAL_HW_PN7640
return PH_ERR_UNSUPPORTED_COMMAND;
#endif /* NXPBUILD__PHHAL_HW_PN7640 */
}
#endif /* NXPBUILD__PHHAL_HW_PN76XX */
/******************************************************************************
** End Of File
******************************************************************************/

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/*----------------------------------------------------------------------------*/
/* Copyright 2020 NXP */
/* */
/* NXP Confidential. This software is owned or controlled by NXP and may only */
/* be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that you */
/* have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable license */
/* terms, then you may not retain, install, activate or otherwise use the */
/* software. */
/*----------------------------------------------------------------------------*/
/** \file
* Example Source abstracting component data structure and code initialization and code specific to HW used in the examples
* This file shall be present in all examples. A customer does not need to touch/modify this file. This file
* purely depends on the phNxpBuild_Lpc.h or phNxpBuild_App.h
* The phAppInit.h externs the component data structures initialized here that is in turn included by the core examples.
* The core example shall not use any other variable defined here except the RdLib component data structures(as explained above)
* The RdLib component initialization requires some user defined data and function pointers.
* These are defined in the respective examples and externed here.
*
* Keystore and Crypto initialization needs to be handled by application.
*
* $Author$
* $Revision$ (v07.10.00)
* $Date$
*
*/
/* Status header */
#include <ph_Status.h>
#include "phApp_Init.h"
#ifdef NXPBUILD__PHHAL_HW_RC663
#include "BoardSelection.h"
/*******************************************************************************
** Function Declarations
*******************************************************************************/
#ifdef PH_PLATFORM_HAS_ICFRONTEND
void CLIF_IRQHandler(void);
#endif
/*******************************************************************************
** Global Variable Declaration
*******************************************************************************/
phbalReg_Type_t sBalParams;
phhalHw_Rc663_DataParams_t * pHal;
/*******************************************************************************
** Function Definitions
*******************************************************************************/
/* Configure LPCD (for CLRC663) */
phStatus_t phApp_ConfigureLPCD(void)
{
phStatus_t status;
uint8_t bValueI;
uint8_t bValueQ;
/* Configure LPCD calibration standby time (T4) and RF ON time (T3). */
status = phhalHw_Rc663_Cmd_Lpcd_SetConfig(
pHal,
PHHAL_HW_RC663_CMD_LPCD_MODE_DEFAULT,
0,
0,
PH_NFCRDLIB_EXAMPLE_LPCD_GUARDTIME,
PH_NFCRDLIB_EXAMPLE_LPCD_RFON_TIME);
/* Perform LPCD calibration to get I and Q values. */
status = phhalHw_Rc663_Cmd_Lpcd_GetConfig(pHal, &bValueI, &bValueQ);
CHECK_SUCCESS(status);
/* Configure I and Q values for LPCD detection cycle. */
status = phhalHw_Rc663_Cmd_Lpcd_SetConfig(
pHal,
PHHAL_HW_RC663_CMD_LPCD_MODE_POWERDOWN,
bValueI,
bValueQ,
PH_NFCRDLIB_EXAMPLE_LPCD_GUARDTIME,
PH_NFCRDLIB_EXAMPLE_LPCD_RFON_TIME);
return status;
}
void CLIF_IRQHandler(void)
{
/* Read the interrupt status of external interrupt attached to the reader IC IRQ pin */
if (phDriver_PinRead(PHDRIVER_PIN_IRQ, PH_DRIVER_PINFUNC_INTERRUPT))
{
phDriver_PinClearIntStatus(PHDRIVER_PIN_IRQ);
/* Call application registered callback. */
if (pHal->pRFISRCallback != NULL)
{
pHal->pRFISRCallback(pHal);
}
}
}
#endif /* NXPBUILD__PHHAL_HW_RC663 */
/******************************************************************************
** End Of File
******************************************************************************/

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/*----------------------------------------------------------------------------*/
/* Copyright 2020 NXP */
/* */
/* NXP Confidential. This software is owned or controlled by NXP and may only */
/* be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that you */
/* have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable license */
/* terms, then you may not retain, install, activate or otherwise use the */
/* software. */
/*----------------------------------------------------------------------------*/
/** \file
* Example Source abstracting component data structure and code initialization and code specific to HW used in the examples
* This file shall be present in all examples. A customer does not need to touch/modify this file. This file
* purely depends on the phNxpBuild_Lpc.h or phNxpBuild_App.h
* The phAppInit.h externs the component data structures initialized here that is in turn included by the core examples.
* The core example shall not use any other variable defined here except the RdLib component data structures(as explained above)
* The RdLib component initialization requires some user defined data and function pointers.
* These are defined in the respective examples and externed here.
*
* Keystore and Crypto initialization needs to be handled by application.
*
* $Author$
* $Revision$ (v07.10.00)
* $Date$
*
*/
/* Status header */
#include <ph_Status.h>
#include "phApp_Init.h"
#ifdef NXPBUILD__PHHAL_HW_PN7462AU
#include <phOsal.h>
#include <phFlashBoot.h>
#include <phhalTimer.h>
/*******************************************************************************
** Function Declarations
*******************************************************************************/
void phApp_CPU_Init(void);
/*******************************************************************************
** Global Variable Declaration
*******************************************************************************/
phhalHw_PN7462AU_DataParams_t * pHal;
#ifdef NXPBUILD__PHHAL_HW_TARGET
/* Parameters for L3 activation during Autocoll */
extern uint8_t sens_res[2] ;
extern uint8_t nfc_id1[3] ;
extern uint8_t sel_res ;
extern uint8_t nfc_id3 ;
extern uint8_t poll_res[18] ;
#endif /* NXPBUILD__PHHAL_HW_TARGET */
/*******************************************************************************
** Function Definitions
*******************************************************************************/
/**
* This function will initialize NXP NFC Controller.
*/
void phApp_CPU_Init(void)
{
phFlashBoot_Main();
phhalTimer_Init();
}
/**
* This function will initialize Hal Target Config
*/
phStatus_t phApp_HALConfigAutoColl(void)
{
#ifdef NXPBUILD__PHHAL_HW_TARGET
phStatus_t wStatus;
uint8_t bSystemCode[] = {0xFF, 0xFF};
/* Set Listen Parameters in HAL Buffer used during Autocoll */
wStatus = phhalHw_PN7462AU_SetListenParam(
pHal,
&sens_res[0],
&nfc_id1[0],
sel_res,
(poll_res[0] == 0x02 ? PH_ON : PH_OFF),
&poll_res[2],
&poll_res[8],
bSystemCode);
CHECK_SUCCESS(wStatus);
#endif /* NXPBUILD__PHHAL_HW_TARGET */
return PH_ERR_SUCCESS;
}
/* Configure LPCD (for PN7462AU) */
phStatus_t phApp_ConfigureLPCD(void)
{
phStatus_t status;
uint16_t wLpcdValue;
wLpcdValue = 0;
status = phhalHw_GetConfig(pHal, PHHAL_HW_CONFIG_PN7462AU_LPCD_NEW_VALUE, &wLpcdValue);
CHECK_SUCCESS(status);
if (wLpcdValue != 0x00)
{
status = phhalHw_SetConfig(pHal, PHHAL_HW_CONFIG_PN7462AU_LPCD_REF_VALUE, wLpcdValue);
CHECK_SUCCESS(status);
}
return status;
}
#endif /* NXPBUILD__PHHAL_HW_PN7462AU */
/******************************************************************************
** End Of File
******************************************************************************/

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/*----------------------------------------------------------------------------*/
/* Copyright 2021-2023 NXP */
/* */
/* NXP Confidential. This software is owned or controlled by NXP and may only */
/* be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that you */
/* have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable license */
/* terms, then you may not retain, install, activate or otherwise use the */
/* software. */
/*----------------------------------------------------------------------------*/
/** \file
* Example Source abstracting component data structure and code initialization and code specific to HW used in the examples
* This file shall be present in all examples. A customer does not need to touch/modify this file. This file
* purely depends on the phNxpBuild_Lpc.h or phNxpBuild_App.h
* The phAppInit.h externs the component data structures initialized here that is in turn included by the core examples.
* The core example shall not use any other variable defined here except the RdLib component data structures(as explained above)
* The RdLib component initialization requires some user defined data and function pointers.
* These are defined in the respective examples and externed here.
*
* Keystore and Crypto initialization needs to be handled by application.
*
* $Author: NXP $
* $Revision: $ (v07.10.00)
* $Date: $
*
*/
#include <ph_Status.h>
#include "phApp_Init.h"
#ifdef NXPBUILD__PHHAL_HW_PN76XX
#include "phOsal.h"
#include "PN76xx.h"
#include "PN76_Eeprom.h"
#include "Clif.h"
/*********************************************************************************************************************/
/* LOCAL DEFINES */
/*********************************************************************************************************************/
/*******************************************************************************
** Function Declarations
*******************************************************************************/
void phApp_CPU_Init(void);
/*******************************************************************************
** Global Variable Declaration
*******************************************************************************/
phhalHw_Pn76xx_DataParams_t * pHal;
#ifdef NXPBUILD__PHHAL_HW_TARGET
/* Parameters for L3 activation during Autocoll */
extern uint8_t sens_res[2U] ;
extern uint8_t nfc_id1[3U] ;
extern uint8_t sel_res ;
extern uint8_t nfc_id3 ;
extern uint8_t poll_res[18U] ;
#endif /* NXPBUILD__PHHAL_HW_TARGET */
/*******************************************************************************
** Function Definitions
*******************************************************************************/
/**
* This function will initialize NXP NFC Controller.
*/
void phApp_CPU_Init(void)
{
#ifdef SEGGER_RTT_ENABLE
/* SEGGER RTT Init */
memset((uint8_t *)PN76_SEGGER_RTT_MEMORY_ALLOCATION_ADDRESS, 0, 0x4b8);
SEGGER_RTT_ConfigUpBuffer(0, NULL, NULL, 0, SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL);
#endif
/* To enable NS RF IRQ */
NVIC_EnableIRQ(CLIF_RF_IRQn);
/* To enable NS TIMER IRQ */
NVIC_EnableIRQ(TIMER_IRQn);
/* Initialize PMU */
PMU_Init();
/* Initialize SMU */
Smu_Init();
/* Initialize CLKGEN */
CLKGEN_Init();
}
/**
* This function will initialize Hal Target Config
*/
phStatus_t phApp_HALConfigAutoColl(void)
{
#ifdef NXPBUILD__PHHAL_HW_TARGET
phStatus_t wStatus;
uint8_t baDynamicUidConfig[1U] = { 1U }; /* Enable Dynamic UID feature on PN76XX. */
uint8_t baReadEepromConfig[24U] = { 0U };
/* Read Set Listen Parameters data from EEPROM */
wStatus = (PN76_Status_t)PN76_ReadEeprom(
baReadEepromConfig,
PHHAL_HW_PN76XX_SET_LISTEN_EEPROM_ADDR,
PHHAL_HW_PN76XX_SET_LISTEN_LEN
#ifdef NXPBUILD__PHHAL_HW_PN7642
, E_PN76_EEPROM_SECURE_LIB_CONFIG
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
);
CHECK_SUCCESS(wStatus);
/* Verify EEPROM data and configure Set Listen Parameters if EEPROM data is not correct. */
if ((memcmp(&baReadEepromConfig[0U], sens_res, 2U) != 0x00) ||
(memcmp(&baReadEepromConfig[2U], nfc_id1, 3U) != 0x00) ||
(memcmp(&baReadEepromConfig[5U], &sel_res, 1U) != 0x00) ||
(memcmp(&baReadEepromConfig[6U], poll_res, 18U) != 0x00))
{
/* Configure Set Listen Parameters. */
wStatus = phhalHw_Pn76xx_SetListenParameters(
pHal,
&sens_res[0],
&nfc_id1[0],
sel_res,
&poll_res[0],
nfc_id3);
CHECK_SUCCESS(wStatus);
}
/* Read Dynamic UID configuration from EEPROM */
wStatus = (PN76_Status_t)PN76_ReadEeprom(
baReadEepromConfig,
PHHAL_HW_PN76XX_DYNAMIC_UID_CONFG_ADDR,
0x01U
#ifdef NXPBUILD__PHHAL_HW_PN7642
, E_PN76_EEPROM_SECURE_LIB_CONFIG
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
);
CHECK_SUCCESS(wStatus);
/* Verify EEPROM data and perform Dynamic UID configuration if EEPROM data is not correct. */
if (baReadEepromConfig[0] != baDynamicUidConfig[0])
{
/* Configure Dynamic UID */
wStatus = PN76_WriteEeprom(
baDynamicUidConfig,
PHHAL_HW_PN76XX_DYNAMIC_UID_CONFG_ADDR,
0x01
#ifdef NXPBUILD__PHHAL_HW_PN7642
, E_PN76_EEPROM_SECURE_LIB_CONFIG
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
);
CHECK_SUCCESS(wStatus);
}
#endif /* NXPBUILD__PHHAL_HW_TARGET */
return PH_ERR_SUCCESS;
}
/* Configure LPCD (for PN76XX) */
phStatus_t phApp_ConfigureLPCD(void)
{
#ifdef NXPBUILD__PHHAL_HW_PN7642
phStatus_t status = PH_ERR_SUCCESS;
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_SET_LPCD_WAKEUPTIME_MS, 100U);
CHECK_SUCCESS(status);
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_LPCD_MODE, PHHAL_HW_PN76XX_LPCD_MODE_DEFAULT);
CHECK_SUCCESS(status);
status = phhalHw_Lpcd(pHal);
CHECK_SUCCESS(status);
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_SET_LPCD_WAKEUPTIME_MS, 330U);
CHECK_SUCCESS(status);
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_LPCD_MODE, PHHAL_HW_PN76XX_LPCD_MODE_POWERDOWN);
CHECK_SUCCESS(status);
return status;
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
#ifdef NXPBUILD__PHHAL_HW_PN7640
return PH_ERR_UNSUPPORTED_COMMAND;
#endif /* NXPBUILD__PHHAL_HW_PN7640 */
}
#endif /* NXPBUILD__PHHAL_HW_PN76XX */
/******************************************************************************
** End Of File
******************************************************************************/

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/*----------------------------------------------------------------------------*/
/* Copyright 2020 NXP */
/* */
/* NXP Confidential. This software is owned or controlled by NXP and may only */
/* be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that you */
/* have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable license */
/* terms, then you may not retain, install, activate or otherwise use the */
/* software. */
/*----------------------------------------------------------------------------*/
/** \file
* Example Source abstracting component data structure and code initialization and code specific to HW used in the examples
* This file shall be present in all examples. A customer does not need to touch/modify this file. This file
* purely depends on the phNxpBuild_Lpc.h or phNxpBuild_App.h
* The phAppInit.h externs the component data structures initialized here that is in turn included by the core examples.
* The core example shall not use any other variable defined here except the RdLib component data structures(as explained above)
* The RdLib component initialization requires some user defined data and function pointers.
* These are defined in the respective examples and externed here.
*
* Keystore and Crypto initialization needs to be handled by application.
*
* $Author$
* $Revision$ (v07.10.00)
* $Date$
*
*/
/* Status header */
#include <ph_Status.h>
#include "phApp_Init.h"
#ifdef NXPBUILD__PHHAL_HW_RC663
#include "BoardSelection.h"
/*******************************************************************************
** Function Declarations
*******************************************************************************/
#ifdef PH_PLATFORM_HAS_ICFRONTEND
void CLIF_IRQHandler(void);
#endif
/*******************************************************************************
** Global Variable Declaration
*******************************************************************************/
phbalReg_Type_t sBalParams;
phhalHw_Rc663_DataParams_t * pHal;
/*******************************************************************************
** Function Definitions
*******************************************************************************/
/* Configure LPCD (for CLRC663) */
phStatus_t phApp_ConfigureLPCD(void)
{
phStatus_t status;
uint8_t bValueI;
uint8_t bValueQ;
/* Configure LPCD calibration standby time (T4) and RF ON time (T3). */
status = phhalHw_Rc663_Cmd_Lpcd_SetConfig(
pHal,
PHHAL_HW_RC663_CMD_LPCD_MODE_DEFAULT,
0,
0,
PH_NFCRDLIB_EXAMPLE_LPCD_GUARDTIME,
PH_NFCRDLIB_EXAMPLE_LPCD_RFON_TIME);
/* Perform LPCD calibration to get I and Q values. */
status = phhalHw_Rc663_Cmd_Lpcd_GetConfig(pHal, &bValueI, &bValueQ);
CHECK_SUCCESS(status);
/* Configure I and Q values for LPCD detection cycle. */
status = phhalHw_Rc663_Cmd_Lpcd_SetConfig(
pHal,
PHHAL_HW_RC663_CMD_LPCD_MODE_POWERDOWN,
bValueI,
bValueQ,
PH_NFCRDLIB_EXAMPLE_LPCD_GUARDTIME,
PH_NFCRDLIB_EXAMPLE_LPCD_RFON_TIME);
return status;
}
void CLIF_IRQHandler(void)
{
/* Read the interrupt status of external interrupt attached to the reader IC IRQ pin */
if (phDriver_PinRead(PHDRIVER_PIN_IRQ, PH_DRIVER_PINFUNC_INTERRUPT))
{
phDriver_PinClearIntStatus(PHDRIVER_PIN_IRQ);
/* Call application registered callback. */
if (pHal->pRFISRCallback != NULL)
{
pHal->pRFISRCallback(pHal);
}
}
}
#endif /* NXPBUILD__PHHAL_HW_RC663 */
/******************************************************************************
** End Of File
******************************************************************************/

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/*----------------------------------------------------------------------------*/
/* Copyright 2020 NXP */
/* */
/* NXP Confidential. This software is owned or controlled by NXP and may only */
/* be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that you */
/* have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable license */
/* terms, then you may not retain, install, activate or otherwise use the */
/* software. */
/*----------------------------------------------------------------------------*/
/** \file
* Example Source abstracting component data structure and code initialization and code specific to HW used in the examples
* This file shall be present in all examples. A customer does not need to touch/modify this file. This file
* purely depends on the phNxpBuild_Lpc.h or phNxpBuild_App.h
* The phAppInit.h externs the component data structures initialized here that is in turn included by the core examples.
* The core example shall not use any other variable defined here except the RdLib component data structures(as explained above)
* The RdLib component initialization requires some user defined data and function pointers.
* These are defined in the respective examples and externed here.
*
* Keystore and Crypto initialization needs to be handled by application.
*
* $Author$
* $Revision$ (v07.10.00)
* $Date$
*
*/
/* Status header */
#include <ph_Status.h>
#include "phApp_Init.h"
#ifdef NXPBUILD__PHHAL_HW_PN7462AU
#include <phOsal.h>
#include <phFlashBoot.h>
#include <phhalTimer.h>
/*******************************************************************************
** Function Declarations
*******************************************************************************/
void phApp_CPU_Init(void);
/*******************************************************************************
** Global Variable Declaration
*******************************************************************************/
phhalHw_PN7462AU_DataParams_t * pHal;
#ifdef NXPBUILD__PHHAL_HW_TARGET
/* Parameters for L3 activation during Autocoll */
extern uint8_t sens_res[2] ;
extern uint8_t nfc_id1[3] ;
extern uint8_t sel_res ;
extern uint8_t nfc_id3 ;
extern uint8_t poll_res[18] ;
#endif /* NXPBUILD__PHHAL_HW_TARGET */
/*******************************************************************************
** Function Definitions
*******************************************************************************/
/**
* This function will initialize NXP NFC Controller.
*/
void phApp_CPU_Init(void)
{
phFlashBoot_Main();
phhalTimer_Init();
}
/**
* This function will initialize Hal Target Config
*/
phStatus_t phApp_HALConfigAutoColl(void)
{
#ifdef NXPBUILD__PHHAL_HW_TARGET
phStatus_t wStatus;
uint8_t bSystemCode[] = {0xFF, 0xFF};
/* Set Listen Parameters in HAL Buffer used during Autocoll */
wStatus = phhalHw_PN7462AU_SetListenParam(
pHal,
&sens_res[0],
&nfc_id1[0],
sel_res,
(poll_res[0] == 0x02 ? PH_ON : PH_OFF),
&poll_res[2],
&poll_res[8],
bSystemCode);
CHECK_SUCCESS(wStatus);
#endif /* NXPBUILD__PHHAL_HW_TARGET */
return PH_ERR_SUCCESS;
}
/* Configure LPCD (for PN7462AU) */
phStatus_t phApp_ConfigureLPCD(void)
{
phStatus_t status;
uint16_t wLpcdValue;
wLpcdValue = 0;
status = phhalHw_GetConfig(pHal, PHHAL_HW_CONFIG_PN7462AU_LPCD_NEW_VALUE, &wLpcdValue);
CHECK_SUCCESS(status);
if (wLpcdValue != 0x00)
{
status = phhalHw_SetConfig(pHal, PHHAL_HW_CONFIG_PN7462AU_LPCD_REF_VALUE, wLpcdValue);
CHECK_SUCCESS(status);
}
return status;
}
#endif /* NXPBUILD__PHHAL_HW_PN7462AU */
/******************************************************************************
** End Of File
******************************************************************************/

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@ -0,0 +1,195 @@
/*----------------------------------------------------------------------------*/
/* Copyright 2021-2023 NXP */
/* */
/* NXP Confidential. This software is owned or controlled by NXP and may only */
/* be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that you */
/* have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable license */
/* terms, then you may not retain, install, activate or otherwise use the */
/* software. */
/*----------------------------------------------------------------------------*/
/** \file
* Example Source abstracting component data structure and code initialization and code specific to HW used in the examples
* This file shall be present in all examples. A customer does not need to touch/modify this file. This file
* purely depends on the phNxpBuild_Lpc.h or phNxpBuild_App.h
* The phAppInit.h externs the component data structures initialized here that is in turn included by the core examples.
* The core example shall not use any other variable defined here except the RdLib component data structures(as explained above)
* The RdLib component initialization requires some user defined data and function pointers.
* These are defined in the respective examples and externed here.
*
* Keystore and Crypto initialization needs to be handled by application.
*
* $Author: NXP $
* $Revision: $ (v07.10.00)
* $Date: $
*
*/
#include <ph_Status.h>
#include "phApp_Init.h"
#ifdef NXPBUILD__PHHAL_HW_PN76XX
#include "phOsal.h"
#include "PN76xx.h"
#include "PN76_Eeprom.h"
#include "Clif.h"
/*********************************************************************************************************************/
/* LOCAL DEFINES */
/*********************************************************************************************************************/
/*******************************************************************************
** Function Declarations
*******************************************************************************/
void phApp_CPU_Init(void);
/*******************************************************************************
** Global Variable Declaration
*******************************************************************************/
phhalHw_Pn76xx_DataParams_t * pHal;
#ifdef NXPBUILD__PHHAL_HW_TARGET
/* Parameters for L3 activation during Autocoll */
extern uint8_t sens_res[2U] ;
extern uint8_t nfc_id1[3U] ;
extern uint8_t sel_res ;
extern uint8_t nfc_id3 ;
extern uint8_t poll_res[18U] ;
#endif /* NXPBUILD__PHHAL_HW_TARGET */
/*******************************************************************************
** Function Definitions
*******************************************************************************/
/**
* This function will initialize NXP NFC Controller.
*/
void phApp_CPU_Init(void)
{
#ifdef SEGGER_RTT_ENABLE
/* SEGGER RTT Init */
memset((uint8_t *)PN76_SEGGER_RTT_MEMORY_ALLOCATION_ADDRESS, 0, 0x4b8);
SEGGER_RTT_ConfigUpBuffer(0, NULL, NULL, 0, SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL);
#endif
/* To enable NS RF IRQ */
NVIC_EnableIRQ(CLIF_RF_IRQn);
/* To enable NS TIMER IRQ */
NVIC_EnableIRQ(TIMER_IRQn);
/* Initialize PMU */
PMU_Init();
/* Initialize SMU */
Smu_Init();
/* Initialize CLKGEN */
CLKGEN_Init();
}
/**
* This function will initialize Hal Target Config
*/
phStatus_t phApp_HALConfigAutoColl(void)
{
#ifdef NXPBUILD__PHHAL_HW_TARGET
phStatus_t wStatus;
uint8_t baDynamicUidConfig[1U] = { 1U }; /* Enable Dynamic UID feature on PN76XX. */
uint8_t baReadEepromConfig[24U] = { 0U };
/* Read Set Listen Parameters data from EEPROM */
wStatus = (PN76_Status_t)PN76_ReadEeprom(
baReadEepromConfig,
PHHAL_HW_PN76XX_SET_LISTEN_EEPROM_ADDR,
PHHAL_HW_PN76XX_SET_LISTEN_LEN
#ifdef NXPBUILD__PHHAL_HW_PN7642
, E_PN76_EEPROM_SECURE_LIB_CONFIG
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
);
CHECK_SUCCESS(wStatus);
/* Verify EEPROM data and configure Set Listen Parameters if EEPROM data is not correct. */
if ((memcmp(&baReadEepromConfig[0U], sens_res, 2U) != 0x00) ||
(memcmp(&baReadEepromConfig[2U], nfc_id1, 3U) != 0x00) ||
(memcmp(&baReadEepromConfig[5U], &sel_res, 1U) != 0x00) ||
(memcmp(&baReadEepromConfig[6U], poll_res, 18U) != 0x00))
{
/* Configure Set Listen Parameters. */
wStatus = phhalHw_Pn76xx_SetListenParameters(
pHal,
&sens_res[0],
&nfc_id1[0],
sel_res,
&poll_res[0],
nfc_id3);
CHECK_SUCCESS(wStatus);
}
/* Read Dynamic UID configuration from EEPROM */
wStatus = (PN76_Status_t)PN76_ReadEeprom(
baReadEepromConfig,
PHHAL_HW_PN76XX_DYNAMIC_UID_CONFG_ADDR,
0x01U
#ifdef NXPBUILD__PHHAL_HW_PN7642
, E_PN76_EEPROM_SECURE_LIB_CONFIG
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
);
CHECK_SUCCESS(wStatus);
/* Verify EEPROM data and perform Dynamic UID configuration if EEPROM data is not correct. */
if (baReadEepromConfig[0] != baDynamicUidConfig[0])
{
/* Configure Dynamic UID */
wStatus = PN76_WriteEeprom(
baDynamicUidConfig,
PHHAL_HW_PN76XX_DYNAMIC_UID_CONFG_ADDR,
0x01
#ifdef NXPBUILD__PHHAL_HW_PN7642
, E_PN76_EEPROM_SECURE_LIB_CONFIG
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
);
CHECK_SUCCESS(wStatus);
}
#endif /* NXPBUILD__PHHAL_HW_TARGET */
return PH_ERR_SUCCESS;
}
/* Configure LPCD (for PN76XX) */
phStatus_t phApp_ConfigureLPCD(void)
{
#ifdef NXPBUILD__PHHAL_HW_PN7642
phStatus_t status = PH_ERR_SUCCESS;
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_SET_LPCD_WAKEUPTIME_MS, 100U);
CHECK_SUCCESS(status);
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_LPCD_MODE, PHHAL_HW_PN76XX_LPCD_MODE_DEFAULT);
CHECK_SUCCESS(status);
status = phhalHw_Lpcd(pHal);
CHECK_SUCCESS(status);
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_SET_LPCD_WAKEUPTIME_MS, 330U);
CHECK_SUCCESS(status);
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_LPCD_MODE, PHHAL_HW_PN76XX_LPCD_MODE_POWERDOWN);
CHECK_SUCCESS(status);
return status;
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
#ifdef NXPBUILD__PHHAL_HW_PN7640
return PH_ERR_UNSUPPORTED_COMMAND;
#endif /* NXPBUILD__PHHAL_HW_PN7640 */
}
#endif /* NXPBUILD__PHHAL_HW_PN76XX */
/******************************************************************************
** End Of File
******************************************************************************/

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/*----------------------------------------------------------------------------*/
/* Copyright 2020 NXP */
/* */
/* NXP Confidential. This software is owned or controlled by NXP and may only */
/* be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that you */
/* have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable license */
/* terms, then you may not retain, install, activate or otherwise use the */
/* software. */
/*----------------------------------------------------------------------------*/
/** \file
* Example Source abstracting component data structure and code initialization and code specific to HW used in the examples
* This file shall be present in all examples. A customer does not need to touch/modify this file. This file
* purely depends on the phNxpBuild_Lpc.h or phNxpBuild_App.h
* The phAppInit.h externs the component data structures initialized here that is in turn included by the core examples.
* The core example shall not use any other variable defined here except the RdLib component data structures(as explained above)
* The RdLib component initialization requires some user defined data and function pointers.
* These are defined in the respective examples and externed here.
*
* Keystore and Crypto initialization needs to be handled by application.
*
* $Author$
* $Revision$ (v07.10.00)
* $Date$
*
*/
/* Status header */
#include <ph_Status.h>
#include "phApp_Init.h"
#ifdef NXPBUILD__PHHAL_HW_RC663
#include "BoardSelection.h"
/*******************************************************************************
** Function Declarations
*******************************************************************************/
#ifdef PH_PLATFORM_HAS_ICFRONTEND
void CLIF_IRQHandler(void);
#endif
/*******************************************************************************
** Global Variable Declaration
*******************************************************************************/
phbalReg_Type_t sBalParams;
phhalHw_Rc663_DataParams_t * pHal;
/*******************************************************************************
** Function Definitions
*******************************************************************************/
/* Configure LPCD (for CLRC663) */
phStatus_t phApp_ConfigureLPCD(void)
{
phStatus_t status;
uint8_t bValueI;
uint8_t bValueQ;
/* Configure LPCD calibration standby time (T4) and RF ON time (T3). */
status = phhalHw_Rc663_Cmd_Lpcd_SetConfig(
pHal,
PHHAL_HW_RC663_CMD_LPCD_MODE_DEFAULT,
0,
0,
PH_NFCRDLIB_EXAMPLE_LPCD_GUARDTIME,
PH_NFCRDLIB_EXAMPLE_LPCD_RFON_TIME);
/* Perform LPCD calibration to get I and Q values. */
status = phhalHw_Rc663_Cmd_Lpcd_GetConfig(pHal, &bValueI, &bValueQ);
CHECK_SUCCESS(status);
/* Configure I and Q values for LPCD detection cycle. */
status = phhalHw_Rc663_Cmd_Lpcd_SetConfig(
pHal,
PHHAL_HW_RC663_CMD_LPCD_MODE_POWERDOWN,
bValueI,
bValueQ,
PH_NFCRDLIB_EXAMPLE_LPCD_GUARDTIME,
PH_NFCRDLIB_EXAMPLE_LPCD_RFON_TIME);
return status;
}
void CLIF_IRQHandler(void)
{
/* Read the interrupt status of external interrupt attached to the reader IC IRQ pin */
if (phDriver_PinRead(PHDRIVER_PIN_IRQ, PH_DRIVER_PINFUNC_INTERRUPT))
{
phDriver_PinClearIntStatus(PHDRIVER_PIN_IRQ);
/* Call application registered callback. */
if (pHal->pRFISRCallback != NULL)
{
pHal->pRFISRCallback(pHal);
}
}
}
#endif /* NXPBUILD__PHHAL_HW_RC663 */
/******************************************************************************
** End Of File
******************************************************************************/

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/*----------------------------------------------------------------------------*/
/* Copyright 2016-2023 NXP */
/* */
/* NXP Confidential. This software is owned or controlled by NXP and may only */
/* be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that you */
/* have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable license */
/* terms, then you may not retain, install, activate or otherwise use the */
/* software. */
/*----------------------------------------------------------------------------*/
/** \file
*
* Please refer Readme.txt file for hardware pin configuration, software configuration and steps to build and
* execute the project.
* $Author$
* $Revision$ (v07.10.00)
* $Date$
*
*/
/**
* Reader Library Headers
*/
/* Local headers */
#include "NfcrdlibTst12_Rc663Lpcd.h"
#include "phDriver.h"
#include "BoardSelection.h"
#include "phhalHw.h"
/* Check for LPC1769 controller based boards. */
#if defined(PHDRIVER_LPC1769RC663_BOARD)
#include "board.h"
#define PHDRIVER_LPC1769
#endif
/*******************************************************************************
** Global Defines
*******************************************************************************/
/*HAL variables*/
uint8_t bHalBufferTx[260]; /* HAL TX buffer. Size 260 */
uint8_t bHalBufferRx[260]; /* HAL RX buffer. Size 260 */
phbalReg_Type_t sBalParams;
#ifdef NXPBUILD__PHHAL_HW_RC663
phhalHw_Rc663_DataParams_t sHalParams;
#endif
uint8_t bDataBuffer;
/*******************************************************************************
** Extern Defines
*******************************************************************************/
/*******************************************************************************
** Const Defines
*******************************************************************************/
/*******************************************************************************
** Static Defines
*******************************************************************************/
#ifdef PHOSAL_FREERTOS_STATIC_MEM_ALLOCATION
uint32_t ExLpcdTaskBuffer[EX11_LPCD_TASK_STACK];
#else /* PHOSAL_FREERTOS_STATIC_MEM_ALLOCATION */
#define ExLpcdTaskBuffer NULL
#endif /* PHOSAL_FREERTOS_STATIC_MEM_ALLOCATION */
#define PH_CONFIG_DONT_CARE PH_OFF
#define PH_CONFIG_DISABLE PH_OFF
#define PH_CONFIG_ENABLE PH_ON
#ifdef DEBUG
#include <stdio.h>
#define DEBUG_PRINTF(...) printf(__VA_ARGS__); fflush(stdout)
#define DEBUG_SCANF(...) fflush(stdin); scanf(__VA_ARGS__); fflush(stdin)
#else /* DEBUG */
#define DEBUG_PRINTF(...)
#define DEBUG_SCANF(...)
#endif /* DEBUG */
#define CHECK_STATUS(x) \
if ((x) != PH_ERR_SUCCESS) \
{ \
DEBUG_PRINTF("Line: %d Error - (0x%04X) has occurred : 0xCCEE CC-Component ID, EE-Error code. Refer-ph_Status.h\n", __LINE__, (x)); \
}
/*******************************************************************************
** Function Declarations
*******************************************************************************/
static phStatus_t phApp_Clif_Init( uint8_t *pTxBuffer, uint16_t wTxBufSize, uint8_t *pRxBuffer, uint16_t wRxBufSize);
/*******************************************************************************
** Extern function for RTOX
** This example will not need RTOX and the function implementation is empty.
*******************************************************************************/
/*******************************************************************************
** Main Function
*******************************************************************************/
int main (void)
{
do
{
phStatus_t status = PH_ERR_INTERNAL_ERROR;
#ifndef PH_OSAL_NULLOS
phOsal_ThreadObj_t Tst12LpcdThreadObj;
#endif
/* Perform OSAL Initialization. */
(void)phOsal_Init();
DEBUG_PRINTF("**********Rc663 Lpcd Example**********\n");
status = phbalReg_Init(&sBalParams, sizeof(phbalReg_Type_t));
CHECK_STATUS(status);
/* Perform Platform Init */
status = phApp_Clif_Init(bHalBufferTx, sizeof(bHalBufferTx), bHalBufferRx, sizeof(bHalBufferRx));
CHECK_STATUS(status);
if(status != PH_ERR_SUCCESS) break;
#ifdef PH_OSAL_NULLOS
Tst12_LpcdThread(NULL);
#else
Tst12LpcdThreadObj.pTaskName = (uint8_t *) "Ex12Lpcd";
Tst12LpcdThreadObj.pStackBuffer = ExLpcdTaskBuffer;
Tst12LpcdThreadObj.priority = EX11_LPCD_TASK_PRIO;
Tst12LpcdThreadObj.stackSizeInNum = EX11_LPCD_TASK_STACK;
phOsal_ThreadCreate(&Tst12LpcdThreadObj.ThreadHandle, &Tst12LpcdThreadObj, &Tst12_LpcdThread, NULL);
phOsal_StartScheduler();
#endif
DEBUG_PRINTF("RTOS error : Scheduler exited. \n");
} while(0);
while(1); //Comes here if initialization failure or scheduler exit due to error
return 0;
}
/**
* This Task demonstrates the usage of discovery loop.
* It detects and reports the NFC technology type and performs read NDEF in case any NFC forum tags are detected.
* If a P2P device is detected then LLCP activate will be called to perform Client/Server operation from another Task.
* \param pDataParams The discovery loop data parameters
* \note This Task will never return and Discovery loop run will be called in a infinite while loop.
*/
void Tst12_LpcdThread(void * pParam)
{
phStatus_t status;
uint8_t bValueI;
uint8_t bValueQ;
uint8_t bChargePump;
uint8_t bDigitalFilter;
uint16_t wDetectionOption;
uint8_t bTCOption;
uint8_t bTCScenario;
uint8_t bLoopOptions;
uint8_t bLoopScenarios;
uint16_t wPowerDownTimeMs;
uint16_t wDetectionTimeUs;
uint32_t dwInput;
while(1)
{
/* Default Values */
status = PH_ERR_SUCCESS;
bValueI = 0;
bValueQ = 0;
bChargePump = 0;
bDigitalFilter = 0;
bTCOption = 0;
bTCScenario = 0;
bLoopOptions = 0;
bLoopScenarios = 0;
wDetectionOption= 0;
wPowerDownTimeMs= 100;
wDetectionTimeUs= 56;
dwInput = 0;
do
{
DEBUG_PRINTF("Select the below Test Cases Options :-\n");
DEBUG_PRINTF("0 :- Execute both the Test Case Options\n");
DEBUG_PRINTF("1 :- Functional Test Cases\n");
DEBUG_PRINTF("2 :- Timing Test Cases\n");
DEBUG_PRINTF("Enter here : ");
DEBUG_SCANF("%d", &dwInput);
bTCOption = (uint8_t)dwInput;
if (bTCOption == EX11_LPCD_TC_OPTION_DEFAULT)
{
bLoopOptions = 1;
bTCOption = EX11_LPCD_TC_FUNCTIONAL;
}
do {
if (bTCOption == EX11_LPCD_TC_FUNCTIONAL)
{
DEBUG_PRINTF("Proceeding with Functional Test Cases.\n");
DEBUG_PRINTF("Select the below Test Cases Scenarios :-\n");
DEBUG_PRINTF("0 :- Execute all the scenarios\n");
DEBUG_PRINTF("1 :- Digital Filter = Disabled; Charge Pump = Disabled; Detection Option = Don't Care\n");
DEBUG_PRINTF("2 :- Digital Filter = Disabled; Charge Pump = Enabled; Detection Option = Don't Care\n");
DEBUG_PRINTF("3 :- Digital Filter = Enabled; Charge Pump = Disabled; Detection Option = Option 1\n");
DEBUG_PRINTF("4 :- Digital Filter = Enabled; Charge Pump = Disabled; Detection Option = Option 2\n");
DEBUG_PRINTF("5 :- Digital Filter = Enabled; Charge Pump = Enabled; Detection Option = Option 1\n");
DEBUG_PRINTF("6 :- Digital Filter = Enabled; Charge Pump = Enabled; Detection Option = Option 2\n");
DEBUG_PRINTF("7 :- Calibration is performed with load on the antenna. During Lpcd Loop unload the antenna.\n");
DEBUG_PRINTF("Enter here : ");
DEBUG_SCANF("%d", &dwInput);
bTCScenario = (uint8_t)dwInput;
if (bTCScenario > EX11_LPCD_TC_SCENARIO_7)
{
DEBUG_PRINTF("INVALID SELECTION\n");
break;
}
}
else if (bTCOption == EX11_LPCD_TC_TIMING)
{
DEBUG_PRINTF("Proceeding with Rf/Power Test Cases.\n");
DEBUG_PRINTF("Select the below Test Cases Scenarios :-\n");
DEBUG_PRINTF("0 :- Execute all the scenarios\n");
DEBUG_PRINTF("2 :- Digital Filter = Disabled; Charge Pump = Enabled; Detection Option = Don't Care\n");
DEBUG_PRINTF("3 :- Digital Filter = Enabled; Charge Pump = Disabled; Detection Option = Disabled\n");
DEBUG_PRINTF("4 :- Digital Filter = Enabled; Charge Pump = Disabled; Detection Option = Enabled\n");
DEBUG_PRINTF("Enter here : ");
DEBUG_SCANF("%d", &dwInput);
bTCScenario = (uint8_t)dwInput;
if ((bTCScenario != EX11_LPCD_TC_SCENARIO_2) && (bTCScenario != EX11_LPCD_TC_SCENARIO_3)
&& (bTCScenario != EX11_LPCD_TC_SCENARIO_4) && (bTCScenario != EX11_LPCD_TC_SCENARIO_DEFAULT))
{
DEBUG_PRINTF("INVALID SELECTION\n");
break;
}
if (bTCScenario != EX11_LPCD_TC_SCENARIO_DEFAULT)
{
DEBUG_PRINTF("Enter Detection Time/Rf-On Time in microseconds(us):- ");
DEBUG_SCANF("%d", &dwInput);
wDetectionTimeUs = (uint16_t)dwInput;
DEBUG_PRINTF("Enter Power Down/Standby Time milliseconds(ms):- ");
DEBUG_SCANF("%d", &dwInput);
wPowerDownTimeMs = (uint16_t)dwInput;
}
}
else
{
DEBUG_PRINTF("INVALID SELECTION\n");
break;
}
if (bTCScenario == EX11_LPCD_TC_SCENARIO_DEFAULT)
{
bLoopScenarios = 1;
bTCScenario = EX11_LPCD_TC_SCENARIO_1;
}
do {
if (bTCOption == EX11_LPCD_TC_TIMING)
{
switch(bLoopScenarios)
{
case 1: bTCScenario = EX11_LPCD_TC_SCENARIO_2;
bLoopScenarios++;
break;
case 2: bTCScenario = EX11_LPCD_TC_SCENARIO_3;
bLoopScenarios++;
break;
case 3: bTCScenario = EX11_LPCD_TC_SCENARIO_4;
bLoopScenarios++;
break;
default : bLoopScenarios = PH_OFF;
break;
}
}
if ((bTCOption == EX11_LPCD_TC_TIMING) && (bTCScenario == EX11_LPCD_TC_SCENARIO_5))
{
break;
}
switch (bTCScenario)
{
case EX11_LPCD_TC_SCENARIO_1:
bDigitalFilter = PH_CONFIG_DISABLE;
bChargePump = PH_CONFIG_DISABLE;
wDetectionOption= PH_CONFIG_DONT_CARE;
DEBUG_PRINTF("Executing Test Cases Scenario 1 : Digital Filter : Disabled; Charge Pump : Disabled; Detection Option : NA.\n");
break;
case EX11_LPCD_TC_SCENARIO_2:
bDigitalFilter = PH_CONFIG_DISABLE;
bChargePump = PH_CONFIG_ENABLE;
wDetectionOption= PH_CONFIG_DONT_CARE;
DEBUG_PRINTF("Executing Test Cases Scenario 2 : Digital Filter : Disabled; Charge Pump : Enabled; Detection Option : NA.\n");
break;
case EX11_LPCD_TC_SCENARIO_3:
bDigitalFilter = PH_CONFIG_ENABLE;
bChargePump = PH_CONFIG_DISABLE;
wDetectionOption= PHHAL_HW_RC663_FILTER_OPTION1;
DEBUG_PRINTF("Executing Test Cases Scenario 3 : Digital Filter : Enabled; Charge Pump : Disabled; Detection Option : Option 1.\n");
break;
case EX11_LPCD_TC_SCENARIO_4:
bDigitalFilter = PH_CONFIG_ENABLE;
bChargePump = PH_CONFIG_DISABLE;
wDetectionOption= PHHAL_HW_RC663_FILTER_OPTION2;
DEBUG_PRINTF("Executing Test Cases Scenario 4 : Digital Filter : Enabled; Charge Pump : Disabled; Detection Option : Option 2.\n");
break;
case EX11_LPCD_TC_SCENARIO_5:
bDigitalFilter = PH_CONFIG_ENABLE;
bChargePump = PH_CONFIG_ENABLE;
wDetectionOption= PHHAL_HW_RC663_FILTER_OPTION1;
DEBUG_PRINTF("Executing Test Cases Scenario 5 : Digital Filter : Enabled; Charge Pump : Enabled; Detection Option : Option 1.\n");
break;
case EX11_LPCD_TC_SCENARIO_6:
bDigitalFilter = PH_CONFIG_ENABLE;
bChargePump = PH_CONFIG_ENABLE;
wDetectionOption= PHHAL_HW_RC663_FILTER_OPTION2;
DEBUG_PRINTF("Executing Test Cases Scenario 6 : Digital Filter : Enabled; Charge Pump : Enabled; Detection Option : Option 2.\n");
break;
case EX11_LPCD_TC_SCENARIO_7:
bDigitalFilter = PH_CONFIG_DISABLE;
bChargePump = PH_CONFIG_DISABLE;
wDetectionOption= PH_CONFIG_DONT_CARE;
DEBUG_PRINTF("Executing Test Cases Scenario 7 : Calibration is performed with load on the antenna. During Lpcd Loop unload the antenna.\n");
break;
}
if ((bTCOption == EX11_LPCD_TC_FUNCTIONAL) && (bTCScenario == EX11_LPCD_TC_SCENARIO_7))
{
DEBUG_PRINTF("Starting Calibration Process. Load the antenna\nPress any key once done : ");
}
else
{
DEBUG_PRINTF("Starting Calibration Process. Unload the antenna\nPress any key once done : ");
}
DEBUG_SCANF("%d", &dwInput);
/* Set the Charge Pump */
status = phhalHw_SetConfig(&sHalParams, PHHAL_HW_RC663_CONFIG_LPCD_CHARGEPUMP, bChargePump);
CHECK_STATUS(status);
/* Set the Digital Filter */
status = phhalHw_SetConfig(&sHalParams, PHHAL_HW_RC663_CONFIG_LPCD_FILTER,
((uint16_t)(bDigitalFilter) | wDetectionOption));
CHECK_STATUS(status);
/* Setting the timers. */
status = phhalHw_Rc663_Cmd_Lpcd_SetConfig(&sHalParams, PHHAL_HW_RC663_CMD_LPCD_MODE_DEFAULT,
bValueI, bValueQ, wPowerDownTimeMs, wDetectionTimeUs);
CHECK_STATUS(status);
/* Configure LPCD */
status = phhalHw_Rc663_Cmd_Lpcd_GetConfig(&sHalParams, &bValueI, &bValueQ);
CHECK_STATUS(status);
status = phhalHw_Rc663_Cmd_Lpcd_SetConfig(&sHalParams, PHHAL_HW_RC663_CMD_LPCD_MODE_POWERDOWN,
bValueI, bValueQ,wPowerDownTimeMs, wDetectionTimeUs);
CHECK_STATUS(status);
if ((bTCOption == EX11_LPCD_TC_FUNCTIONAL) && (bTCScenario == EX11_LPCD_TC_SCENARIO_7))
{
DEBUG_PRINTF("Calibration Process Completed\nI = 0x%x\nQ = 0x%x\nExecuting Lpcd Process, Unload the antenna\n", bValueI, bValueQ);
}
else
{
DEBUG_PRINTF("Calibration Process Completed\nI = 0x%x\nQ = 0x%x\nExecuting Lpcd Process, Load the antenna\n", bValueI, bValueQ);
}
/* Start LPCD. */
status = phhalHw_Lpcd(&sHalParams);
if(status == PH_ERR_SUCCESS)
{
DEBUG_PRINTF("Lpcd Success\n");
}
else
{
DEBUG_PRINTF("Lpcd Failed\n");
}
}while((bLoopScenarios) && ((bTCScenario++) < EX11_LPCD_TC_SCENARIO_7));
}while((bLoopOptions) && ((bTCOption++) < EX11_LPCD_TC_TIMING));
}while(1);
}
}
static phStatus_t phApp_Clif_Init( uint8_t *pTxBuffer, uint16_t wTxBufSize, uint8_t *pRxBuffer, uint16_t wRxBufSize)
{
phStatus_t wStatus;
#ifdef PH_PLATFORM_HAS_ICFRONTEND
phDriver_Pin_Config_t pinCfg;
#endif
#ifdef NXPBUILD__PHHAL_HW_RC663
/* Initialize the RC663 HAL component */
PH_CHECK_SUCCESS_FCT(wStatus, phhalHw_Rc663_Init(
&sHalParams,
sizeof(phhalHw_Rc663_DataParams_t),
&sBalParams,
(uint8_t *)gkphhalHw_Rc663_LoadConfig,
pTxBuffer,
wTxBufSize,
pRxBuffer,
wRxBufSize
));
#endif /* NXPBUILD__PHHAL_HW_RC663 */
#ifdef PH_PLATFORM_HAS_ICFRONTEND
pinCfg.bOutputLogic = PH_DRIVER_SET_LOW;
pinCfg.bPullSelect = PHDRIVER_PIN_IRQ_PULL_CFG;
pinCfg.eInterruptConfig = PIN_IRQ_TRIGGER_TYPE;
phDriver_PinConfig(PHDRIVER_PIN_IRQ, PH_DRIVER_PINFUNC_INTERRUPT, &pinCfg);
#ifdef PHDRIVER_LPC1769
NVIC_SetPriority(EINT_IRQn, EINT_PRIORITY);
/* Enable interrupt in the NVIC */
NVIC_ClearPendingIRQ(EINT_IRQn);
NVIC_EnableIRQ(EINT_IRQn);
#endif /* PHDRIVER_LPC1769 */
#endif /* #ifdef PH_PLATFORM_HAS_ICFRONTEND */
wStatus = phhalHw_Rc663_ReadRegister(&sHalParams, PHHAL_HW_RC663_REG_VERSION, &bDataBuffer);
CHECK_STATUS(wStatus);
DEBUG_PRINTF("\nReader chip RC663: 0x%02x\n", bDataBuffer);
return PH_ERR_SUCCESS;
}
#ifdef PH_PLATFORM_HAS_ICFRONTEND
void CLIF_IRQHandler(void)
{
/* Read the interrupt status of external interrupt attached to the reader IC IRQ pin */
if (phDriver_PinRead(PHDRIVER_PIN_IRQ, PH_DRIVER_PINFUNC_INTERRUPT))
{
/* Call application registered callback. */
if (sHalParams.pRFISRCallback != NULL)
{
sHalParams.pRFISRCallback(&sHalParams);
}
}
phDriver_PinClearIntStatus(PHDRIVER_PIN_IRQ);
}
#endif /* PH_PLATFORM_HAS_ICFRONTEND */

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__________________________________________________
NXPNFCRDLIB TEST APPLICATION :
NFCRDLIBTST12_RC663LPCD
(V07.10.00)
__________________________________________________
Table of Contents
_________________
1 Document Purpose
2 Description of the NfcrdlibTst12_Rc663Lpcd
3 Restrictions on NfcrdlibTst12_Rc663Lpcd
4 Configurations of NfcrdlibTst12_Rc663Lpcd
5 Package Contents
6 Mandatory materials (not included)
7 Hardware Configuration
8 Software Configuration
9 Steps to build NfcrdlibTst12_Rc663Lpcd for LPC1769 with RC663 using MCUXpresso
10 Selection of Board / OSAL / Frontend (MCUXpresso)
11 Running NfcrdlibTst12_Rc663Lpcd
12 List of supported NFC Reader Boards/ICs
13 Reference Documents
1 Document Purpose
==================
This document describes the steps to be followed to execute
NfcrdlibTst12_Rc663Lpcd test application as well as it's known
problems and restrictions.
2 Description of the NfcrdlibTst12_Rc663Lpcd
============================================
- NfcrdlibTst12_Rc663Lpcd can be run with CLEV663B. (See Section-12
for supported versions)
- This test application will execute the test case as choosen by the
user which will set the Digital Filter, Charge Pump and Detection
Option as per the test case.
- This test application 7 Functional Scenarios. 3 out of these
scenarios are reused for Timing Test Cases.
- For Scenario 1 to 6, the Calibration Process is performed without
any load on the antenna. And the presence of any card in the
proximity is detected by the Lpcd Loop.
- For Scenario 1 to 6, if any load (Cards : Mifare Desfire EV1 (Type
A), ezlink Type B, Type F(Felica) RCS888, ICode SliX (SLI 15693),
Stackit ICode ILT (18000p3m3); Phone or any metal) are brought in
proximity then the test application detect the load the exits Lpcd
loop.
- For Scenario 7, the calibration process is performed with the
load(Cards : Mifare Desfire EV1 (Type A), ezlink Type B, Type
F(Felica) RCS888, ICode SliX (SLI 15693), Stackit ICode ILT
(18000p3m3); Phone or any metal) on any antenna. When the load is
removed during the Lpcd Loop, then this test application detect the
unloading on the antenna and exits Lpcd loop.
3 Restrictions on NfcrdlibTst12_Rc663Lpcd
=========================================
- NfcrdlibTst12_Rc663Lpcd is restricted to be run on NFC Reader
Boards/ICs mentioned in Section-12.
- The APIs are intended for NXP contact-less reader ICs only, as such
the APIs are not to be ported to any technology from any other
vendor.
- NXP will not support porting to any other vendor platform.
- This software project requires NxpNfcRdLib v07.10.00 or later.
4 Configurations of NfcrdlibTst12_Rc663Lpcd
===========================================
- The test application is written to perform lpcd with the
configuration as provided by the user.
- After the LPCD loop returns success, the test application wait for
the new input from user.
5 Package Contents
==================
- Readme.txt
+ This readme file
- NfcrdlibTst12_Rc663Lpcd.c
+ Main test application.
- intfs/NfcrdlibTst12_Rc663Lpcd.h
+ Interfaces/Defines specific to the example
- intfs/ph_NxpBuild_App.h
+ Reader library build configuration file
- mcux/.cproject and mcux/.project
+ MCUXpresso project configuration file
- cr_startup_lpc175x_6x.c
+ Startup required to compile test application LPC1769 Micro
Controller.
6 Mandatory materials (not included)
====================================
- MCUXpresso IDE. It can be downloaded from
[http://www.nxp.com/products/:MCUXpresso-IDE]
7 Hardware Configuration
========================
Before starting this application, HW Changes may be required for the
used board. Refer to the following User Manuals / Application notes
before starting with this example.
- AN11211: Quick Start Up Guide RC663 Blueboard
8 Software Configuration
========================
- The Software can be compiled for Cortex M3 LPC1769 micro-controller
from NXP.
- Since this test application be configured to run on various MCU ICs
and various NFC ICs, appropriate changes are required as mentioned
in Section-.
9 Steps to build NfcrdlibTst12_Rc663Lpcd for LPC1769 with RC663 using MCUXpresso
================================================================================
See "Importing provided SW example projects" in AN11022 (See
Section-13, Bullet-1 below)
10 Selection of Board / OSAL / Frontend (MCUXpresso)
====================================================
For MCUXpresso, the selection of Board / OSAL / Frontend has to be
done via -D (Preprocessor defines).
1) To select the board go to "Project Properties" --> "C/C++ Build"
--> "Settings" --> "Preprocessor" --> "Defined symbols (-D)", and
define the relevant PHDRIVER_<BoardNFCCombination>_BOARD macro.
e.g. For using LPC1769 with RC663 use PHDRIVER_LPC1769RC663_BOARD.
For list of supported boards refer to
Platform\DAL\cfg\BoardSelection.h.
2) To select the osal/os type, go to "Project Properties" --> "C/C++
Build" --> "Settings" --> "Preprocessor" --> "Defined symbols
(-D)".
e.g. For using FreeRTOS use PH_OSAL_FREERTOS. For other options
refer to RTOS\phOsal\inc\phOsal_Config.h.
11 Running NfcrdlibTst12_Rc663Lpcd
==================================
When this application is running on the target MCU setup and when you
bring the NFC cards or phone in proximity, the test application will
detect and reports the NFC technology types detected.
12 List of supported NFC Reader Boards/ICs
==========================================
1) CLEV6630B v2.0 Customer Evaluation Board
13 Reference Documents
======================
1) AN11022 : CLRC663 Evaluation board quick start guide
[http://www.nxp.com/docs/en/application-note/AN11022.pdf]
----------------------------------------------------------------------
For updates of this example, see
[http://www.nxp.com/products/:NFC-READER-LIBRARY]

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/*
* Copyright (c), NXP Semiconductors Gratkorn / Austria
*
* (C)NXP Semiconductors
* All rights are reserved. Reproduction in whole or in part is
* prohibited without the written consent of the copyright owner.
* NXP reserves the right to make changes without notice at any time.
* NXP makes no warranty, expressed, implied or statutory, including but
* not limited to any implied warranty of merchantability or fitness for any
* particular purpose, or that the use will not infringe any third party patent,
* copyright or trademark. NXP must not be liable for any loss or damage
* arising from its use.
*/
/** \file
* Rc663 Lpcd Test Application.
* $Author: Ankur Srivastava (nxp79569) $
* $Revision: 6170 $ (v07.10.00)
* $Date: 2016-09-23 20:23:49 +0530 (Fri, 23 Sep 2016) $
*/
#ifndef NFCRDLIBTST12_RC663LPCD
#define NFCRDLIBTST12_RC663LPCD
/**
* Reader Library Headers
*/
#include <ph_Status.h>
/*******************************************************************************
** Macros
*******************************************************************************/
/* Print system critical errors (with which execution can't proceed further)
* and halt the execution. */
#ifdef PH_OSAL_FREERTOS
#define EX11_LPCD_TASK_STACK (2000/4)
#define EX11_LPCD_TASK_PRIO 4
#elif defined PH_OSAL_LINUX
#define EX11_LPCD_TASK_STACK 0x20000
#define EX11_LPCD_TASK_PRIO 0
#endif /* PH_OSAL_FREERTOS || PH_OSAL_LINUX */
/* Different Options. */
/* Test Case Options. */
/* All test cases will be ran one after the other. */
#define EX11_LPCD_TC_OPTION_DEFAULT 0
/* There are 6 scenarios in Functional Test Cases */
#define EX11_LPCD_TC_FUNCTIONAL 1
/* 3 scenarios of functional test cases are used with varying Rf On and StandBy Time for Rf/Power Test Cases.
* Scenarios 2, 4 and 5 are used for Rf/Power Test Cases. */
#define EX11_LPCD_TC_TIMING 2
/* Test Case Scenarios. */
/* All test cases scenarios will be ran for the selected option one after the other. */
#define EX11_LPCD_TC_SCENARIO_DEFAULT 0
/* Scenario 1 ==>
* DIGITAL FILTER | CHARGE PUMP | DETECTION OPTION
* disabled(0) | disabled(0) | na(x)
*/
#define EX11_LPCD_TC_SCENARIO_1 1
/* Scenario 2 ==>
* DIGITAL FILTER | CHARGE PUMP | DETECTION OPTION
* disabled(0) | enabled(1) | na(x)
*/
#define EX11_LPCD_TC_SCENARIO_2 2
/* Scenario 3 ==>
* DIGITAL FILTER | CHARGE PUMP | DETECTION OPTION
* enabled(1) | disabled(0) | Option 1
*/
#define EX11_LPCD_TC_SCENARIO_3 3
/* Scenario 4 ==>
* DIGITAL FILTER | CHARGE PUMP | DETECTION OPTION
* enabled(1) | disabled(0) | Option 2
*/
#define EX11_LPCD_TC_SCENARIO_4 4
/* Scenario 5 ==>
* DIGITAL FILTER | CHARGE PUMP | DETECTION OPTION
* enabled(1) | enabled(1) | Option 1
*/
#define EX11_LPCD_TC_SCENARIO_5 5
/* Scenario 6 ==>
* DIGITAL FILTER | CHARGE PUMP | DETECTION OPTION
* enabled(1) | enabled(1) | Option 2
*/
#define EX11_LPCD_TC_SCENARIO_6 6
/* Scenario 7 ==>
* This scenario covers the test scenario of Calibration performed with load on the antennae and the load is unloaded during Lpcd Loop from the antennae.
* The configuration of this scenario is as follows :-
* DIGITAL FILTER | CHARGE PUMP | DETECTION OPTION
* disabled(1) | disabled(1) | na(x)
*/
#define EX11_LPCD_TC_SCENARIO_7 7
/**
* Reader library thread. This is the main thread which configures the Hal for LPCD and performs LPCD.
* */
void Tst12_LpcdThread(void * pParam);
#endif /* NFCRDLIBTST12_RC663LPCD */

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/*
* Copyright (c), NXP Semiconductors Gratkorn / Austria
*
* (C)NXP Semiconductors
* All rights are reserved. Reproduction in whole or in part is
* prohibited without the written consent of the copyright owner.
* NXP reserves the right to make changes without notice at any time.
* NXP makes no warranty, expressed, implied or statutory, including but
* not limited to any implied warranty of merchantability or fitness for any
*particular purpose, or that the use will not infringe any third party patent,
* copyright or trademark. NXP must not be liable for any loss or damage
* arising from its use.
*/
/** \file
* Application specific selection of Reader Library Components
*
*
* $Author: Ankur Srivastava (nxp79569) $
* $Revision: 6301 $ (v07.10.00)
* $Date: 2016-10-05 14:31:22 +0530 (Wed, 05 Oct 2016) $
*
*
*
*/
#ifndef PH_NXPBUILD_APP_H_INC
#define PH_NXPBUILD_APP_H_INC
/** \defgroup ph_NxpBuild NXP Build
* \brief Controls the Inclusion of required components, Inclusion SRC/DATA within components and the Build Dependencies between the components
* @{
*/
/* NXPBUILD_DELETE: included code lines should be always removed from code */
/* NXP BUILD DEFINES */
/* use #define to include components */
/* comment out #define to exclude components */
/* DEBUG build mode */
/*#define NXPBUILD__PH_DEBUG*/ /**< DEBUG build definition */
//#define NXPRDLIB_REM_GEN_INTFS
/*********************************************************************************************************************************************************************************/
#if defined(__PN74XXXX__) || defined (__PN73XXXX__)
#define NXPBUILD__PHHAL_HW_PN7462AU /**< NFC Controller PN7462AU HAL */
#endif
#ifndef NXPBUILD__PHHAL_HW_PN7462AU /**< If the used NFC HW is not NFC Controller like PN7462AU, then include one of the front end HAL */
#define NXPBUILD__PHHAL_HW_RC663
//#define NXPBUILD__PHHAL_HW_PN5180 /**< PN5180 HAL Component is included */
#endif /* NXPBUILD__PHHAL_HW_PN7462AU */
#if defined(NXPBUILD__PHHAL_HW_RC523) || \
defined(NXPBUILD__PHHAL_HW_PN5180) || \
defined(NXPBUILD__PHHAL_HW_PN7462AU)
#define NXPBUILD__PHHAL_HW_TARGET /**< Dependency checking if target mode macros should be enabled */
#endif
/*********************************************************************************************************************************************************************************/
//#define NXPBUILD__PHPAL_I14443P3A_SW /**< PAL ISO 14443-3A SW Component is included. */
//#define NXPBUILD__PHPAL_I14443P3B_SW /**< PAL ISO 14443-3B SW Component is included. */
//#define NXPBUILD__PHPAL_I14443P4A_SW /**< PAL ISO 14443-4A SW Component is included. */
//#define NXPBUILD__PHPAL_I14443P4_SW /**< PAL ISO 14443-4 SW Component is included. */
//#define NXPBUILD__PHPAL_MIFARE_SW /**< PAL MIFARE SW Component is included */
//#define NXPBUILD__PHPAL_MIFARE_STUB /**< PAL MIFARE STUB Component is included */
//#define NXPBUILD__PHPAL_FELICA_SW /**< PAL Felica SW Component is included. */
//#define NXPBUILD__PHPAL_SLI15693_SW /**< PAL SLI 15693 Component is included. */
//#define NXPBUILD__PHPAL_I18000P3M3_SW /**< PAL ISO 18000p3m3 Component is included. */
#ifdef NXPBUILD__PHHAL_HW_RC663 /**< If FE HAL is RC663, then include EPC UID PAL as required, otherwise exclude. */
//#define NXPBUILD__PHPAL_EPCUID_SW /**< PAL EPC UID SW Component is included. */
#endif
//#define NXPBUILD__PHPAL_I18092MPI_SW /**< PAL ISO18092 (P2P) SW Component is included. */
#ifndef NXPBUILD__PHHAL_HW_RC663 /**< If FE HAL is RC663, then exclude ISO14443 Card Mode PAL & ISO18092 Target Mode PAL, otherwise include as required. */
//#define NXPBUILD__PHPAL_I14443P4MC_SW /**< PAL ISO 14443-4 Card Mode SW Component is included. */
//#define NXPBUILD__PHPAL_I18092MT_SW /**< PAL ISO 18092 Target Mode SW Component is included. */
#endif /* NXPBUILD__PHHAL_HW_RC663 */
/*********************************************************************************************************************************************************************************/
//#define NXPBUILD__PHAC_DISCLOOP_SW /**< Discovery Loop Activity SW Component is included. */
#ifdef NXPBUILD__PHAC_DISCLOOP_SW /**< If DiscLoop SW Component is included, macros( & it's dependencies) to include/exclude SRC/DATA within Discloop is defined. */
#if defined (NXPBUILD__PHHAL_HW_PN5180) || \
defined (NXPBUILD__PHHAL_HW_RC663) || \
defined (NXPBUILD__PHHAL_HW_PN7462AU)
#define NXPBUILD__PHAC_DISCLOOP_LPCD /**< SRC to enable LPCD is included. */
#endif
#ifdef NXPBUILD__PHPAL_I14443P3A_SW
#define NXPBUILD__PHAC_DISCLOOP_TYPEA_I3P3_TAGS /**< SRC/DATA to Detect/CollRes/Activate cards such as MFC, MFUL, MFP SL1 etc is included. */
#define NXPBUILD__PHAC_DISCLOOP_TYPEA_JEWEL_TAGS /**< SRC/DATA to Detect cards such as NFC Forum T1T, Topaz/Jewel is included. */
#if defined(NXPBUILD__PHPAL_I14443P4A_SW) && defined(NXPBUILD__PHPAL_I14443P4_SW)
#define NXPBUILD__PHAC_DISCLOOP_TYPEA_I3P4_TAGS /**< SRC/DATA to Detect cards such as MFDF, MFP, T4AT NFC Forum Tag or Type A EMVCo is included. */
#endif
#endif /* NXPBUILD__PHPAL_I14443P3A_SW */
#if defined(NXPBUILD__PHPAL_I14443P3A_SW) && defined(NXPBUILD__PHPAL_I18092MPI_SW)
#define NXPBUILD__PHAC_DISCLOOP_TYPEA_P2P_TAGS /**< SRC/DATA to Detect Peer Passive Type A P2P Target mode devices is included. */
#endif
#ifdef NXPBUILD__PHPAL_I18092MPI_SW
#define NXPBUILD__PHAC_DISCLOOP_TYPEA_P2P_ACTIVE /**< SRC/DATA to Detect Peer Active Type A P2P Target mode devices is included. */
#define NXPBUILD__PHAC_DISCLOOP_TYPEF212_P2P_ACTIVE/**< SRC/DATA to Detect Peer Active Type F212 P2P Target mode devices is included. */
#define NXPBUILD__PHAC_DISCLOOP_TYPEF424_P2P_ACTIVE/**< SRC/DATA to Detect Peer Active Type F424 P2P Target mode devices is included. */
#endif /* NXPBUILD__PHPAL_I18092MPI_SW */
#ifdef NXPBUILD__PHPAL_FELICA_SW
#define NXPBUILD__PHAC_DISCLOOP_FELICA_TAGS /**< SRC/DATA to Detect FeliCa Cards is included. */
#ifdef NXPBUILD__PHPAL_I18092MPI_SW
#define NXPBUILD__PHAC_DISCLOOP_TYPEF_P2P_TAGS /**< SRC/DATA to Detect Peer Passive Type F P2P Target mode devices is included. */
#endif /* NXPBUILD__PHPAL_I18092MPI_SW */
#endif /* NXPBUILD__PHPAL_FELICA_SW */
#ifdef NXPBUILD__PHPAL_I14443P3B_SW
#define NXPBUILD__PHAC_DISCLOOP_TYPEB_I3P3B_TAGS /**< SRC/DATA to Detect Type B Cards that operate at Layer3 level is included */
#ifdef NXPBUILD__PHPAL_I14443P4_SW
#define NXPBUILD__PHAC_DISCLOOP_TYPEB_I3P4B_TAGS /**< SRC/DATA to Detect Type B Cards such as NFC Forum Type 4 Tags, EMVCo Type B Cards etc is included */
#endif /* NXPBUILD__PHPAL_I14443P4_SW */
#endif /* NXPBUILD__PHPAL_I14443P3B_SW */
#ifdef NXPBUILD__PHPAL_SLI15693_SW
#define NXPBUILD__PHAC_DISCLOOP_TYPEV_TAGS /**< SRC/DATA to Detect Type V Cards such as ICODE SLI/SLIX/SLI2/Tesa Cards is included*/
#endif /* NXPBUILD__PHPAL_SLI15693_SW */
#ifdef NXPBUILD__PHPAL_I18000P3M3_SW
#define NXPBUILD__PHAC_DISCLOOP_I18000P3M3_TAGS /**< SRC/DATA to Detect ICODE ILT Cards such as SMARTRAC StackIt Cards is included*/
#endif /* NXPBUILD__PHPAL_I18000P3M3_SW */
#ifndef NXPBUILD__PHHAL_HW_RC663 /**< If FE HAL is RC663, target mode is not supported at all, hence exclude those SRC, otherwise include as required */
#ifdef NXPBUILD__PHHAL_HW_TARGET
#define NXPBUILD__PHAC_DISCLOOP_TYPEA_TARGET_PASSIVE /**< SRC to Initialize Type A passive listen config and subsequently call HAL AutoColl is included. */
#define NXPBUILD__PHAC_DISCLOOP_TYPEA_TARGET_ACTIVE /**< SRC to Initialize Type A active listen config and subsequently call HAL AutoColl is included. */
#define NXPBUILD__PHAC_DISCLOOP_TYPEF212_TARGET_PASSIVE/**< SRC to Initialize Type F212 passive listen config and subsequently call HAL AutoColl is included. */
#define NXPBUILD__PHAC_DISCLOOP_TYPEF212_TARGET_ACTIVE /**< SRC to Initialize Type F212 active listen config and subsequently call HAL AutoColl is included. */
#define NXPBUILD__PHAC_DISCLOOP_TYPEF424_TARGET_PASSIVE/**< SRC to Initialize Type F424 passive listen config and subsequently call HAL AutoColl is included. */
#define NXPBUILD__PHAC_DISCLOOP_TYPEF424_TARGET_ACTIVE /**< SRC to Initialize Type F424 active listen config and subsequently call HAL AutoColl is included. */
#endif /* NXPBUILD__PHHAL_HW_TARGET */
#endif
#endif /* NXPBUILD__PHAC_DISCLOOP_SW */
/*********************************************************************************************************************************************************************************/
//#define NXPBUILD__PH_CIDMANAGER_SW /**< CID Manager SW Component is included. */
//#define NXPBUILD__PH_KEYSTORE_SW /**< SW KeyStore Component is included. */
#if defined(NXPBUILD__PHHAL_HW_RC663) && !defined(NXPBUILD__PH_KEYSTORE_SW)
//#define NXPBUILD__PH_KEYSTORE_RC663 /**< RC663 KeyStore Component is included. */
#endif
//#define NXPBUILD__PH_NDA_MFDF /**< MIFARE DESFire contactless IC */
//#define NXPBUILD__PH_CRYPTOSYM_SW /**< Crypto Symbols SW Component is included. */
//#define NXPBUILD__PH_CRYPTORNG_SW /**< Crypto RNG SW Component is included. */
/*********************************************************************************************************************************************************************************/
#ifdef NXPBUILD__PHPAL_FELICA_SW
#define NXPBUILD__PHAL_FELICA_SW /**< AL FeliCa SW Component is included */
#endif /* NXPBUILD__PHPAL_FELICA_SW */
#ifdef NXPBUILD__PHPAL_MIFARE_SW
#if defined(NXPBUILD__PH_KEYSTORE_SW) || defined(NXPBUILD__PH_KEYSTORE_RC663)
#define NXPBUILD__PHAL_MFC_SW /**< AL MIFARE Classic contactless IC SW Component is included */
#endif
#define NXPBUILD__PHAL_MFUL_SW /**< AL Mifare Ultrlight SW Component is included */
#define NXPBUILD__PHAL_MFDF_SW /**< AL Mifare DesFire SW Component is included */
#endif /* NXPBUILD__PHPAL_MIFARE_SW */
//#define NXPBUILD__PHAL_T1T_SW /**< AL Type T1 Tag SW Component is included */
#ifdef NXPBUILD__PHPAL_SLI15693_SW
#define NXPBUILD__PHAL_ICODE_SW /**< AL ICODE SW COMPONENT is included */
#endif /* NXPBUILD__PHPAL_SLI15693_SW */
//#define NXPBUILD__PHAL_TOP_SW /**< AL for TagOps Mapping SW Component is included.Required for NDEF operations */
#ifdef NXPBUILD__PHPAL_I18000P3M3_SW
#define NXPBUILD__PHAL_I18000P3M3_SW /**< AL ISO18000p3m3 SW Component is included */
#endif /* NXPBUILD__PHPAL_I18000P3M3_SW */
#ifdef NXPBUILD__PHPAL_I14443P4MC_SW
#if !defined(PH_OSAL_NULLOS)
#define NXPBUILD__PHCE_T4T_SW /**< AL HCE T2AT SW Component is included */
//#define NXPBUILD__PHCE_T4T_PROPRIETARY /**< SRC to handle HCE T4AT Proprietary Commands is included */
/*#define NXPBUILD__PHCE_T4T_EXT_NDEF */ /**< SRC to handle Extended NDEF Support as per T4T spec 3.0 is included */
#endif
#endif /* NXPBUILD__PHPAL_I14443P4MC_SW */
/* LLCP Components */
#if defined(NXPBUILD__PHPAL_I18092MPI_SW) || defined(NXPBUILD__PHPAL_I18092MT_SW)
#if !defined(PH_OSAL_NULLOS)
#define NXPBUILD__PHLN_LLCP_SW /**< Link LLCP SW Component is included */
#endif
#endif
/* SNEP components */
#ifdef NXPBUILD__PHLN_LLCP_SW
#define NXPBUILD__PHNP_SNEP_SW /**< Protocol SNEP SW Component is included */
#endif /* NXPBUILD__PHLN_LLCP_SW */
/* Enable/disable Debugging */
/*#define NXPBUILD__PH_DEBUG*/ /**< TODO: To be checked if required */
/** @}
* end of ph_NxpBuild
*/
#endif /* PH_NXPBUILD_APP_H_INC */

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/*----------------------------------------------------------------------------*/
/* Copyright 2020 NXP */
/* */
/* NXP Confidential. This software is owned or controlled by NXP and may only */
/* be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that you */
/* have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable license */
/* terms, then you may not retain, install, activate or otherwise use the */
/* software. */
/*----------------------------------------------------------------------------*/
/** \file
* Example Source abstracting component data structure and code initialization and code specific to HW used in the examples
* This file shall be present in all examples. A customer does not need to touch/modify this file. This file
* purely depends on the phNxpBuild_Lpc.h or phNxpBuild_App.h
* The phAppInit.h externs the component data structures initialized here that is in turn included by the core examples.
* The core example shall not use any other variable defined here except the RdLib component data structures(as explained above)
* The RdLib component initialization requires some user defined data and function pointers.
* These are defined in the respective examples and externed here.
*
* Keystore and Crypto initialization needs to be handled by application.
*
* $Author$
* $Revision$ (v07.10.00)
* $Date$
*
*/
/* Status header */
#include <ph_Status.h>
#include "phApp_Init.h"
#ifdef NXPBUILD__PHHAL_HW_PN7462AU
#include <phOsal.h>
#include <phFlashBoot.h>
#include <phhalTimer.h>
/*******************************************************************************
** Function Declarations
*******************************************************************************/
void phApp_CPU_Init(void);
/*******************************************************************************
** Global Variable Declaration
*******************************************************************************/
phhalHw_PN7462AU_DataParams_t * pHal;
#ifdef NXPBUILD__PHHAL_HW_TARGET
/* Parameters for L3 activation during Autocoll */
extern uint8_t sens_res[2] ;
extern uint8_t nfc_id1[3] ;
extern uint8_t sel_res ;
extern uint8_t nfc_id3 ;
extern uint8_t poll_res[18] ;
#endif /* NXPBUILD__PHHAL_HW_TARGET */
/*******************************************************************************
** Function Definitions
*******************************************************************************/
/**
* This function will initialize NXP NFC Controller.
*/
void phApp_CPU_Init(void)
{
phFlashBoot_Main();
phhalTimer_Init();
}
/**
* This function will initialize Hal Target Config
*/
phStatus_t phApp_HALConfigAutoColl(void)
{
#ifdef NXPBUILD__PHHAL_HW_TARGET
phStatus_t wStatus;
uint8_t bSystemCode[] = {0xFF, 0xFF};
/* Set Listen Parameters in HAL Buffer used during Autocoll */
wStatus = phhalHw_PN7462AU_SetListenParam(
pHal,
&sens_res[0],
&nfc_id1[0],
sel_res,
(poll_res[0] == 0x02 ? PH_ON : PH_OFF),
&poll_res[2],
&poll_res[8],
bSystemCode);
CHECK_SUCCESS(wStatus);
#endif /* NXPBUILD__PHHAL_HW_TARGET */
return PH_ERR_SUCCESS;
}
/* Configure LPCD (for PN7462AU) */
phStatus_t phApp_ConfigureLPCD(void)
{
phStatus_t status;
uint16_t wLpcdValue;
wLpcdValue = 0;
status = phhalHw_GetConfig(pHal, PHHAL_HW_CONFIG_PN7462AU_LPCD_NEW_VALUE, &wLpcdValue);
CHECK_SUCCESS(status);
if (wLpcdValue != 0x00)
{
status = phhalHw_SetConfig(pHal, PHHAL_HW_CONFIG_PN7462AU_LPCD_REF_VALUE, wLpcdValue);
CHECK_SUCCESS(status);
}
return status;
}
#endif /* NXPBUILD__PHHAL_HW_PN7462AU */
/******************************************************************************
** End Of File
******************************************************************************/

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/*----------------------------------------------------------------------------*/
/* Copyright 2021-2023 NXP */
/* */
/* NXP Confidential. This software is owned or controlled by NXP and may only */
/* be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that you */
/* have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable license */
/* terms, then you may not retain, install, activate or otherwise use the */
/* software. */
/*----------------------------------------------------------------------------*/
/** \file
* Example Source abstracting component data structure and code initialization and code specific to HW used in the examples
* This file shall be present in all examples. A customer does not need to touch/modify this file. This file
* purely depends on the phNxpBuild_Lpc.h or phNxpBuild_App.h
* The phAppInit.h externs the component data structures initialized here that is in turn included by the core examples.
* The core example shall not use any other variable defined here except the RdLib component data structures(as explained above)
* The RdLib component initialization requires some user defined data and function pointers.
* These are defined in the respective examples and externed here.
*
* Keystore and Crypto initialization needs to be handled by application.
*
* $Author: NXP $
* $Revision: $ (v07.10.00)
* $Date: $
*
*/
#include <ph_Status.h>
#include "phApp_Init.h"
#ifdef NXPBUILD__PHHAL_HW_PN76XX
#include "phOsal.h"
#include "PN76xx.h"
#include "PN76_Eeprom.h"
#include "Clif.h"
/*********************************************************************************************************************/
/* LOCAL DEFINES */
/*********************************************************************************************************************/
/*******************************************************************************
** Function Declarations
*******************************************************************************/
void phApp_CPU_Init(void);
/*******************************************************************************
** Global Variable Declaration
*******************************************************************************/
phhalHw_Pn76xx_DataParams_t * pHal;
#ifdef NXPBUILD__PHHAL_HW_TARGET
/* Parameters for L3 activation during Autocoll */
extern uint8_t sens_res[2U] ;
extern uint8_t nfc_id1[3U] ;
extern uint8_t sel_res ;
extern uint8_t nfc_id3 ;
extern uint8_t poll_res[18U] ;
#endif /* NXPBUILD__PHHAL_HW_TARGET */
/*******************************************************************************
** Function Definitions
*******************************************************************************/
/**
* This function will initialize NXP NFC Controller.
*/
void phApp_CPU_Init(void)
{
#ifdef SEGGER_RTT_ENABLE
/* SEGGER RTT Init */
memset((uint8_t *)PN76_SEGGER_RTT_MEMORY_ALLOCATION_ADDRESS, 0, 0x4b8);
SEGGER_RTT_ConfigUpBuffer(0, NULL, NULL, 0, SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL);
#endif
/* To enable NS RF IRQ */
NVIC_EnableIRQ(CLIF_RF_IRQn);
/* To enable NS TIMER IRQ */
NVIC_EnableIRQ(TIMER_IRQn);
/* Initialize PMU */
PMU_Init();
/* Initialize SMU */
Smu_Init();
/* Initialize CLKGEN */
CLKGEN_Init();
}
/**
* This function will initialize Hal Target Config
*/
phStatus_t phApp_HALConfigAutoColl(void)
{
#ifdef NXPBUILD__PHHAL_HW_TARGET
phStatus_t wStatus;
uint8_t baDynamicUidConfig[1U] = { 1U }; /* Enable Dynamic UID feature on PN76XX. */
uint8_t baReadEepromConfig[24U] = { 0U };
/* Read Set Listen Parameters data from EEPROM */
wStatus = (PN76_Status_t)PN76_ReadEeprom(
baReadEepromConfig,
PHHAL_HW_PN76XX_SET_LISTEN_EEPROM_ADDR,
PHHAL_HW_PN76XX_SET_LISTEN_LEN
#ifdef NXPBUILD__PHHAL_HW_PN7642
, E_PN76_EEPROM_SECURE_LIB_CONFIG
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
);
CHECK_SUCCESS(wStatus);
/* Verify EEPROM data and configure Set Listen Parameters if EEPROM data is not correct. */
if ((memcmp(&baReadEepromConfig[0U], sens_res, 2U) != 0x00) ||
(memcmp(&baReadEepromConfig[2U], nfc_id1, 3U) != 0x00) ||
(memcmp(&baReadEepromConfig[5U], &sel_res, 1U) != 0x00) ||
(memcmp(&baReadEepromConfig[6U], poll_res, 18U) != 0x00))
{
/* Configure Set Listen Parameters. */
wStatus = phhalHw_Pn76xx_SetListenParameters(
pHal,
&sens_res[0],
&nfc_id1[0],
sel_res,
&poll_res[0],
nfc_id3);
CHECK_SUCCESS(wStatus);
}
/* Read Dynamic UID configuration from EEPROM */
wStatus = (PN76_Status_t)PN76_ReadEeprom(
baReadEepromConfig,
PHHAL_HW_PN76XX_DYNAMIC_UID_CONFG_ADDR,
0x01U
#ifdef NXPBUILD__PHHAL_HW_PN7642
, E_PN76_EEPROM_SECURE_LIB_CONFIG
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
);
CHECK_SUCCESS(wStatus);
/* Verify EEPROM data and perform Dynamic UID configuration if EEPROM data is not correct. */
if (baReadEepromConfig[0] != baDynamicUidConfig[0])
{
/* Configure Dynamic UID */
wStatus = PN76_WriteEeprom(
baDynamicUidConfig,
PHHAL_HW_PN76XX_DYNAMIC_UID_CONFG_ADDR,
0x01
#ifdef NXPBUILD__PHHAL_HW_PN7642
, E_PN76_EEPROM_SECURE_LIB_CONFIG
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
);
CHECK_SUCCESS(wStatus);
}
#endif /* NXPBUILD__PHHAL_HW_TARGET */
return PH_ERR_SUCCESS;
}
/* Configure LPCD (for PN76XX) */
phStatus_t phApp_ConfigureLPCD(void)
{
#ifdef NXPBUILD__PHHAL_HW_PN7642
phStatus_t status = PH_ERR_SUCCESS;
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_SET_LPCD_WAKEUPTIME_MS, 100U);
CHECK_SUCCESS(status);
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_LPCD_MODE, PHHAL_HW_PN76XX_LPCD_MODE_DEFAULT);
CHECK_SUCCESS(status);
status = phhalHw_Lpcd(pHal);
CHECK_SUCCESS(status);
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_SET_LPCD_WAKEUPTIME_MS, 330U);
CHECK_SUCCESS(status);
status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_LPCD_MODE, PHHAL_HW_PN76XX_LPCD_MODE_POWERDOWN);
CHECK_SUCCESS(status);
return status;
#endif /* NXPBUILD__PHHAL_HW_PN7642 */
#ifdef NXPBUILD__PHHAL_HW_PN7640
return PH_ERR_UNSUPPORTED_COMMAND;
#endif /* NXPBUILD__PHHAL_HW_PN7640 */
}
#endif /* NXPBUILD__PHHAL_HW_PN76XX */
/******************************************************************************
** End Of File
******************************************************************************/

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/*----------------------------------------------------------------------------*/
/* Copyright 2020 NXP */
/* */
/* NXP Confidential. This software is owned or controlled by NXP and may only */
/* be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that you */
/* have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable license */
/* terms, then you may not retain, install, activate or otherwise use the */
/* software. */
/*----------------------------------------------------------------------------*/
/** \file
* Example Source abstracting component data structure and code initialization and code specific to HW used in the examples
* This file shall be present in all examples. A customer does not need to touch/modify this file. This file
* purely depends on the phNxpBuild_Lpc.h or phNxpBuild_App.h
* The phAppInit.h externs the component data structures initialized here that is in turn included by the core examples.
* The core example shall not use any other variable defined here except the RdLib component data structures(as explained above)
* The RdLib component initialization requires some user defined data and function pointers.
* These are defined in the respective examples and externed here.
*
* Keystore and Crypto initialization needs to be handled by application.
*
* $Author$
* $Revision$ (v07.10.00)
* $Date$
*
*/
/* Status header */
#include <ph_Status.h>
#include "phApp_Init.h"
#ifdef NXPBUILD__PHHAL_HW_RC663
#include "BoardSelection.h"
/*******************************************************************************
** Function Declarations
*******************************************************************************/
#ifdef PH_PLATFORM_HAS_ICFRONTEND
void CLIF_IRQHandler(void);
#endif
/*******************************************************************************
** Global Variable Declaration
*******************************************************************************/
phbalReg_Type_t sBalParams;
phhalHw_Rc663_DataParams_t * pHal;
/*******************************************************************************
** Function Definitions
*******************************************************************************/
/* Configure LPCD (for CLRC663) */
phStatus_t phApp_ConfigureLPCD(void)
{
phStatus_t status;
uint8_t bValueI;
uint8_t bValueQ;
/* Configure LPCD calibration standby time (T4) and RF ON time (T3). */
status = phhalHw_Rc663_Cmd_Lpcd_SetConfig(
pHal,
PHHAL_HW_RC663_CMD_LPCD_MODE_DEFAULT,
0,
0,
PH_NFCRDLIB_EXAMPLE_LPCD_GUARDTIME,
PH_NFCRDLIB_EXAMPLE_LPCD_RFON_TIME);
/* Perform LPCD calibration to get I and Q values. */
status = phhalHw_Rc663_Cmd_Lpcd_GetConfig(pHal, &bValueI, &bValueQ);
CHECK_SUCCESS(status);
/* Configure I and Q values for LPCD detection cycle. */
status = phhalHw_Rc663_Cmd_Lpcd_SetConfig(
pHal,
PHHAL_HW_RC663_CMD_LPCD_MODE_POWERDOWN,
bValueI,
bValueQ,
PH_NFCRDLIB_EXAMPLE_LPCD_GUARDTIME,
PH_NFCRDLIB_EXAMPLE_LPCD_RFON_TIME);
return status;
}
void CLIF_IRQHandler(void)
{
/* Read the interrupt status of external interrupt attached to the reader IC IRQ pin */
if (phDriver_PinRead(PHDRIVER_PIN_IRQ, PH_DRIVER_PINFUNC_INTERRUPT))
{
phDriver_PinClearIntStatus(PHDRIVER_PIN_IRQ);
/* Call application registered callback. */
if (pHal->pRFISRCallback != NULL)
{
pHal->pRFISRCallback(pHal);
}
}
}
#endif /* NXPBUILD__PHHAL_HW_RC663 */
/******************************************************************************
** End Of File
******************************************************************************/

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/*----------------------------------------------------------------------------*/
/* Copyright 2022 NXP */
/* */
/* NXP Confidential. This software is owned or controlled by NXP and may only */
/* be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that you */
/* have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable license */
/* terms, then you may not retain, install, activate or otherwise use the */
/* software. */
/*----------------------------------------------------------------------------*/
/** \file
* Generic phDriver Component of Reader Library Framework.
* $Author$
* $Revision$
* $Date$
*
*/
#ifndef BOARD_PIPN5190_H
#define BOARD_PIPN5190_H
/*******************************************************************
* Enable User space SPI.
******************************************************************/
#define PHDRIVER_LINUX_USER_SPI /**< User Space Spi. Kernel space is supported for PN5180 only. */
/******************************************************************
* Board Pin/Gpio configurations
******************************************************************/
#define PHDRIVER_PIN_RESET 24 /**< "/sys/class/gpio/gpio24/" */
#define PHDRIVER_PIN_IRQ 23 /**< "/sys/class/gpio/gpio23/" */
#define PHDRIVER_PIN_DWL 18 /**< "/sys/class/gpio/gpio18/" */
#define PHDRIVER_PIN_BUSY 25 /**< "/sys/class/gpio/gpio25/" */
/******************************************************************
* PIN Pull-Up/Pull-Down configurations.
******************************************************************/
#define PHDRIVER_PIN_RESET_PULL_CFG PH_DRIVER_PULL_DOWN
#define PHDRIVER_PIN_IRQ_PULL_CFG PH_DRIVER_PULL_UP
#define PHDRIVER_PIN_BUSY_PULL_CFG PH_DRIVER_PULL_UP
#define PHDRIVER_PIN_DWL_PULL_CFG PH_DRIVER_PULL_UP
/******************************************************************
* IRQ & BUSY PIN TRIGGER settings
******************************************************************/
#define PIN_IRQ_TRIGGER_TYPE PH_DRIVER_INTERRUPT_RISINGEDGE
/*****************************************************************
* Front End Reset logic level settings
****************************************************************/
#define PH_DRIVER_SET_HIGH 1 /**< Logic High. */
#define PH_DRIVER_SET_LOW 0 /**< Logic Low. */
#define RESET_POWERDOWN_LEVEL PH_DRIVER_SET_LOW//PH_DRIVER_SET_HIGH
#define RESET_POWERUP_LEVEL PH_DRIVER_SET_HIGH//PH_DRIVER_SET_LOW
/*****************************************************************
* SPI Configuration
****************************************************************/
#ifdef PHDRIVER_LINUX_USER_SPI
# define PHDRIVER_USER_SPI_BUS 0 /**< "/dev/spidev0.0" */
# define PHDRIVER_USER_SPI_CS 0 /**< "/dev/spidev0.0" */
# define PHDRIVER_USER_SPI_FREQ 5000000 /**< 5 MHz. */
# define PHDRIVER_USER_SPI_CFG_DIR "/dev/spidev"
# define PHDRIVER_USER_SPI_CFG_MODE SPI_MODE_0
# define PHDRIVER_USER_SPI_CFG_BITS_PER_WORD 8
/*****************************************************************
* Dummy entries
* No functionality. To suppress build error in HAL. No pin functionality in SPI Linux BAL.
*****************************************************************/
# define PHDRIVER_PIN_SSEL 0xFFFF
# define PHDRIVER_PIN_NSS_PULL_CFG PH_DRIVER_PULL_UP
#endif
/*****************************************************************
* STATUS LED Configuration
****************************************************************/
#define PHDRIVER_LED_SUCCESS_DELAY 2
#define PHDRIVER_LED_FAILURE_DELAY_MS 250
#define PHDRIVER_LED_FAILURE_FLICKER 4
#endif /* BOARD_PIPN5190_H */

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/*----------------------------------------------------------------------------*/
/* Copyright 2017-2021 NXP */
/* */
/* NXP Confidential. This software is owned or controlled by NXP and may only */
/* be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that you */
/* have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable license */
/* terms, then you may not retain, install, activate or otherwise use the */
/* software. */
/*----------------------------------------------------------------------------*/
/** \file
* Generic phDriver Component of Reader Library Framework.
* $Author$
* $Revision$
* $Date$
*
*/
#ifndef BOARD_PIRC663_H
#define BOARD_PIRC663_H
/*******************************************************************
* Enable User space SPI.
******************************************************************/
#define PHDRIVER_LINUX_USER_SPI /**< User Space Spi. Kernel space is supported for PN5180 only. */
/******************************************************************
* Board Pin/Gpio configurations
******************************************************************/
#define PHDRIVER_PIN_RESET 24 /**< "/sys/class/gpio/gpio24/" */
#define PHDRIVER_PIN_IRQ 23 /**< "/sys/class/gpio/gpio23/" */
#define PHDRIVER_PIN_IFSEL0 27
#define PHDRIVER_PIN_IFSEL1 22
#define PHDRIVER_PIN_AD0 4
#define PHDRIVER_PIN_AD1 17
/******************************************************************
* PIN Pull-Up/Pull-Down configurations.
******************************************************************/
#define PHDRIVER_PIN_RESET_PULL_CFG PH_DRIVER_PULL_DOWN
#define PHDRIVER_PIN_IRQ_PULL_CFG PH_DRIVER_PULL_UP
/******************************************************************
* IRQ & BUSY PIN TRIGGER settings
******************************************************************/
#define PIN_IRQ_TRIGGER_TYPE PH_DRIVER_INTERRUPT_RISINGEDGE
/*****************************************************************
* Front End Reset logic level settings
****************************************************************/
#define PH_DRIVER_SET_HIGH 1 /**< Logic High. */
#define PH_DRIVER_SET_LOW 0 /**< Logic Low. */
#define RESET_POWERDOWN_LEVEL PH_DRIVER_SET_HIGH
#define RESET_POWERUP_LEVEL PH_DRIVER_SET_LOW
/*****************************************************************
* SPI Configuration
****************************************************************/
#ifdef PHDRIVER_LINUX_USER_SPI
# define PHDRIVER_USER_SPI_BUS 0 /**< "/dev/spidev0.0" */
# define PHDRIVER_USER_SPI_CS 0 /**< "/dev/spidev0.0" */
# define PHDRIVER_USER_SPI_FREQ 5000000 /**< 5 MHz. */
# define PHDRIVER_USER_SPI_CFG_DIR "/dev/spidev"
# define PHDRIVER_USER_SPI_CFG_MODE SPI_MODE_0
# define PHDRIVER_USER_SPI_CFG_BITS_PER_WORD 8
/*****************************************************************
* Dummy entries
* No functionality. To suppress build error in HAL. No pin functionality in SPI Linux BAL.
*****************************************************************/
# define PHDRIVER_PIN_SSEL 0xFFFF
# define PHDRIVER_PIN_NSS_PULL_CFG PH_DRIVER_PULL_UP
#endif
/*****************************************************************
* STATUS LED Configuration
****************************************************************/
#define PHDRIVER_LED_SUCCESS_DELAY 2
#define PHDRIVER_LED_FAILURE_DELAY_MS 250
#define PHDRIVER_LED_FAILURE_FLICKER 4
#endif /* BOARD_PIRC663_H */